From 077d6bbd95fa3a2af87be78369ae21c8d647a14b Mon Sep 17 00:00:00 2001 From: Gustavo de Souza dos Reis Date: Mon, 8 Jan 2024 08:18:20 -0300 Subject: [PATCH] Modify adn4604 config functions to return error codes --- modules/adn4604.c | 45 +++++++++++++++++++++++++++---------- modules/adn4604.h | 14 +++++++----- port/board/afc-v3/payload.c | 28 +++++++++++++++-------- port/board/afc-v3/payload.h | 3 ++- 4 files changed, 62 insertions(+), 28 deletions(-) diff --git a/modules/adn4604.c b/modules/adn4604.c index 21d1baca3..ca14313f5 100644 --- a/modules/adn4604.c +++ b/modules/adn4604.c @@ -39,10 +39,11 @@ adn_connect_map_t con; -void adn4604_tx_control( uint8_t output, uint8_t tx_mode ) +mmc_err adn4604_tx_control( uint8_t output, uint8_t tx_mode ) { uint8_t i2c_addr, i2c_interf; uint8_t enable[2]; + uint8_t tx_len = 0; /* TX Enable registers have an 0x20 offset from their value */ enable[0] = 0x20 + output; @@ -69,56 +70,72 @@ void adn4604_tx_control( uint8_t output, uint8_t tx_mode ) enable[1] = tx_mode << 4; if (i2c_take_by_chipid(CHIP_ID_ADN, &i2c_addr, &i2c_interf, (TickType_t)10) ) { - xI2CMasterWrite( i2c_interf, i2c_addr, enable, sizeof(enable) ); + tx_len = xI2CMasterWrite( i2c_interf, i2c_addr, enable, sizeof(enable) ); i2c_give(i2c_interf); } + + if (!tx_len) return MMC_TIMEOUT_ERR; + return MMC_OK; } -void adn4604_update( void ) +mmc_err adn4604_update( void ) { uint8_t i2c_addr, i2c_interf; uint8_t update[2] = { ADN_XPT_UPDATE_REG, 0x01 }; + uint8_t tx_len = 0; if (i2c_take_by_chipid(CHIP_ID_ADN, &i2c_addr, &i2c_interf, (TickType_t)10) ) { - xI2CMasterWrite( i2c_interf, i2c_addr, update, sizeof(update) ); + tx_len = xI2CMasterWrite( i2c_interf, i2c_addr, update, sizeof(update) ); i2c_give(i2c_interf); } + + if (!tx_len) return MMC_TIMEOUT_ERR; + return MMC_OK; } -void adn4604_reset( void ) +mmc_err adn4604_reset( void ) { uint8_t i2c_addr, i2c_interf; uint8_t update[2] = { ADN_RESET_REG, 0x01 }; + uint8_t tx_len = 0; if (i2c_take_by_chipid(CHIP_ID_ADN, &i2c_addr, &i2c_interf, (TickType_t)10) ) { - xI2CMasterWrite( i2c_interf, i2c_addr, update, sizeof(update) ); + tx_len = xI2CMasterWrite( i2c_interf, i2c_addr, update, sizeof(update) ); i2c_give(i2c_interf); } + if (!tx_len) return MMC_TIMEOUT_ERR; + return MMC_OK; } -void adn4604_xpt_config( uint8_t map, adn_connect_map_t xpt_con ) +mmc_err adn4604_xpt_config( uint8_t map, adn_connect_map_t xpt_con ) { uint8_t i2c_addr, i2c_interf; + uint8_t tx_len = 0; adn_connect_cfg_t cfg = { map, xpt_con }; if (i2c_take_by_chipid(CHIP_ID_ADN, &i2c_addr, &i2c_interf, (TickType_t)10) ) { - xI2CMasterWrite( i2c_interf, i2c_addr, (uint8_t *)&cfg, sizeof(cfg) ); + tx_len = xI2CMasterWrite( i2c_interf, i2c_addr, (uint8_t *)&cfg, sizeof(cfg) ); i2c_give(i2c_interf); } + if (!tx_len) return MMC_TIMEOUT_ERR; + return MMC_OK; } -void adn4604_active_map( uint8_t map ) +mmc_err adn4604_active_map( uint8_t map ) { uint8_t i2c_addr, i2c_interf; + uint8_t tx_len = 0; /* Select the active map */ uint8_t map_sel[2] = { ADN_XPT_MAP_TABLE_SEL_REG, map }; if ( i2c_take_by_chipid( CHIP_ID_ADN, &i2c_addr, &i2c_interf, (TickType_t)10 ) ) { - xI2CMasterWrite( i2c_interf, i2c_addr, map_sel, sizeof(map_sel) ); + tx_len = xI2CMasterWrite( i2c_interf, i2c_addr, map_sel, sizeof(map_sel) ); i2c_give( i2c_interf ); } + if (!tx_len) return MMC_TIMEOUT_ERR; + return MMC_OK; } adn_connect_map_t adn4604_out_status( void ) @@ -139,13 +156,17 @@ adn_connect_map_t adn4604_out_status( void ) return stat_map; } -void adn4604_termination_ctl( uint8_t cfg ) +mmc_err adn4604_termination_ctl( uint8_t cfg ) { uint8_t i2c_addr, i2c_interf; uint8_t msg[2] = { ADN_TERMINATION_CTL_REG, (cfg & 0xF0) }; + uint8_t tx_len = 0; if ( i2c_take_by_chipid( CHIP_ID_ADN, &i2c_addr, &i2c_interf, (TickType_t)10 ) ) { - xI2CMasterWrite( i2c_interf, i2c_addr, msg, sizeof(msg) ); + tx_len = xI2CMasterWrite( i2c_interf, i2c_addr, msg, sizeof(msg) ); i2c_give( i2c_interf ); } + if (!tx_len) return MMC_TIMEOUT_ERR; + return MMC_OK; + } diff --git a/modules/adn4604.h b/modules/adn4604.h index f6b01ea99..88dbe09a5 100644 --- a/modules/adn4604.h +++ b/modules/adn4604.h @@ -36,6 +36,8 @@ #ifndef ADN4604_H_ #define ADN4604_H_ +#include "mmc_error.h" + typedef struct __attribute__((__packed__)) { #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ uint8_t out1:4, @@ -118,7 +120,7 @@ enum adn4604_tx_ctl { * @param output Output number (0 to 15) * @param tx_mode Selected mode: (TX_DISABLED, TX_STANDBY, TX_SQUELCHED or TX_ENABLED) */ -void adn4604_tx_control( uint8_t output, uint8_t tx_mode ); +mmc_err adn4604_tx_control( uint8_t output, uint8_t tx_mode ); /** * @brief Activates the current stored configuration @@ -126,12 +128,12 @@ void adn4604_tx_control( uint8_t output, uint8_t tx_mode ); * @note The Update pin has precedence over the software register, so if the Update pin is asserted, but the low-to-high step doesn't occur, you won't be able to update the IC configuration * */ -void adn4604_update( void ); +mmc_err adn4604_update( void ); /** * @brief ADN4604 Software Reset */ -void adn4604_reset( void ); +mmc_err adn4604_reset( void ); /** * @brief Configures the cross-connection map @@ -139,14 +141,14 @@ void adn4604_reset( void ); * @param map Selected map to configure (0 or 1) * @param xpt_con Outputs assignment */ -void adn4604_xpt_config( uint8_t map, adn_connect_map_t xpt_con ); +mmc_err adn4604_xpt_config( uint8_t map, adn_connect_map_t xpt_con ); /** * @brief Sets the active map on the IC * * @param map Selected map (0 or 1) */ -void adn4604_active_map( uint8_t map ); +mmc_err adn4604_active_map( uint8_t map ); /** * @brief Reads the outputs current connections @@ -160,6 +162,6 @@ adn_connect_map_t adn4604_out_status( void ); * * @param cfg Selected in/outputs (separated in quadrants defined in #adn4604_term_ctl) */ -void adn4604_termination_ctl( uint8_t cfg ); +mmc_err adn4604_termination_ctl( uint8_t cfg ); #endif diff --git a/port/board/afc-v3/payload.c b/port/board/afc-v3/payload.c index 2a3347a90..40140d442 100644 --- a/port/board/afc-v3/payload.c +++ b/port/board/afc-v3/payload.c @@ -267,10 +267,10 @@ void vTaskPayload( void *pvParameters ) */ if (state == PAYLOAD_QUIESCED) { - QUIESCED_req = 0; - } else { + QUIESCED_req = 0; + } else { QUIESCED_req = 1; - } + } xEventGroupClearBits( amc_payload_evt, PAYLOAD_MESSAGE_QUIESCE ); } @@ -313,9 +313,12 @@ void vTaskPayload( void *pvParameters ) case PAYLOAD_STATE_FPGA_SETUP: #ifdef MODULE_ADN4604 /* Configure clock switch */ - clock_configuration(); -#endif + if (clock_configuration() == MMC_OK) { + new_state = PAYLOAD_FPGA_ON; + } +#else new_state = PAYLOAD_FPGA_ON; +#endif break; case PAYLOAD_FPGA_ON: @@ -477,9 +480,10 @@ uint8_t payload_hpm_activate_firmware( void ) return IPMI_CC_OK; } -void clock_configuration() +mmc_err clock_configuration( void ) { adn_connect_map_t con; + mmc_err error; /* Read the clock configuration from the eeprom */ eeprom_24xx02_read(CHIP_ID_RTC_EEPROM, 0x0, clock_config, 16, 10); @@ -530,7 +534,10 @@ void clock_configuration() con.out14 = clock_config[14] & 0x0F; con.out15 = clock_config[15] & 0x0F; - adn4604_xpt_config( ADN_XPT_MAP0_CON_REG, con ); + error = adn4604_xpt_config( ADN_XPT_MAP0_CON_REG, con ); + if (error != MMC_OK) { + return error; + } /* Enable desired outputs */ for ( uint8_t i = 0; i < 16; i++ ) { @@ -541,8 +548,11 @@ void clock_configuration() } } - adn4604_active_map( ADN_XPT_MAP0 ); + error = adn4604_active_map( ADN_XPT_MAP0 ); + if (error != MMC_OK) { + return error; + } - adn4604_update(); + return adn4604_update(); } #endif diff --git a/port/board/afc-v3/payload.h b/port/board/afc-v3/payload.h index 3746e8e2e..1f7e68c6a 100644 --- a/port/board/afc-v3/payload.h +++ b/port/board/afc-v3/payload.h @@ -37,6 +37,7 @@ #define PAYLOAD_H_ #include "event_groups.h" +#include "mmc_error.h" /** * @brief Payload state machine state numbers @@ -114,7 +115,7 @@ uint8_t payload_hpm_activate_firmware( void ); * @brief Configure the clock switch interconects according to the configuration * saved in EEPROM */ -void clock_configuration(); +mmc_err clock_configuration( void ); #endif /* IPMI_PAYLOAD_H_ */