-
Notifications
You must be signed in to change notification settings - Fork 1.5k
/
scrypt-x64.S
2907 lines (2732 loc) · 69.7 KB
/
scrypt-x64.S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* Copyright 2011-2014 [email protected]
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include "cpuminer-config.h"
#if defined(__linux__) && defined(__ELF__)
.section .note.GNU-stack,"",%progbits
#endif
#if defined(USE_ASM) && defined(__x86_64__)
.text
.p2align 6
.globl scrypt_best_throughput
.globl _scrypt_best_throughput
scrypt_best_throughput:
_scrypt_best_throughput:
pushq %rbx
#if defined(USE_AVX2)
/* Check for AVX and OSXSAVE support */
movl $1, %eax
cpuid
andl $0x18000000, %ecx
cmpl $0x18000000, %ecx
jne scrypt_best_throughput_no_avx2
/* Check for AVX2 support */
movl $7, %eax
xorl %ecx, %ecx
cpuid
andl $0x00000020, %ebx
cmpl $0x00000020, %ebx
jne scrypt_best_throughput_no_avx2
/* Check for XMM and YMM state support */
xorl %ecx, %ecx
xgetbv
andl $0x00000006, %eax
cmpl $0x00000006, %eax
jne scrypt_best_throughput_no_avx2
movl $6, %eax
jmp scrypt_best_throughput_exit
scrypt_best_throughput_no_avx2:
#endif
/* Check for AuthenticAMD */
xorq %rax, %rax
cpuid
movl $3, %eax
cmpl $0x444d4163, %ecx
jne scrypt_best_throughput_not_amd
cmpl $0x69746e65, %edx
jne scrypt_best_throughput_not_amd
cmpl $0x68747541, %ebx
jne scrypt_best_throughput_not_amd
/* Check for AMD K8 or Bobcat */
movl $1, %eax
cpuid
andl $0x0ff00000, %eax
jz scrypt_best_throughput_one
cmpl $0x00500000, %eax
je scrypt_best_throughput_one
movl $3, %eax
jmp scrypt_best_throughput_exit
scrypt_best_throughput_not_amd:
/* Check for GenuineIntel */
cmpl $0x6c65746e, %ecx
jne scrypt_best_throughput_exit
cmpl $0x49656e69, %edx
jne scrypt_best_throughput_exit
cmpl $0x756e6547, %ebx
jne scrypt_best_throughput_exit
/* Check for Intel Atom */
movl $1, %eax
cpuid
movl %eax, %edx
andl $0x0ff00f00, %eax
cmpl $0x00000600, %eax
movl $3, %eax
jnz scrypt_best_throughput_exit
andl $0x000f00f0, %edx
cmpl $0x000100c0, %edx
je scrypt_best_throughput_one
cmpl $0x00020060, %edx
je scrypt_best_throughput_one
cmpl $0x00030060, %edx
jne scrypt_best_throughput_exit
scrypt_best_throughput_one:
movl $1, %eax
scrypt_best_throughput_exit:
popq %rbx
ret
.macro scrypt_shuffle src, so, dest, do
movl \so+60(\src), %eax
movl \so+44(\src), %ebx
movl \so+28(\src), %ecx
movl \so+12(\src), %edx
movl %eax, \do+12(\dest)
movl %ebx, \do+28(\dest)
movl %ecx, \do+44(\dest)
movl %edx, \do+60(\dest)
movl \so+40(\src), %eax
movl \so+8(\src), %ebx
movl \so+48(\src), %ecx
movl \so+16(\src), %edx
movl %eax, \do+8(\dest)
movl %ebx, \do+40(\dest)
movl %ecx, \do+16(\dest)
movl %edx, \do+48(\dest)
movl \so+20(\src), %eax
movl \so+4(\src), %ebx
movl \so+52(\src), %ecx
movl \so+36(\src), %edx
movl %eax, \do+4(\dest)
movl %ebx, \do+20(\dest)
movl %ecx, \do+36(\dest)
movl %edx, \do+52(\dest)
movl \so+0(\src), %eax
movl \so+24(\src), %ebx
movl \so+32(\src), %ecx
movl \so+56(\src), %edx
movl %eax, \do+0(\dest)
movl %ebx, \do+24(\dest)
movl %ecx, \do+32(\dest)
movl %edx, \do+56(\dest)
.endm
.macro salsa8_core_gen_doubleround
movq 72(%rsp), %r15
leaq (%r14, %rdx), %rbp
roll $7, %ebp
xorl %ebp, %r9d
leaq (%rdi, %r15), %rbp
roll $7, %ebp
xorl %ebp, %r10d
leaq (%rdx, %r9), %rbp
roll $9, %ebp
xorl %ebp, %r11d
leaq (%r15, %r10), %rbp
roll $9, %ebp
xorl %ebp, %r13d
leaq (%r9, %r11), %rbp
roll $13, %ebp
xorl %ebp, %r14d
leaq (%r10, %r13), %rbp
roll $13, %ebp
xorl %ebp, %edi
leaq (%r11, %r14), %rbp
roll $18, %ebp
xorl %ebp, %edx
leaq (%r13, %rdi), %rbp
roll $18, %ebp
xorl %ebp, %r15d
movq 48(%rsp), %rbp
movq %r15, 72(%rsp)
leaq (%rax, %rbp), %r15
roll $7, %r15d
xorl %r15d, %ebx
leaq (%rbp, %rbx), %r15
roll $9, %r15d
xorl %r15d, %ecx
leaq (%rbx, %rcx), %r15
roll $13, %r15d
xorl %r15d, %eax
leaq (%rcx, %rax), %r15
roll $18, %r15d
xorl %r15d, %ebp
movq 88(%rsp), %r15
movq %rbp, 48(%rsp)
leaq (%r12, %r15), %rbp
roll $7, %ebp
xorl %ebp, %esi
leaq (%r15, %rsi), %rbp
roll $9, %ebp
xorl %ebp, %r8d
leaq (%rsi, %r8), %rbp
roll $13, %ebp
xorl %ebp, %r12d
leaq (%r8, %r12), %rbp
roll $18, %ebp
xorl %ebp, %r15d
movq %r15, 88(%rsp)
movq 72(%rsp), %r15
leaq (%rsi, %rdx), %rbp
roll $7, %ebp
xorl %ebp, %edi
leaq (%r9, %r15), %rbp
roll $7, %ebp
xorl %ebp, %eax
leaq (%rdx, %rdi), %rbp
roll $9, %ebp
xorl %ebp, %ecx
leaq (%r15, %rax), %rbp
roll $9, %ebp
xorl %ebp, %r8d
leaq (%rdi, %rcx), %rbp
roll $13, %ebp
xorl %ebp, %esi
leaq (%rax, %r8), %rbp
roll $13, %ebp
xorl %ebp, %r9d
leaq (%rcx, %rsi), %rbp
roll $18, %ebp
xorl %ebp, %edx
leaq (%r8, %r9), %rbp
roll $18, %ebp
xorl %ebp, %r15d
movq 48(%rsp), %rbp
movq %r15, 72(%rsp)
leaq (%r10, %rbp), %r15
roll $7, %r15d
xorl %r15d, %r12d
leaq (%rbp, %r12), %r15
roll $9, %r15d
xorl %r15d, %r11d
leaq (%r12, %r11), %r15
roll $13, %r15d
xorl %r15d, %r10d
leaq (%r11, %r10), %r15
roll $18, %r15d
xorl %r15d, %ebp
movq 88(%rsp), %r15
movq %rbp, 48(%rsp)
leaq (%rbx, %r15), %rbp
roll $7, %ebp
xorl %ebp, %r14d
leaq (%r15, %r14), %rbp
roll $9, %ebp
xorl %ebp, %r13d
leaq (%r14, %r13), %rbp
roll $13, %ebp
xorl %ebp, %ebx
leaq (%r13, %rbx), %rbp
roll $18, %ebp
xorl %ebp, %r15d
movq %r15, 88(%rsp)
.endm
.text
.p2align 6
salsa8_core_gen:
/* 0: %rdx, %rdi, %rcx, %rsi */
movq 8(%rsp), %rdi
movq %rdi, %rdx
shrq $32, %rdi
movq 16(%rsp), %rsi
movq %rsi, %rcx
shrq $32, %rsi
/* 1: %r9, 72(%rsp), %rax, %r8 */
movq 24(%rsp), %r8
movq %r8, %r9
shrq $32, %r8
movq %r8, 72(%rsp)
movq 32(%rsp), %r8
movq %r8, %rax
shrq $32, %r8
/* 2: %r11, %r10, 48(%rsp), %r12 */
movq 40(%rsp), %r10
movq %r10, %r11
shrq $32, %r10
movq 48(%rsp), %r12
/* movq %r12, %r13 */
/* movq %r13, 48(%rsp) */
shrq $32, %r12
/* 3: %r14, %r13, %rbx, 88(%rsp) */
movq 56(%rsp), %r13
movq %r13, %r14
shrq $32, %r13
movq 64(%rsp), %r15
movq %r15, %rbx
shrq $32, %r15
movq %r15, 88(%rsp)
salsa8_core_gen_doubleround
salsa8_core_gen_doubleround
salsa8_core_gen_doubleround
salsa8_core_gen_doubleround
shlq $32, %rdi
xorq %rdi, %rdx
movq %rdx, 24(%rsp)
shlq $32, %rsi
xorq %rsi, %rcx
movq %rcx, 32(%rsp)
movl 72(%rsp), %edi
shlq $32, %rdi
xorq %rdi, %r9
movq %r9, 40(%rsp)
movl 48(%rsp), %ebp
shlq $32, %r8
xorq %r8, %rax
movq %rax, 48(%rsp)
shlq $32, %r10
xorq %r10, %r11
movq %r11, 56(%rsp)
shlq $32, %r12
xorq %r12, %rbp
movq %rbp, 64(%rsp)
shlq $32, %r13
xorq %r13, %r14
movq %r14, 72(%rsp)
movdqa 24(%rsp), %xmm0
shlq $32, %r15
xorq %r15, %rbx
movq %rbx, 80(%rsp)
movdqa 40(%rsp), %xmm1
movdqa 56(%rsp), %xmm2
movdqa 72(%rsp), %xmm3
ret
.text
.p2align 6
.globl scrypt_core
.globl _scrypt_core
scrypt_core:
_scrypt_core:
pushq %rbx
pushq %rbp
pushq %r12
pushq %r13
pushq %r14
pushq %r15
#if defined(_WIN64) || defined(__CYGWIN__)
subq $176, %rsp
movdqa %xmm6, 8(%rsp)
movdqa %xmm7, 24(%rsp)
movdqa %xmm8, 40(%rsp)
movdqa %xmm9, 56(%rsp)
movdqa %xmm10, 72(%rsp)
movdqa %xmm11, 88(%rsp)
movdqa %xmm12, 104(%rsp)
movdqa %xmm13, 120(%rsp)
movdqa %xmm14, 136(%rsp)
movdqa %xmm15, 152(%rsp)
pushq %rdi
pushq %rsi
movq %rcx, %rdi
movq %rdx, %rsi
#else
movq %rdx, %r8
#endif
.macro scrypt_core_cleanup
#if defined(_WIN64) || defined(__CYGWIN__)
popq %rsi
popq %rdi
movdqa 8(%rsp), %xmm6
movdqa 24(%rsp), %xmm7
movdqa 40(%rsp), %xmm8
movdqa 56(%rsp), %xmm9
movdqa 72(%rsp), %xmm10
movdqa 88(%rsp), %xmm11
movdqa 104(%rsp), %xmm12
movdqa 120(%rsp), %xmm13
movdqa 136(%rsp), %xmm14
movdqa 152(%rsp), %xmm15
addq $176, %rsp
#endif
popq %r15
popq %r14
popq %r13
popq %r12
popq %rbp
popq %rbx
.endm
/* GenuineIntel processors have fast SIMD */
xorl %eax, %eax
cpuid
cmpl $0x6c65746e, %ecx
jne scrypt_core_gen
cmpl $0x49656e69, %edx
jne scrypt_core_gen
cmpl $0x756e6547, %ebx
je scrypt_core_xmm
.p2align 6
scrypt_core_gen:
subq $136, %rsp
movdqa 0(%rdi), %xmm8
movdqa 16(%rdi), %xmm9
movdqa 32(%rdi), %xmm10
movdqa 48(%rdi), %xmm11
movdqa 64(%rdi), %xmm12
movdqa 80(%rdi), %xmm13
movdqa 96(%rdi), %xmm14
movdqa 112(%rdi), %xmm15
movq %r8, %rcx
shlq $7, %rcx
addq %rsi, %rcx
movq %r8, 96(%rsp)
movq %rdi, 104(%rsp)
movq %rsi, 112(%rsp)
movq %rcx, 120(%rsp)
scrypt_core_gen_loop1:
movdqa %xmm8, 0(%rsi)
movdqa %xmm9, 16(%rsi)
movdqa %xmm10, 32(%rsi)
movdqa %xmm11, 48(%rsi)
movdqa %xmm12, 64(%rsi)
movdqa %xmm13, 80(%rsi)
movdqa %xmm14, 96(%rsi)
movdqa %xmm15, 112(%rsi)
pxor %xmm12, %xmm8
pxor %xmm13, %xmm9
pxor %xmm14, %xmm10
pxor %xmm15, %xmm11
movdqa %xmm8, 0(%rsp)
movdqa %xmm9, 16(%rsp)
movdqa %xmm10, 32(%rsp)
movdqa %xmm11, 48(%rsp)
movq %rsi, 128(%rsp)
call salsa8_core_gen
paddd %xmm0, %xmm8
paddd %xmm1, %xmm9
paddd %xmm2, %xmm10
paddd %xmm3, %xmm11
pxor %xmm8, %xmm12
pxor %xmm9, %xmm13
pxor %xmm10, %xmm14
pxor %xmm11, %xmm15
movdqa %xmm12, 0(%rsp)
movdqa %xmm13, 16(%rsp)
movdqa %xmm14, 32(%rsp)
movdqa %xmm15, 48(%rsp)
call salsa8_core_gen
movq 128(%rsp), %rsi
paddd %xmm0, %xmm12
paddd %xmm1, %xmm13
paddd %xmm2, %xmm14
paddd %xmm3, %xmm15
addq $128, %rsi
movq 120(%rsp), %rcx
cmpq %rcx, %rsi
jne scrypt_core_gen_loop1
movq 96(%rsp), %r8
movq %r8, %rcx
subl $1, %r8d
movq %r8, 96(%rsp)
movd %xmm12, %edx
scrypt_core_gen_loop2:
movq 112(%rsp), %rsi
andl %r8d, %edx
shll $7, %edx
addq %rsi, %rdx
movdqa 0(%rdx), %xmm0
movdqa 16(%rdx), %xmm1
movdqa 32(%rdx), %xmm2
movdqa 48(%rdx), %xmm3
movdqa 64(%rdx), %xmm4
movdqa 80(%rdx), %xmm5
movdqa 96(%rdx), %xmm6
movdqa 112(%rdx), %xmm7
pxor %xmm0, %xmm8
pxor %xmm1, %xmm9
pxor %xmm2, %xmm10
pxor %xmm3, %xmm11
pxor %xmm4, %xmm12
pxor %xmm5, %xmm13
pxor %xmm6, %xmm14
pxor %xmm7, %xmm15
pxor %xmm12, %xmm8
pxor %xmm13, %xmm9
pxor %xmm14, %xmm10
pxor %xmm15, %xmm11
movdqa %xmm8, 0(%rsp)
movdqa %xmm9, 16(%rsp)
movdqa %xmm10, 32(%rsp)
movdqa %xmm11, 48(%rsp)
movq %rcx, 128(%rsp)
call salsa8_core_gen
paddd %xmm0, %xmm8
paddd %xmm1, %xmm9
paddd %xmm2, %xmm10
paddd %xmm3, %xmm11
pxor %xmm8, %xmm12
pxor %xmm9, %xmm13
pxor %xmm10, %xmm14
pxor %xmm11, %xmm15
movdqa %xmm12, 0(%rsp)
movdqa %xmm13, 16(%rsp)
movdqa %xmm14, 32(%rsp)
movdqa %xmm15, 48(%rsp)
call salsa8_core_gen
movq 96(%rsp), %r8
movq 128(%rsp), %rcx
addl 0(%rsp), %edx
paddd %xmm0, %xmm12
paddd %xmm1, %xmm13
paddd %xmm2, %xmm14
paddd %xmm3, %xmm15
subq $1, %rcx
ja scrypt_core_gen_loop2
movq 104(%rsp), %rdi
movdqa %xmm8, 0(%rdi)
movdqa %xmm9, 16(%rdi)
movdqa %xmm10, 32(%rdi)
movdqa %xmm11, 48(%rdi)
movdqa %xmm12, 64(%rdi)
movdqa %xmm13, 80(%rdi)
movdqa %xmm14, 96(%rdi)
movdqa %xmm15, 112(%rdi)
addq $136, %rsp
scrypt_core_cleanup
ret
.macro salsa8_core_xmm_doubleround
movdqa %xmm1, %xmm4
paddd %xmm0, %xmm4
movdqa %xmm4, %xmm5
pslld $7, %xmm4
psrld $25, %xmm5
pxor %xmm4, %xmm3
movdqa %xmm0, %xmm4
pxor %xmm5, %xmm3
paddd %xmm3, %xmm4
movdqa %xmm4, %xmm5
pslld $9, %xmm4
psrld $23, %xmm5
pxor %xmm4, %xmm2
movdqa %xmm3, %xmm4
pxor %xmm5, %xmm2
pshufd $0x93, %xmm3, %xmm3
paddd %xmm2, %xmm4
movdqa %xmm4, %xmm5
pslld $13, %xmm4
psrld $19, %xmm5
pxor %xmm4, %xmm1
movdqa %xmm2, %xmm4
pxor %xmm5, %xmm1
pshufd $0x4e, %xmm2, %xmm2
paddd %xmm1, %xmm4
movdqa %xmm4, %xmm5
pslld $18, %xmm4
psrld $14, %xmm5
pxor %xmm4, %xmm0
movdqa %xmm3, %xmm4
pxor %xmm5, %xmm0
pshufd $0x39, %xmm1, %xmm1
paddd %xmm0, %xmm4
movdqa %xmm4, %xmm5
pslld $7, %xmm4
psrld $25, %xmm5
pxor %xmm4, %xmm1
movdqa %xmm0, %xmm4
pxor %xmm5, %xmm1
paddd %xmm1, %xmm4
movdqa %xmm4, %xmm5
pslld $9, %xmm4
psrld $23, %xmm5
pxor %xmm4, %xmm2
movdqa %xmm1, %xmm4
pxor %xmm5, %xmm2
pshufd $0x93, %xmm1, %xmm1
paddd %xmm2, %xmm4
movdqa %xmm4, %xmm5
pslld $13, %xmm4
psrld $19, %xmm5
pxor %xmm4, %xmm3
movdqa %xmm2, %xmm4
pxor %xmm5, %xmm3
pshufd $0x4e, %xmm2, %xmm2
paddd %xmm3, %xmm4
movdqa %xmm4, %xmm5
pslld $18, %xmm4
psrld $14, %xmm5
pxor %xmm4, %xmm0
pshufd $0x39, %xmm3, %xmm3
pxor %xmm5, %xmm0
.endm
.macro salsa8_core_xmm
salsa8_core_xmm_doubleround
salsa8_core_xmm_doubleround
salsa8_core_xmm_doubleround
salsa8_core_xmm_doubleround
.endm
.p2align 6
scrypt_core_xmm:
pcmpeqw %xmm1, %xmm1
psrlq $32, %xmm1
movdqa 0(%rdi), %xmm8
movdqa 16(%rdi), %xmm11
movdqa 32(%rdi), %xmm10
movdqa 48(%rdi), %xmm9
movdqa %xmm8, %xmm0
pxor %xmm11, %xmm8
pand %xmm1, %xmm8
pxor %xmm11, %xmm8
pxor %xmm10, %xmm11
pand %xmm1, %xmm11
pxor %xmm10, %xmm11
pxor %xmm9, %xmm10
pand %xmm1, %xmm10
pxor %xmm9, %xmm10
pxor %xmm0, %xmm9
pand %xmm1, %xmm9
pxor %xmm0, %xmm9
movdqa %xmm8, %xmm0
pshufd $0x4e, %xmm10, %xmm10
punpcklqdq %xmm10, %xmm8
punpckhqdq %xmm0, %xmm10
movdqa %xmm11, %xmm0
pshufd $0x4e, %xmm9, %xmm9
punpcklqdq %xmm9, %xmm11
punpckhqdq %xmm0, %xmm9
movdqa 64(%rdi), %xmm12
movdqa 80(%rdi), %xmm15
movdqa 96(%rdi), %xmm14
movdqa 112(%rdi), %xmm13
movdqa %xmm12, %xmm0
pxor %xmm15, %xmm12
pand %xmm1, %xmm12
pxor %xmm15, %xmm12
pxor %xmm14, %xmm15
pand %xmm1, %xmm15
pxor %xmm14, %xmm15
pxor %xmm13, %xmm14
pand %xmm1, %xmm14
pxor %xmm13, %xmm14
pxor %xmm0, %xmm13
pand %xmm1, %xmm13
pxor %xmm0, %xmm13
movdqa %xmm12, %xmm0
pshufd $0x4e, %xmm14, %xmm14
punpcklqdq %xmm14, %xmm12
punpckhqdq %xmm0, %xmm14
movdqa %xmm15, %xmm0
pshufd $0x4e, %xmm13, %xmm13
punpcklqdq %xmm13, %xmm15
punpckhqdq %xmm0, %xmm13
movq %rsi, %rdx
movq %r8, %rcx
shlq $7, %rcx
addq %rsi, %rcx
scrypt_core_xmm_loop1:
pxor %xmm12, %xmm8
pxor %xmm13, %xmm9
pxor %xmm14, %xmm10
pxor %xmm15, %xmm11
movdqa %xmm8, 0(%rdx)
movdqa %xmm9, 16(%rdx)
movdqa %xmm10, 32(%rdx)
movdqa %xmm11, 48(%rdx)
movdqa %xmm12, 64(%rdx)
movdqa %xmm13, 80(%rdx)
movdqa %xmm14, 96(%rdx)
movdqa %xmm15, 112(%rdx)
movdqa %xmm8, %xmm0
movdqa %xmm9, %xmm1
movdqa %xmm10, %xmm2
movdqa %xmm11, %xmm3
salsa8_core_xmm
paddd %xmm0, %xmm8
paddd %xmm1, %xmm9
paddd %xmm2, %xmm10
paddd %xmm3, %xmm11
pxor %xmm8, %xmm12
pxor %xmm9, %xmm13
pxor %xmm10, %xmm14
pxor %xmm11, %xmm15
movdqa %xmm12, %xmm0
movdqa %xmm13, %xmm1
movdqa %xmm14, %xmm2
movdqa %xmm15, %xmm3
salsa8_core_xmm
paddd %xmm0, %xmm12
paddd %xmm1, %xmm13
paddd %xmm2, %xmm14
paddd %xmm3, %xmm15
addq $128, %rdx
cmpq %rcx, %rdx
jne scrypt_core_xmm_loop1
movq %r8, %rcx
subl $1, %r8d
scrypt_core_xmm_loop2:
movd %xmm12, %edx
andl %r8d, %edx
shll $7, %edx
pxor 0(%rsi, %rdx), %xmm8
pxor 16(%rsi, %rdx), %xmm9
pxor 32(%rsi, %rdx), %xmm10
pxor 48(%rsi, %rdx), %xmm11
pxor %xmm12, %xmm8
pxor %xmm13, %xmm9
pxor %xmm14, %xmm10
pxor %xmm15, %xmm11
movdqa %xmm8, %xmm0
movdqa %xmm9, %xmm1
movdqa %xmm10, %xmm2
movdqa %xmm11, %xmm3
salsa8_core_xmm
paddd %xmm0, %xmm8
paddd %xmm1, %xmm9
paddd %xmm2, %xmm10
paddd %xmm3, %xmm11
pxor 64(%rsi, %rdx), %xmm12
pxor 80(%rsi, %rdx), %xmm13
pxor 96(%rsi, %rdx), %xmm14
pxor 112(%rsi, %rdx), %xmm15
pxor %xmm8, %xmm12
pxor %xmm9, %xmm13
pxor %xmm10, %xmm14
pxor %xmm11, %xmm15
movdqa %xmm12, %xmm0
movdqa %xmm13, %xmm1
movdqa %xmm14, %xmm2
movdqa %xmm15, %xmm3
salsa8_core_xmm
paddd %xmm0, %xmm12
paddd %xmm1, %xmm13
paddd %xmm2, %xmm14
paddd %xmm3, %xmm15
subq $1, %rcx
ja scrypt_core_xmm_loop2
pcmpeqw %xmm1, %xmm1
psrlq $32, %xmm1
movdqa %xmm8, %xmm0
pxor %xmm9, %xmm8
pand %xmm1, %xmm8
pxor %xmm9, %xmm8
pxor %xmm10, %xmm9
pand %xmm1, %xmm9
pxor %xmm10, %xmm9
pxor %xmm11, %xmm10
pand %xmm1, %xmm10
pxor %xmm11, %xmm10
pxor %xmm0, %xmm11
pand %xmm1, %xmm11
pxor %xmm0, %xmm11
movdqa %xmm8, %xmm0
pshufd $0x4e, %xmm10, %xmm10
punpcklqdq %xmm10, %xmm8
punpckhqdq %xmm0, %xmm10
movdqa %xmm9, %xmm0
pshufd $0x4e, %xmm11, %xmm11
punpcklqdq %xmm11, %xmm9
punpckhqdq %xmm0, %xmm11
movdqa %xmm8, 0(%rdi)
movdqa %xmm11, 16(%rdi)
movdqa %xmm10, 32(%rdi)
movdqa %xmm9, 48(%rdi)
movdqa %xmm12, %xmm0
pxor %xmm13, %xmm12
pand %xmm1, %xmm12
pxor %xmm13, %xmm12
pxor %xmm14, %xmm13
pand %xmm1, %xmm13
pxor %xmm14, %xmm13
pxor %xmm15, %xmm14
pand %xmm1, %xmm14
pxor %xmm15, %xmm14
pxor %xmm0, %xmm15
pand %xmm1, %xmm15
pxor %xmm0, %xmm15
movdqa %xmm12, %xmm0
pshufd $0x4e, %xmm14, %xmm14
punpcklqdq %xmm14, %xmm12
punpckhqdq %xmm0, %xmm14
movdqa %xmm13, %xmm0
pshufd $0x4e, %xmm15, %xmm15
punpcklqdq %xmm15, %xmm13
punpckhqdq %xmm0, %xmm15
movdqa %xmm12, 64(%rdi)
movdqa %xmm15, 80(%rdi)
movdqa %xmm14, 96(%rdi)
movdqa %xmm13, 112(%rdi)
scrypt_core_cleanup
ret
#if defined(USE_AVX)
.macro salsa8_core_3way_avx_doubleround
vpaddd %xmm0, %xmm1, %xmm4
vpaddd %xmm8, %xmm9, %xmm6
vpaddd %xmm12, %xmm13, %xmm7
vpslld $7, %xmm4, %xmm5
vpsrld $25, %xmm4, %xmm4
vpxor %xmm5, %xmm3, %xmm3
vpxor %xmm4, %xmm3, %xmm3
vpslld $7, %xmm6, %xmm5
vpsrld $25, %xmm6, %xmm6
vpxor %xmm5, %xmm11, %xmm11
vpxor %xmm6, %xmm11, %xmm11
vpslld $7, %xmm7, %xmm5
vpsrld $25, %xmm7, %xmm7
vpxor %xmm5, %xmm15, %xmm15
vpxor %xmm7, %xmm15, %xmm15
vpaddd %xmm3, %xmm0, %xmm4
vpaddd %xmm11, %xmm8, %xmm6
vpaddd %xmm15, %xmm12, %xmm7
vpslld $9, %xmm4, %xmm5
vpsrld $23, %xmm4, %xmm4
vpxor %xmm5, %xmm2, %xmm2
vpxor %xmm4, %xmm2, %xmm2
vpslld $9, %xmm6, %xmm5
vpsrld $23, %xmm6, %xmm6
vpxor %xmm5, %xmm10, %xmm10
vpxor %xmm6, %xmm10, %xmm10
vpslld $9, %xmm7, %xmm5
vpsrld $23, %xmm7, %xmm7
vpxor %xmm5, %xmm14, %xmm14
vpxor %xmm7, %xmm14, %xmm14
vpaddd %xmm2, %xmm3, %xmm4
vpaddd %xmm10, %xmm11, %xmm6
vpaddd %xmm14, %xmm15, %xmm7
vpslld $13, %xmm4, %xmm5
vpsrld $19, %xmm4, %xmm4
vpshufd $0x93, %xmm3, %xmm3
vpshufd $0x93, %xmm11, %xmm11
vpshufd $0x93, %xmm15, %xmm15
vpxor %xmm5, %xmm1, %xmm1
vpxor %xmm4, %xmm1, %xmm1
vpslld $13, %xmm6, %xmm5
vpsrld $19, %xmm6, %xmm6
vpxor %xmm5, %xmm9, %xmm9
vpxor %xmm6, %xmm9, %xmm9
vpslld $13, %xmm7, %xmm5
vpsrld $19, %xmm7, %xmm7
vpxor %xmm5, %xmm13, %xmm13
vpxor %xmm7, %xmm13, %xmm13
vpaddd %xmm1, %xmm2, %xmm4
vpaddd %xmm9, %xmm10, %xmm6
vpaddd %xmm13, %xmm14, %xmm7
vpslld $18, %xmm4, %xmm5
vpsrld $14, %xmm4, %xmm4
vpshufd $0x4e, %xmm2, %xmm2
vpshufd $0x4e, %xmm10, %xmm10
vpshufd $0x4e, %xmm14, %xmm14
vpxor %xmm5, %xmm0, %xmm0
vpxor %xmm4, %xmm0, %xmm0
vpslld $18, %xmm6, %xmm5
vpsrld $14, %xmm6, %xmm6
vpxor %xmm5, %xmm8, %xmm8
vpxor %xmm6, %xmm8, %xmm8
vpslld $18, %xmm7, %xmm5
vpsrld $14, %xmm7, %xmm7
vpxor %xmm5, %xmm12, %xmm12
vpxor %xmm7, %xmm12, %xmm12
vpaddd %xmm0, %xmm3, %xmm4
vpaddd %xmm8, %xmm11, %xmm6
vpaddd %xmm12, %xmm15, %xmm7
vpslld $7, %xmm4, %xmm5
vpsrld $25, %xmm4, %xmm4
vpshufd $0x39, %xmm1, %xmm1
vpxor %xmm5, %xmm1, %xmm1
vpxor %xmm4, %xmm1, %xmm1
vpslld $7, %xmm6, %xmm5
vpsrld $25, %xmm6, %xmm6
vpshufd $0x39, %xmm9, %xmm9
vpxor %xmm5, %xmm9, %xmm9
vpxor %xmm6, %xmm9, %xmm9
vpslld $7, %xmm7, %xmm5
vpsrld $25, %xmm7, %xmm7
vpshufd $0x39, %xmm13, %xmm13
vpxor %xmm5, %xmm13, %xmm13
vpxor %xmm7, %xmm13, %xmm13
vpaddd %xmm1, %xmm0, %xmm4
vpaddd %xmm9, %xmm8, %xmm6
vpaddd %xmm13, %xmm12, %xmm7
vpslld $9, %xmm4, %xmm5
vpsrld $23, %xmm4, %xmm4
vpxor %xmm5, %xmm2, %xmm2
vpxor %xmm4, %xmm2, %xmm2
vpslld $9, %xmm6, %xmm5
vpsrld $23, %xmm6, %xmm6
vpxor %xmm5, %xmm10, %xmm10
vpxor %xmm6, %xmm10, %xmm10
vpslld $9, %xmm7, %xmm5
vpsrld $23, %xmm7, %xmm7
vpxor %xmm5, %xmm14, %xmm14
vpxor %xmm7, %xmm14, %xmm14
vpaddd %xmm2, %xmm1, %xmm4
vpaddd %xmm10, %xmm9, %xmm6
vpaddd %xmm14, %xmm13, %xmm7
vpslld $13, %xmm4, %xmm5
vpsrld $19, %xmm4, %xmm4
vpshufd $0x93, %xmm1, %xmm1
vpshufd $0x93, %xmm9, %xmm9
vpshufd $0x93, %xmm13, %xmm13
vpxor %xmm5, %xmm3, %xmm3
vpxor %xmm4, %xmm3, %xmm3
vpslld $13, %xmm6, %xmm5
vpsrld $19, %xmm6, %xmm6
vpxor %xmm5, %xmm11, %xmm11
vpxor %xmm6, %xmm11, %xmm11
vpslld $13, %xmm7, %xmm5
vpsrld $19, %xmm7, %xmm7
vpxor %xmm5, %xmm15, %xmm15
vpxor %xmm7, %xmm15, %xmm15
vpaddd %xmm3, %xmm2, %xmm4
vpaddd %xmm11, %xmm10, %xmm6
vpaddd %xmm15, %xmm14, %xmm7
vpslld $18, %xmm4, %xmm5
vpsrld $14, %xmm4, %xmm4
vpshufd $0x4e, %xmm2, %xmm2
vpshufd $0x4e, %xmm10, %xmm10
vpxor %xmm5, %xmm0, %xmm0
vpxor %xmm4, %xmm0, %xmm0
vpslld $18, %xmm6, %xmm5
vpsrld $14, %xmm6, %xmm6
vpshufd $0x4e, %xmm14, %xmm14
vpshufd $0x39, %xmm11, %xmm11
vpxor %xmm5, %xmm8, %xmm8
vpxor %xmm6, %xmm8, %xmm8
vpslld $18, %xmm7, %xmm5
vpsrld $14, %xmm7, %xmm7
vpshufd $0x39, %xmm3, %xmm3
vpshufd $0x39, %xmm15, %xmm15
vpxor %xmm5, %xmm12, %xmm12
vpxor %xmm7, %xmm12, %xmm12
.endm