alignas proposal #154
alignas proposal #154
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Subject: Re: [microsoft/hlsl-specs] [0013] alignas proposal (PR #154)
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@mapodaca-nv Do you know what SPIR-V you would want to generate for this? Will you require any changes to the spir-v spec? |
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I removed the number from the title. Proposal numbers are assigned when they are approved for merging. |
Structures in SPIR-V are already explicitly laid out using Offset and ArrayStride decorations on the structure members, so no SPIR-V change should be needed to support this. The frontend compiler would have to handle alignas and use it in its calculation of the offsets and strides. |
proposals/0013-alignas.md
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| # HLSL alignas Specifier | ||
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| * Proposal: [0013](0013-alignas.md) |
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Use NNNN instead of 0013 until just before this merges, and you pick the next available number.
Okay, this will potentially lose the alignment requirement for standalone variables. See https://godbolt.org/z/MnrrTv86M as an example. This is a common use case, which is explicitly used in the example uses here. Also, an offset and stride do not guarentee alignment. If the alignment of the start of the array is off, then the array stride will guarentee that every element has the wrong alignment. I think the spir-v side of these seem to be thought out more. I like the idea, and think it will be useful, but we are not able to implement it. Now that I think about it, @cassiebeckley do we have the same problem with the SpirvType proposal? |
The alignas specifier also applies to the structure itself, not just its members, which does affect the alignment of the structure within an array. There is also an expectation for structured buffers that the alignment in memory matches what was specified in HLSL. |
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Hello! Seems like I'll be looking into this. Taking this code: struct alignas(64) MyStruct {
float field1;
alignas(16) float field2;
};
RWStructuredBuffer<MyStruct> input;
RWStructuredBuffer<MyStruct> output;
void main() {
MyStruct tmp = input[10];
output[10] = tmp;
}What I believe can be handled on the SPIR-V side (assuming the Vulkan API usage is correct):
The only bit that we cannot to my knowledge represent in SPIR-V is an aligned @mapodaca-nv : would those limitations be OK? Or shall we see if a new decoration shall be added to SPIR-V to also require local variables to have some kind of alignment? |
The primary intent of alignas is to declare how structures are laid out in memory, in order to utilize optimal load and store hardware. Therefore, it should be acceptable if the specification is relaxed to say that alignas is allowed on structure declarations for local variables, but has no affect on the layout in hardware registers. From @jeffbolznv:
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Cool, thanks for the details. So on the SPIR-V side, as long as we ignore this attribute when it's not related to a memory buffer, and assume correct API usage for initial buffer alignment, I don't see any issues with this proposal. |
| float3 bar; | ||
| alignas(16) uint baz; // 16-byte aligned member | ||
| }; | ||
| static_assert(sizeof(Foo) == 32); |
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RawBufferLoad is a SPIR-V only thing, and this proposal also targets that.
would be nice if static_assert got implemented in the SPIR-V backend (currently only works in DXIL).
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While we're here, could we get |
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