diff --git a/.github/workflows/ci-qemu.yml b/.github/workflows/ci-qemu.yml
new file mode 100644
index 0000000..5a7994d
--- /dev/null
+++ b/.github/workflows/ci-qemu.yml
@@ -0,0 +1,77 @@
+name: ci-qemu
+on:
+  push:
+    branches: [master]
+    paths:
+      - '.github/workflows/ci-qemu.yml'
+      - '*.h'
+      - '*.c'
+  pull_request:
+    branches: [master]
+    paths:
+      - '.github/workflows/ci-qemu.yml'
+      - '*.h'
+      - '*.c'
+concurrency:
+  group: ci-qemu-${{ github.ref }}
+  cancel-in-progress: true
+permissions:
+  contents: read
+
+jobs:
+  ubuntu:
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v4
+
+    - name: cross-toolchain
+      run: |
+        sudo apt-get update
+        sudo apt-get install qemu-user-static \
+            gcc-arm-linux-gnueabi \
+            gcc-aarch64-linux-gnu \
+            gcc-mipsel-linux-gnu \
+            gcc-mips64el-linux-gnuabi64 \
+            gcc-powerpc-linux-gnu \
+            gcc-powerpc64le-linux-gnu \
+            gcc-riscv64-linux-gnu
+
+    - name: build-test-arm-thumb
+      run: |
+        arm-linux-gnueabi-gcc -march=armv7-a -mthumb main.c -o ruapu-arm-thumb
+        qemu-arm-static -L /usr/arm-linux-gnueabi ./ruapu-arm-thumb
+
+    - name: build-test-arm
+      run: |
+        arm-linux-gnueabi-gcc -march=armv7-a -marm main.c -o ruapu-arm
+        qemu-arm-static -L /usr/arm-linux-gnueabi ./ruapu-arm
+
+    - name: build-test-aarch64
+      run: |
+        aarch64-linux-gnu-gcc -march=armv8-a main.c -o ruapu-aarch64
+        qemu-aarch64-static -L /usr/aarch64-linux-gnu ./ruapu-aarch64
+
+    - name: build-test-mipsel
+      run: |
+        mipsel-linux-gnu-gcc -march=mips32 main.c -o ruapu-mipsel
+        qemu-mipsel-static -L /usr/mipsel-linux-gnu ./ruapu-mipsel
+
+    - name: build-test-mips64el
+      run: |
+        mips64el-linux-gnuabi64-gcc -march=mips64 main.c -o ruapu-mips64el
+        qemu-mips64el-static -L /usr/mips64el-linux-gnuabi64 ./ruapu-mips64el
+
+    - name: build-test-powerpc
+      run: |
+        powerpc-linux-gnu-gcc -mcpu=powerpc main.c -o ruapu-powerpc
+        qemu-ppc-static -L /usr/powerpc-linux-gnu ./ruapu-powerpc
+
+    - name: build-test-powerpc64le
+      run: |
+        powerpc64le-linux-gnu-gcc -mcpu=powerpc64le main.c -o ruapu-powerpc64le
+        qemu-ppc64le-static -L /usr/powerpc64le-linux-gnu ./ruapu-powerpc64le
+
+    - name: build-test-riscv64
+      run: |
+        riscv64-linux-gnu-gcc -march=rv64gc main.c -o ruapu-riscv64
+        qemu-riscv64-static -L /usr/riscv64-linux-gnu ./ruapu-riscv64
diff --git a/ruapu.h b/ruapu.h
index 6f8d26e..2fa047f 100644
--- a/ruapu.h
+++ b/ruapu.h
@@ -67,10 +67,18 @@ static int ruapu_detect_isa(const void* some_inst)
 #endif
 
 #elif __arm__ || defined(_M_ARM)
+#if __thumb__
 #ifdef _MSC_VER
 #define RUAPU_INSTCODE(isa, ...) __pragma(section(".text")) __declspec(allocate(".text")) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0x4770 };
 #else
-#define RUAPU_INSTCODE(isa, ...) __attribute__((section(".text"))) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0x4770bf00 };
+#define RUAPU_INSTCODE(isa, ...) __attribute__((section(".text"))) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0x4770 };
+#endif
+#else
+#ifdef _MSC_VER
+#define RUAPU_INSTCODE(isa, ...) __pragma(section(".text")) __declspec(allocate(".text")) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0xe12fff1e };
+#else
+#define RUAPU_INSTCODE(isa, ...) __attribute__((section(".text"))) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0xe12fff1e };
+#endif
 #endif
 
 #endif
@@ -176,10 +184,15 @@ RUAPU_INSTCODE(svei8mm, 0x45009800) // smmla z0.s,z0.b,z0.b
 RUAPU_INSTCODE(svef32mm, 0x64a0e400) // fmmla z0.s,z0.s,z0.s
 
 #elif __arm__ || defined(_M_ARM)
-RUAPU_INSTCODE(edsp, 0x0000fb20) // smlad r0,r0,r0,r0
-RUAPU_INSTCODE(neon, 0x0d40ef00) // vadd.f32 q0,q0,q0
-RUAPU_INSTCODE(vfpv4, 0x0600ffb6) // vcvt.f16.f32 d0,q0
-
+#if __thumb__
+RUAPU_INSTCODE(edsp, 0xfb20, 0x0000) // smlad r0,r0,r0,r0
+RUAPU_INSTCODE(neon, 0xef00, 0x0d40) // vadd.f32 q0,q0,q0
+RUAPU_INSTCODE(vfpv4, 0xffb6, 0x0600) // vcvt.f16.f32 d0,q0
+#else
+RUAPU_INSTCODE(edsp, 0xe7000010) // smlad r0,r0,r0,r0
+RUAPU_INSTCODE(neon, 0xf2000d40) // vadd.f32 q0,q0,q0
+RUAPU_INSTCODE(vfpv4, 0xf3b60600) // vcvt.f16.f32 d0,q0
+#endif
 #endif
 
 #undef RUAPU_INSTCODE