From 82f393c514c749bd5a69603b626208c7c78920dc Mon Sep 17 00:00:00 2001
From: Andrei Fedorov <andrey.fedorov@intel.com>
Date: Fri, 14 Jun 2024 11:12:20 +0200
Subject: [PATCH] [RNG] Add explicit cast to T for operator<< of sycl::vec<T,
 1> usage #4396 (#512)

---
 include/oneapi/mkl/rng/device/detail/mcg59_impl.hpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/oneapi/mkl/rng/device/detail/mcg59_impl.hpp b/include/oneapi/mkl/rng/device/detail/mcg59_impl.hpp
index 0c2a11b31..bc21eb607 100644
--- a/include/oneapi/mkl/rng/device/detail/mcg59_impl.hpp
+++ b/include/oneapi/mkl/rng/device/detail/mcg59_impl.hpp
@@ -197,10 +197,10 @@ class engine_base<oneapi::mkl::rng::device::mcg59<VecSize>> {
             auto uni_res2 = mcg59_impl::generate(this->state_);
 
             if constexpr (VecSize == 1) {
-                uni_res1 >>= 27;
-                uni_res2 >>= 27;
+                uni_res1 >>= UIntType(27);
+                uni_res2 >>= UIntType(27);
 
-                return (uni_res2 << 32) + uni_res1;
+                return (uni_res2 << UIntType(32)) + uni_res1;
             }
             else {
                 sycl::vec<std::uint64_t, VecSize> vec_out;