diff --git a/benches/throughput/aarch64.svg b/benches/throughput/aarch64.svg
index cf6ef17..7163e0e 100644
--- a/benches/throughput/aarch64.svg
+++ b/benches/throughput/aarch64.svg
@@ -3,11 +3,9 @@
Throughput (aarch64)
-
-
-
-
-
+
+
+
Throughput (MiB/s)
@@ -28,32 +26,22 @@ Input Size (bytes)
-
-
-
-
-
+
+
+
-
-1
-
-
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-10
-
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100
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1000
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10000
-
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4
@@ -111,14 +99,14 @@ Input Size (bytes)
32768
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-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
diff --git a/benches/throughput/x86_64-hybrid.svg b/benches/throughput/x86_64-hybrid.svg
index 964d318..1eaac88 100644
--- a/benches/throughput/x86_64-hybrid.svg
+++ b/benches/throughput/x86_64-hybrid.svg
@@ -3,12 +3,10 @@
Throughput (x86_64-hybrid)
-
-
-
-
-
-
+
+
+
+
Throughput (MiB/s)
@@ -29,37 +27,27 @@ Input Size (bytes)
-
-
-
-
-
-
+
+
+
+
-
-1
-
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-10
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-
-
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100
-
-
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1000
-
-
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10000
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-
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100000
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4
@@ -117,14 +105,14 @@ Input Size (bytes)
32768
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-
-
-
-
-
-
-
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+
+
+
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diff --git a/benches/throughput/x86_64.svg b/benches/throughput/x86_64.svg
index c03578b..5157559 100644
--- a/benches/throughput/x86_64.svg
+++ b/benches/throughput/x86_64.svg
@@ -3,12 +3,9 @@
Throughput (x86_64)
-
-
-
-
-
-
+
+
+
Throughput (MiB/s)
@@ -29,37 +26,22 @@ Input Size (bytes)
-
-
-
-
-
-
+
+
+
-
-1
-
-
-
-10
-
-
-
-100
-
-
-
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1000
-
-
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+
10000
-
-
+
+
100000
-
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4
@@ -117,14 +99,14 @@ Input Size (bytes)
32768
-
-
-
-
-
-
-
-
+
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+
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+
diff --git a/src/gxhash/platform/arm.rs b/src/gxhash/platform/arm.rs
index 459ea29..0aba171 100644
--- a/src/gxhash/platform/arm.rs
+++ b/src/gxhash/platform/arm.rs
@@ -25,7 +25,7 @@ pub unsafe fn load_unaligned(p: *const State) -> State {
vld1q_s8(p as *const i8)
}
-#[inline(always)]
+#[inline(never)]
pub unsafe fn get_partial_safe(data: *const State, len: usize) -> State {
// Temporary buffer filled with zeros
let mut buffer = [0i8; VECTOR_SIZE];
diff --git a/src/gxhash/platform/x86.rs b/src/gxhash/platform/x86.rs
index 43e2960..84eba63 100644
--- a/src/gxhash/platform/x86.rs
+++ b/src/gxhash/platform/x86.rs
@@ -1,8 +1,8 @@
#[cfg(not(any(all(target_feature = "aes", target_feature = "sse2"), docsrs)))] // docs.rs bypasses the target_feature check
compile_error!{"Gxhash requires aes and sse2 intrinsics. Make sure the processor supports it and build with RUSTFLAGS=\"-C target-cpu=native\" or RUSTFLAGS=\"-C target-feature=+aes,+sse2\"."}
-#[cfg(all(feature = "hybrid", not(any(target_feature = "aes", target_feature = "vaes", target_feature = "avx2"))))]
-compile_error!{"Hybrid feature is only available on x86 processors with avx2 and vaes intrinsics."}
+#[cfg(all(feature = "hybrid", not(all(target_feature = "aes", target_feature = "sse2", target_feature = "avx2"))))]
+compile_error!{"Hybrid feature is only available on x86 processors with avx2 intrinsics."}
#[cfg(target_arch = "x86")]
use core::arch::x86::*;
@@ -28,7 +28,7 @@ pub unsafe fn load_unaligned(p: *const State) -> State {
_mm_loadu_si128(p)
}
-#[inline(always)]
+#[inline(never)]
pub unsafe fn get_partial_safe(data: *const State, len: usize) -> State {
// Temporary buffer filled with zeros
let mut buffer = [0i8; VECTOR_SIZE];