This repository has been archived by the owner on May 20, 2022. It is now read-only.
forked from olix86/INF8505_DES_ASIP
-
Notifications
You must be signed in to change notification settings - Fork 0
/
s_tables_4bits
39 lines (32 loc) · 7.83 KB
/
s_tables_4bits
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
val s1_row0 = Vec(14.asUInt(4.W),4.asUInt(4.W),13.asUInt(4.W),1.asUInt(4.W),2.asUInt(4.W),15.asUInt(4.W),11.asUInt(4.W),8.asUInt(4.W),3.asUInt(4.W),10.asUInt(4.W),6.asUInt(4.W),12.asUInt(4.W),5.asUInt(4.W),9.asUInt(4.W),0.asUInt(4.W),7.asUInt(4.W))
val s1_row1 = Vec(0.asUInt(4.W),15.asUInt(4.W),7.asUInt(4.W),4.asUInt(4.W),14.asUInt(4.W),2.asUInt(4.W),13.asUInt(4.W),1.asUInt(4.W),10.asUInt(4.W),6.asUInt(4.W),12.asUInt(4.W),11.asUInt(4.W),9.asUInt(4.W),5.asUInt(4.W),3.asUInt(4.W),8.asUInt(4.W))
val s1_row2 = Vec(4.asUInt(4.W),1.asUInt(4.W),14.asUInt(4.W),8.asUInt(4.W),13.asUInt(4.W),6.asUInt(4.W),2.asUInt(4.W),11.asUInt(4.W),15.asUInt(4.W),12.asUInt(4.W),9.asUInt(4.W),7.asUInt(4.W),3.asUInt(4.W),10.asUInt(4.W),5.asUInt(4.W),0.asUInt(4.W))
val s1_row3 = Vec(15.asUInt(4.W),12.asUInt(4.W),8.asUInt(4.W),2.asUInt(4.W),4.asUInt(4.W),9.asUInt(4.W),1.asUInt(4.W),7.asUInt(4.W),5.asUInt(4.W),11.asUInt(4.W),3.asUInt(4.W),14.asUInt(4.W),10.asUInt(4.W),0.asUInt(4.W),6.asUInt(4.W),13.asUInt(4.W))
val s2_row0 = Vec(15.asUInt(4.W),1.asUInt(4.W),8.asUInt(4.W),14.asUInt(4.W),6.asUInt(4.W),11.asUInt(4.W),3.asUInt(4.W),4.asUInt(4.W),9.asUInt(4.W),7.asUInt(4.W),2.asUInt(4.W),13.asUInt(4.W),12.asUInt(4.W),0.asUInt(4.W),5.asUInt(4.W),10.asUInt(4.W))
val s2_row1 = Vec(3.asUInt(4.W),13.asUInt(4.W),4.asUInt(4.W),7.asUInt(4.W),15.asUInt(4.W),2.asUInt(4.W),8.asUInt(4.W),14.asUInt(4.W),12.asUInt(4.W),0.asUInt(4.W),1.asUInt(4.W),10.asUInt(4.W),6.asUInt(4.W),9.asUInt(4.W),11.asUInt(4.W),5.asUInt(4.W))
val s2_row2 = Vec(0.asUInt(4.W),14.asUInt(4.W),7.asUInt(4.W),11.asUInt(4.W),10.asUInt(4.W),4.asUInt(4.W),13.asUInt(4.W),1.asUInt(4.W),5.asUInt(4.W),8.asUInt(4.W),12.asUInt(4.W),6.asUInt(4.W),9.asUInt(4.W),3.asUInt(4.W),2.asUInt(4.W),15.asUInt(4.W))
val s2_row3 = Vec(13.asUInt(4.W),8.asUInt(4.W),10.asUInt(4.W),1.asUInt(4.W),3.asUInt(4.W),15.asUInt(4.W),4.asUInt(4.W),2.asUInt(4.W),11.asUInt(4.W),6.asUInt(4.W),7.asUInt(4.W),12.asUInt(4.W),0.asUInt(4.W),5.asUInt(4.W),14.asUInt(4.W),9.asUInt(4.W))
val s3_row0 = Vec(10.asUInt(4.W),0.asUInt(4.W),9.asUInt(4.W),14.asUInt(4.W),6.asUInt(4.W),3.asUInt(4.W),15.asUInt(4.W),5.asUInt(4.W),1.asUInt(4.W),13.asUInt(4.W),12.asUInt(4.W),7.asUInt(4.W),11.asUInt(4.W),4.asUInt(4.W),2.asUInt(4.W),8.asUInt(4.W))
val s3_row1 = Vec(13.asUInt(4.W),7.asUInt(4.W),0.asUInt(4.W),9.asUInt(4.W),3.asUInt(4.W),4.asUInt(4.W),6.asUInt(4.W),10.asUInt(4.W),2.asUInt(4.W),8.asUInt(4.W),5.asUInt(4.W),14.asUInt(4.W),12.asUInt(4.W),11.asUInt(4.W),15.asUInt(4.W),1.asUInt(4.W))
val s3_row2 = Vec(13.asUInt(4.W),6.asUInt(4.W),4.asUInt(4.W),9.asUInt(4.W),8.asUInt(4.W),15.asUInt(4.W),3.asUInt(4.W),0.asUInt(4.W),11.asUInt(4.W),1.asUInt(4.W),2.asUInt(4.W),12.asUInt(4.W),5.asUInt(4.W),10.asUInt(4.W),14.asUInt(4.W),7.asUInt(4.W))
val s3_row3 = Vec(1.asUInt(4.W),10.asUInt(4.W),13.asUInt(4.W),0.asUInt(4.W),6.asUInt(4.W),9.asUInt(4.W),8.asUInt(4.W),7.asUInt(4.W),4.asUInt(4.W),15.asUInt(4.W),14.asUInt(4.W),3.asUInt(4.W),11.asUInt(4.W),5.asUInt(4.W),2.asUInt(4.W),12.asUInt(4.W))
val s4_row0 = Vec(7.asUInt(4.W),13.asUInt(4.W),14.asUInt(4.W),3.asUInt(4.W),0.asUInt(4.W),6.asUInt(4.W),9.asUInt(4.W),10.asUInt(4.W),1.asUInt(4.W),2.asUInt(4.W),8.asUInt(4.W),5.asUInt(4.W),11.asUInt(4.W),12.asUInt(4.W),4.asUInt(4.W),15.asUInt(4.W))
val s4_row1 = Vec(13.asUInt(4.W),8.asUInt(4.W),11.asUInt(4.W),5.asUInt(4.W),6.asUInt(4.W),15.asUInt(4.W),0.asUInt(4.W),3.asUInt(4.W),4.asUInt(4.W),7.asUInt(4.W),2.asUInt(4.W),12.asUInt(4.W),1.asUInt(4.W),10.asUInt(4.W),14.asUInt(4.W),9.asUInt(4.W))
val s4_row2 = Vec(10.asUInt(4.W),6.asUInt(4.W),9.asUInt(4.W),0.asUInt(4.W),12.asUInt(4.W),11.asUInt(4.W),7.asUInt(4.W),13.asUInt(4.W),15.asUInt(4.W),1.asUInt(4.W),3.asUInt(4.W),14.asUInt(4.W),5.asUInt(4.W),2.asUInt(4.W),8.asUInt(4.W),4.asUInt(4.W))
val s4_row3 = Vec(3.asUInt(4.W),15.asUInt(4.W),0.asUInt(4.W),6.asUInt(4.W),10.asUInt(4.W),1.asUInt(4.W),13.asUInt(4.W),8.asUInt(4.W),9.asUInt(4.W),4.asUInt(4.W),5.asUInt(4.W),11.asUInt(4.W),12.asUInt(4.W),7.asUInt(4.W),2.asUInt(4.W),14.asUInt(4.W))
val s5_row0 = Vec(2.asUInt(4.W),12.asUInt(4.W),4.asUInt(4.W),1.asUInt(4.W),7.asUInt(4.W),10.asUInt(4.W),11.asUInt(4.W),6.asUInt(4.W),8.asUInt(4.W),5.asUInt(4.W),3.asUInt(4.W),15.asUInt(4.W),13.asUInt(4.W),0.asUInt(4.W),14.asUInt(4.W),9.asUInt(4.W))
val s5_row1 = Vec(14.asUInt(4.W),11.asUInt(4.W),2.asUInt(4.W),12.asUInt(4.W),4.asUInt(4.W),7.asUInt(4.W),13.asUInt(4.W),1.asUInt(4.W),5.asUInt(4.W),0.asUInt(4.W),15.asUInt(4.W),10.asUInt(4.W),3.asUInt(4.W),9.asUInt(4.W),8.asUInt(4.W),6.asUInt(4.W))
val s5_row2 = Vec(4.asUInt(4.W),2.asUInt(4.W),1.asUInt(4.W),11.asUInt(4.W),10.asUInt(4.W),13.asUInt(4.W),7.asUInt(4.W),8.asUInt(4.W),15.asUInt(4.W),9.asUInt(4.W),12.asUInt(4.W),5.asUInt(4.W),6.asUInt(4.W),3.asUInt(4.W),0.asUInt(4.W),14.asUInt(4.W))
val s5_row3 = Vec(11.asUInt(4.W),8.asUInt(4.W),12.asUInt(4.W),7.asUInt(4.W),1.asUInt(4.W),14.asUInt(4.W),2.asUInt(4.W),13.asUInt(4.W),6.asUInt(4.W),15.asUInt(4.W),0.asUInt(4.W),9.asUInt(4.W),10.asUInt(4.W),4.asUInt(4.W),5.asUInt(4.W),3.asUInt(4.W))
val s6_row0 = Vec(12.asUInt(4.W),1.asUInt(4.W),10.asUInt(4.W),15.asUInt(4.W),9.asUInt(4.W),2.asUInt(4.W),6.asUInt(4.W),8.asUInt(4.W),0.asUInt(4.W),13.asUInt(4.W),3.asUInt(4.W),4.asUInt(4.W),14.asUInt(4.W),7.asUInt(4.W),5.asUInt(4.W),11.asUInt(4.W))
val s6_row1 = Vec(10.asUInt(4.W),15.asUInt(4.W),4.asUInt(4.W),2.asUInt(4.W),7.asUInt(4.W),12.asUInt(4.W),9.asUInt(4.W),5.asUInt(4.W),6.asUInt(4.W),1.asUInt(4.W),13.asUInt(4.W),14.asUInt(4.W),0.asUInt(4.W),11.asUInt(4.W),3.asUInt(4.W),8.asUInt(4.W))
val s6_row2 = Vec(9.asUInt(4.W),14.asUInt(4.W),15.asUInt(4.W),5.asUInt(4.W),2.asUInt(4.W),8.asUInt(4.W),12.asUInt(4.W),3.asUInt(4.W),7.asUInt(4.W),0.asUInt(4.W),4.asUInt(4.W),10.asUInt(4.W),1.asUInt(4.W),13.asUInt(4.W),11.asUInt(4.W),6.asUInt(4.W))
val s6_row3 = Vec(4.asUInt(4.W),3.asUInt(4.W),2.asUInt(4.W),12.asUInt(4.W),9.asUInt(4.W),5.asUInt(4.W),15.asUInt(4.W),10.asUInt(4.W),11.asUInt(4.W),14.asUInt(4.W),1.asUInt(4.W),7.asUInt(4.W),6.asUInt(4.W),0.asUInt(4.W),8.asUInt(4.W),13.asUInt(4.W))
val s7_row0 = Vec(4.asUInt(4.W),11.asUInt(4.W),2.asUInt(4.W),14.asUInt(4.W),15.asUInt(4.W),0.asUInt(4.W),8.asUInt(4.W),13.asUInt(4.W),3.asUInt(4.W),12.asUInt(4.W),9.asUInt(4.W),7.asUInt(4.W),5.asUInt(4.W),10.asUInt(4.W),6.asUInt(4.W),1.asUInt(4.W))
val s7_row1 = Vec(13.asUInt(4.W),0.asUInt(4.W),11.asUInt(4.W),7.asUInt(4.W),4.asUInt(4.W),9.asUInt(4.W),1.asUInt(4.W),10.asUInt(4.W),14.asUInt(4.W),3.asUInt(4.W),5.asUInt(4.W),12.asUInt(4.W),2.asUInt(4.W),15.asUInt(4.W),8.asUInt(4.W),6.asUInt(4.W))
val s7_row2 = Vec(1.asUInt(4.W),4.asUInt(4.W),11.asUInt(4.W),13.asUInt(4.W),12.asUInt(4.W),3.asUInt(4.W),7.asUInt(4.W),14.asUInt(4.W),10.asUInt(4.W),15.asUInt(4.W),6.asUInt(4.W),8.asUInt(4.W),0.asUInt(4.W),5.asUInt(4.W),9.asUInt(4.W),2.asUInt(4.W))
val s7_row3 = Vec(6.asUInt(4.W),11.asUInt(4.W),13.asUInt(4.W),8.asUInt(4.W),1.asUInt(4.W),4.asUInt(4.W),10.asUInt(4.W),7.asUInt(4.W),9.asUInt(4.W),5.asUInt(4.W),0.asUInt(4.W),15.asUInt(4.W),14.asUInt(4.W),2.asUInt(4.W),3.asUInt(4.W),12.asUInt(4.W))
val s8_row0 = Vec(13.asUInt(4.W),2.asUInt(4.W),8.asUInt(4.W),4.asUInt(4.W),6.asUInt(4.W),15.asUInt(4.W),11.asUInt(4.W),1.asUInt(4.W),10.asUInt(4.W),9.asUInt(4.W),3.asUInt(4.W),14.asUInt(4.W),5.asUInt(4.W),0.asUInt(4.W),12.asUInt(4.W),7.asUInt(4.W))
val s8_row1 = Vec(1.asUInt(4.W),15.asUInt(4.W),13.asUInt(4.W),8.asUInt(4.W),10.asUInt(4.W),3.asUInt(4.W),7.asUInt(4.W),4.asUInt(4.W),12.asUInt(4.W),5.asUInt(4.W),6.asUInt(4.W),11.asUInt(4.W),0.asUInt(4.W),14.asUInt(4.W),9.asUInt(4.W),2.asUInt(4.W))
val s8_row2 = Vec(7.asUInt(4.W),11.asUInt(4.W),4.asUInt(4.W),1.asUInt(4.W),9.asUInt(4.W),12.asUInt(4.W),14.asUInt(4.W),2.asUInt(4.W),0.asUInt(4.W),6.asUInt(4.W),10.asUInt(4.W),13.asUInt(4.W),15.asUInt(4.W),3.asUInt(4.W),5.asUInt(4.W),8.asUInt(4.W))
val s8_row3 = Vec(2.asUInt(4.W),1.asUInt(4.W),14.asUInt(4.W),7.asUInt(4.W),4.asUInt(4.W),10.asUInt(4.W),8.asUInt(4.W),13.asUInt(4.W),15.asUInt(4.W),12.asUInt(4.W),9.asUInt(4.W),0.asUInt(4.W),3.asUInt(4.W),5.asUInt(4.W),6.asUInt(4.W),11.asUInt(4.W))