diff --git a/STM32_CAN.cpp b/STM32_CAN.cpp
index 7e7daec..3891475 100644
--- a/STM32_CAN.cpp
+++ b/STM32_CAN.cpp
@@ -144,7 +144,7 @@ STM32_CAN::STM32_CAN( CAN_TypeDef* canPort, RXQUEUE_TABLE rxSize, TXQUEUE_TABLE
   init();
 }
 
-//lagacy pin config for compatibility
+//legacy pin config for compatibility
 STM32_CAN::STM32_CAN( CAN_TypeDef* canPort, CAN_PINS pins, RXQUEUE_TABLE rxSize, TXQUEUE_TABLE txSize )
   : rx(NC), tx(NC), sizeRxBuffer(rxSize), sizeTxBuffer(txSize),
     preemptPriority(MAX_IRQ_PRIO_VALUE), subPriority(0)
diff --git a/STM32_CAN.h b/STM32_CAN.h
index 5df758a..24a1dba 100644
--- a/STM32_CAN.h
+++ b/STM32_CAN.h
@@ -268,8 +268,8 @@ class STM32_CAN {
     };
 
     enum TX_BUFFER_MODE {
-      FIFO  = ENABLE, /** Sequencial transfers order */
-      QUEUE = DISABLE /** Sequence based on msg ID priorites. Only effects hardware queue. */
+      FIFO  = ENABLE, /** Sequential transfers order */
+      QUEUE = DISABLE /** Sequence based on msg ID priorities. Only effects hardware queue. */
     };
 
 
@@ -341,7 +341,7 @@ class STM32_CAN {
     bool setFilterQuadID(uint8_t bank_num, uint32_t id1, IDE std_ext1, uint32_t id2, IDE std_ext2, uint32_t id3, IDE std_ext3, uint32_t id4, IDE std_ext4, FILTER_ACTION action = CAN_FILTER_DEFAULT_ACTION, bool enabled = true);
     bool setFilterRaw(uint8_t bank_num, uint32_t id, uint32_t mask, uint32_t filter_mode, uint32_t filter_scale, FILTER_ACTION action = CAN_FILTER_DEFAULT_ACTION, bool enabled = true);
     /** Legacy, broken! Only works correctly for 32 bit mask mode 
-     * Retruns true on Error, false on Success (like Teensy functions, opposite of STM32 function)
+     * Returns true on Error, false on Success (like Teensy functions, opposite of STM32 function)
     */
     bool setFilter(uint8_t bank_num, uint32_t filter_id, uint32_t mask, IDE = AUTO, uint32_t filter_mode = CAN_FILTERMODE_IDMASK, uint32_t filter_scale = CAN_FILTERSCALE_32BIT, uint32_t fifo = CAN_FILTER_DEFAULT_FIFO);