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Embedded-test cannot reset MIMXRT685-EVK by itself and when manually resetting, it intermittently fails #49

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tullom opened this issue Nov 18, 2024 · 4 comments

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@tullom
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tullom commented Nov 18, 2024

I am evaluating embedded-test using an NXP MIMXRT685 board, however the board is failing to reset itself:

running 2 tests
test tests::test_example       ...  WARN probe_rs::vendor::nxp::sequences::nxp_armv8m: FlexSPI0 NOR flash config block starts with 0x00000000 (valid blocks start with 0x42464346)
Frame 0: <unknown function @ 0x0001c04a> @ 0x0001c04a
Frame 1: <unknown function @ 0x1300cba4> @ 0x1300cba4
FAILED
test tests::test_example_panic ...  WARN probe_rs::vendor::nxp::sequences::nxp_armv8m: FlexSPI0 NOR flash config block starts with 0x00000000 (valid blocks start with 0x42464346)
Frame 0: <unknown function @ 0x0001c04a> @ 0x0001c04a
Frame 1: <unknown function @ 0x1300cba4> @ 0x1300cba4
FAILED

failures:

---- tests::test_example ----
Test timed out after 60s

---- tests::test_example_panic ----
Test timed out after 60s

In addition, if I manually reset the chip by pressing the onboard reset button, I still get an error 99% of the time

running 2 tests
test tests::test_example       ...  WARN probe_rs::vendor::nxp::sequences::nxp_armv8m: FlexSPI0 NOR flash config block starts with 0x00000000 (valid blocks start with 0x42464346)
Error: An ARM specific error occurred.

Caused by:
    0: Error using access port FullyQualifiedApAddress { dp: Default, ap: V1(0) }.
    1: Failed to read register DRW at address 0x0c
    2: An error occurred in the communication with an access port or debug port.
    3: Target device responded with a FAULT response to the request.
error: test failed, to rerun pass `--test example_test`

Once or twice, I've seen it work as intended when pressing the reset button. This leads me to believe that it might be a timing issue.

By chance, I enabled RUST_LOG = "debug" and many debug lines from probe-rs are written to the console. After flashing and manually pressing the reset button, the tests end up running successfully 100% of the time. (!!!) I am just speculating, but I think that due to the added delay with console IO, the NXP chip finishes its debug port startup sequence (in hardware) when it comes out of reset. I'm not sure where to insert these delays to fix my issue (is this an embedded-test problem or a probe-rs problem?)

repo to reproduce here: tullom/mimxrt685-eval
simply comment and uncomment RUST_LOG = "debug" in .cargo/config.toml to see the difference

@t-moe
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t-moe commented Nov 19, 2024

This is probably not related to embededded-test, but to probe-rs flashing/resetting. Does probe-rs work for you when not using embedded-test?

@tullom
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tullom commented Nov 19, 2024

Indeed probe-rs works on both the flashing side and the resetting side. For example, the chip is able to flash, reset itself, and run flashed binaries with cargo run without having to enable RUST_LOG = '"debug". Should I open an issue on the probe-rs side?

@t-moe
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t-moe commented Nov 19, 2024

You can try increasing the timeout here:
https://github.com/probe-rs/probe-rs/blob/17198e82ca2c83f1b59d34654fd1489129000119/probe-rs-tools/src/bin/probe-rs/cmd/run/test_run_mode.rs#L199 (and maybe there are others? I'm currently on mobile).

@bugadani do you have any idea what could be the issue here?

@bugadani
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I'm not familiar with these chips unfortunately.

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