Bus connectivity

[AlbertMitjans]

Currently the bus contains the following information (ignoring all the id_ and category values):

buses:
  - alias: feedline_input_output_bus
    system_control:
      name: readout_system_control
      instruments: [QCM, rs_1]
    port: 1

But this information is not complete. Ideally we would like to map a Bus to an output of an instrument, such that we could call:

platform.set_parameter(alias="bus_0", parameter=ql.Parameter.OFFSET_I, value=1.0)

and the Bus knows which sequencer to update (because it knows the output of the instrument, and internally the instruments knows the sequencer-output mapping).

In the runcard, we could do something like:

buses:
  - alias: feedline_input_output_bus
    system_control:
      name: readout_system_control
      instruments:
        - alias: QRM1
          outputs: [0, 1]
        - alias: rs_1
          outputs: [0]
        - alias: attenuator
          outputs: [0]

However we have the following problem: what if more than one sequencer is mapped to an output / pair of outputs? Should we update both sequencers when doing:

platform.set_parameter(alias="bus_0", parameter=ql.Parameter.OFFSET_I, value=1.0)

???

[paulQM]

I think we should do what you mentioned but on the sequencer level, not the output. Each line is connected to a sequencer that always has two ports. In case of mw gate we are using both pulses and we activate hw modulation on the sequencer, for the flux pulses we do a trick on this general formulation and we map two sequencers to the same port and we swap the waveforms for one of them, but we are still talking about two different sequencers for two different buses.

I see two problems with mapping to an output:

• For MW gates there will be 2 outputs and for flux gates just one, this might cause problems.
• Some parameters are not directly implemented on an output. For example, the internal offsets before the mixer used for modulation (we removed it but we might want to add it back).

[fabiques]

I don't understand what you mean here:

For MW gates there will be 2 outputs and for flux gates just one, this might cause problems.

That is what Alberts code solves, a bus can be mapped to 1 or 2 outputs depending if used for MW or base band pulses.

[fabiques]

Qblox does not allow too map a sequencer to a single output?

[fabiques]

I like that implementation, nothing agains it.