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Unexpected result in SCANVIDEO if sync pins below colour pins #36
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As a further experiment, I tried the following board definition:
This gives the expected 31.25kHz on GPIO 2. So it looks as the problem is only if the HSYNC is on GPIO 0. |
The setup code in scanvideo,c is definitely not correct for certain pin combinations - there are a few PRs from people to fix very scenarios, but you may want to look at the code. |
Adding some diagnostics and building with my board configuration with PICO_SCANVIDEO_SYNC_PIN_BASE = 0 and PICO_SCANVIDEO_COLOR_PIN_BASE = 2 gives:
So the timing SM (3) has a sideset count of 1, even though PICO_SCANVIDEO_ENABLE_CLOCK_PIN = 0. Looking at "timing.pio.h" reveals:
So the PIO compiler is generating a default configuration which unconditionally sets a sideset count of 1. However, since PICO_SCANVIDEO_ENABLE_CLOCK_PIN = 0, the sideset pin base is being left undefined (and is defaulting to zero). It is suggested that routine setup_sm in pico-extras/src/rp2_common/pico_scanvideo_dpi/scanvideo.c should be revised as follows
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If you've tested that as working, you should probably submit a PR ? |
I have now tested it, and it does not work :( Changing the sideset count changes the sidesest data in the PIO program into delay data, wrecking the timing. Three options:
Edit: I have partially tested this, and the sync frequencies are now correct. I have yet to check that I now have a working display signal. |
I have now tested my revisions to dynamically edit the timing PIO program to remove the pixel clock side set if PICO_SCANVIDEO_ENABLE_CLOCK_PIN is zero (disabled) and confirmed that I now get a working VGA signal. I have created a pull request with my changes: https://github.com/raspberrypi/pico-extras/pull/37/files |
I am trying to build a VGA interface using only 8 GPIO pins. Two pins for sync and two pins each for red, green and blue.
This is not currently working for my board.
If I have the following definitions in my board header file:
Then, loading this onto the Pico I measure the expected 31.25kHz on GPIO 6 and 60Hz on GPIO 7.
However, my board has the pins in a different order. If I compile with the following board definition:
and load the resulting executable onto the Pico, I get the expected 60Hz on GPIO 1, but GPIO 0 measures 25MHz!
So it appears that, for some reason, if the sync pins are below the colour pins, what should be HSYNC is actually the pixel clock.
Any obvious reason for this?
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