v0.0.26

bumped version

v0.0.25

bumped version

v0.0.24: Merge pull request #616 from rdaly525/patch-mem-addr-width

Use max(clog2(depth), 1) for memory address width calculation

v0.0.24dev: Merge pull request #604 from rdaly525/pretty_verilog

Pretty verilog

v0.0.23

bumped version

v0.0.22: Merge pull request #599 from rdaly525/muxn-patch

Avoid using `join` as instance name in commonlib

v0.0.21

bumped version

v0.0.20

bumped version

v0.0.19

updated the tag

v0.0.18: Merge pull request #586 from rdaly525/regrst_fix

fixed regrst to reg_arst