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platform.txt
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# ------------------------------
# RL78/G22 and platform.
# ------------------------------
# For more info:
# LLVM Prototype Package for Tools Test
name=Renesas RL78/G22
version=2.4.1
# ---------------------
# Compile variables
# ---------------------
compiler.optimize =-Os
compiler.warning_flags=-w
compiler.warning_flags.none=-w
compiler.warning_flags.default=
compiler.warning_flags.more=-Wall
compiler.warning_flags.all=-Wall -Wextra
#------------------------------------#
# LLVM Compiler Common Variable
#------------------------------------#
compiler.path={runtime.tools.llvm-rl78.path}/bin/
#------------------------------------#
# LLVM Compiler variable
#------------------------------------#
compiler.c.cmd=clang
compiler.c.flags=--target=rl78 {compiler.optimize} -fno-diagnostics-show-line-numbers -ffunction-sections -fdata-sections -fdiagnostics-parseable-fixits -g -mcpu=s3 -std=gnu99 -DARDUINO=1813 -D__RL78__ -DG22_FPB -Wnonportable-include-path {compiler.warning_flags}
#------------------------------------#
# LLVM C++ Compiler variable
#------------------------------------#
compiler.cpp.cmd=clang++
compiler.cpp.flags=--target=rl78 {compiler.optimize} -g -fno-diagnostics-show-line-numbers -ffunction-sections -fdata-sections -fdiagnostics-parseable-fixits -DCPPAPP -DARDUINO=1813 -D__RL78__ -DG22_FPB -Wnonportable-include-path {compiler.warning_flags}
#------------------------------------#
# LLVM Asemble variable
#------------------------------------#
compiler.S.cmd=clang
compiler.S.flags=--target=rl78 {compiler.optimize} -fno-diagnostics-show-line-numbers -ffunction-sections -fdata-sections -fdiagnostics-parseable-fixits -g -mcpu=s3 -DCPPAPP
#------------------------------------#
# LLVM Linker variable
#------------------------------------#
compiler.c.elf.cmd=clang++
compiler.c.elf.flags=--target=rl78 -fno-diagnostics-show-line-numbers -ffunction-sections -fdata-sections -fdiagnostics-parseable-fixits -g -mcpu=s3
#------------------------------------#
# LLVM Object Copy variable
#------------------------------------#
compiler.elf2hex.cmd=llvm-objcopy
compiler.elf2hex.flags=
#------------------------------------#
# LLVM print Size variable
#------------------------------------#
compiler.size.cmd=llvm-size
compiler.size.flags=--format=sysv
#------------------------------------#
# LLVM include paths
#------------------------------------#
#--------------------------------------------------#
# Add Config_TAU0_*_Servo for Servo Motor Library
#--------------------------------------------------#
inc0 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen"
inc1 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_ADC"
inc2 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_CSI20"
inc3 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_IICA0"
inc4 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_INTC"
inc5 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_ITL000"
inc6 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_ITL001"
inc7 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_ITL012"
inc8 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_ITL013"
inc9 ="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_RTC"
inc10="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_TAU0_0_PWM"
inc11="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_TAU0_1_Square_Wave"
inc12="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_TAU0_2_Square_Wave"
inc13="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_TAU0_3_Square_Wave"
inc14="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_TAU0_4_Servo"
inc15="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_TAU0_5_Servo"
inc16="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_TAU0_6_Micros"
inc17="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_TAU0_7_Square_Wave"
inc18="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_UART0"
inc19="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_UART1"
inc20="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_UART2"
inc21="-I{runtime.platform.path}/cores/rl78g22/smc_gen/Config_UARTA0"
inc22="-I{runtime.platform.path}/cores/rl78g22/smc_gen/general"
inc23="-I{runtime.platform.path}/cores/rl78g22/smc_gen/r_bsp"
inc24="-I{runtime.platform.path}/cores/rl78g22/smc_gen/r_bsp/board"
inc25="-I{runtime.platform.path}/cores/rl78g22/smc_gen/r_bsp/board/generic_rl78_g22"
inc26="-I{runtime.platform.path}/cores/rl78g22/smc_gen/r_bsp/mcu/all"
inc27="-I{runtime.platform.path}/cores/rl78g22/smc_gen/r_bsp/mcu/rl78_g22"
inc28="-I{runtime.platform.path}/cores/rl78g22/smc_gen/r_bsp/mcu/rl78_g22/register_access"
inc29="-I{runtime.platform.path}/cores/rl78g22/smc_gen/r_bsp/mcu/rl78_g22/register_access/llvm"
inc30="-I{runtime.platform.path}/cores/rl78g22/smc_gen/r_config"
inc31="-I{runtime.platform.path}/variants/g22-fpb-48p"
inc32="-I{runtime.platform.path}/cores/rl78g22/api/deprecated"
incA={inc0} {inc1} {inc2} {inc3} {inc4} {inc5} {inc6} {inc7} {inc8} {inc9}
incB={inc10} {inc11} {inc12} {inc13} {inc14} {inc15} {inc16} {inc17} {inc18} {inc19}
incC={inc20} {inc21} {inc22} {inc23} {inc24} {inc25} {inc26} {inc27} {inc28} {inc29}
incD={inc30} {inc31} {inc32}
incE=
compiler.includes={incA} {incB} {incC} {incD} {incE}
# this can be overriden in boards.txt
build.extra_flags=
# --------------------
# LLVM compile patterns
# --------------------
# --------------------
# Compile c files
# --------------------
recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} {build.extra_flags} {includes} {compiler.includes} -c "{source_file}" -o "{object_file}"
# --------------------
# Compile c++ files
# --------------------
recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} {build.extra_flags} {includes} {compiler.includes} -o "{object_file}" -MMD -MP -MF "{object_file}" -c "{source_file}"
# --------------------
# Compile S files
# --------------------
recipe.S.o.pattern="{compiler.path}{compiler.S.cmd}" {includes} {compiler.includes} {compiler.S.flags} -c -x assembler-with-cpp "{source_file}" -o "{object_file}"
# --------------------
# Create archives
# --------------------
compiler.ar.cmd=llvm-ar
compiler.ar.flags=rcs
recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} "{archive_file_path}" "{object_file}"
# --------------------
# Combine gc-sections, archives, and objects
# --------------------
#Core-SourceCode edition
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {object_files} "-L{build.path}" "{build.path}/{archive_file}" "-T{runtime.platform.path}/{build.ldscript}" -Wl,-Map={build.path}/{build.project_name}.map -Wl,--start-group -Wl,--end-group -nostartfiles -Wl,-e_PowerON_Reset -Wl,--gc-sections -Wl,--icf=none -o {build.path}/{build.project_name}.elf
# --------------------
# Create eeprom
# --------------------
recipe.objcopy.eep.pattern=
# --------------------
# Create hex
# --------------------
recipe.objcopy.hex.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.flags} "{build.path}/{build.project_name}.elf" -O srec "{build.path}/{build.project_name}.mot"
# --------------------
# Compute size
# --------------------
recipe.size.pattern="{compiler.path}{compiler.size.cmd}" {compiler.size.flags} "{build.path}/{build.project_name}.elf"
recipe.size.regex=^(?:\.vec |\.vects |\.callt0 |\.option_byte |\.security_id |\.lowtext |\.init |\.fini |\.rodata |\.text |\.textf |\.frodata |\.eh_frame_hdr |\.eh_frame |\.data |\.dataf |\.sdata |\.saddr )\s+([0-9]+).*
recipe.size.regex.data=^(?:\.data |\.dataf |\.sdata |\.saddr |\.sbss |\.bss |\.bssf |\.stack )\s+([0-9]+).*
# --------------------
# RL78 Uploader tools
# -------------------
tools.rl78flash.cmd=rl78flash_g2x
tools.rl78flash.cmd.windows=rl78flash_g2x.exe
tools.rl78flash.path={runtime.tools.rl78.path}
tools.rl78flash.upload.params.verbose=
tools.rl78flash.upload.params.quiet=
tools.rl78flash.upload.pattern="{path}/{cmd}" -b 0 {serial.port.file} "{build.path}/{build.project_name}.mot"
#<EOF>