From 56bf3835e76e2e544e7a3e82892c054a2a2aa26a Mon Sep 17 00:00:00 2001 From: Rot127 Date: Thu, 20 Jul 2023 12:34:03 -0500 Subject: [PATCH] Exclude multiple instruction alias which are no longer a valid id --- librz/analysis/arch/ppc/ppc_il.c | 80 ++++++++++++++++----------- librz/analysis/arch/ppc/ppc_il_ops.c | 82 ++++++++++++++++++++++------ librz/analysis/p/analysis_ppc_cs.c | 12 +++- 3 files changed, 120 insertions(+), 54 deletions(-) diff --git a/librz/analysis/arch/ppc/ppc_il.c b/librz/analysis/arch/ppc/ppc_il.c index faf73a567db..833fd66c549 100644 --- a/librz/analysis/arch/ppc/ppc_il.c +++ b/librz/analysis/arch/ppc/ppc_il.c @@ -240,7 +240,7 @@ RZ_IPI bool ppc_sets_lr(ut32 insn_id) { switch (insn_id) { default: return false; -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BEQCTRL: case PPC_INS_BFCTRL: case PPC_INS_BGECTRL: @@ -258,11 +258,8 @@ RZ_IPI bool ppc_sets_lr(ut32 insn_id) { case PPC_INS_BGEL: case PPC_INS_BGELRL: case PPC_INS_BGELA: -#endif - case PPC_INS_BCCTRL: - case PPC_INS_BCL: - case PPC_INS_BCLRL: - case PPC_INS_BCTRL: + case PPC_INS_BDNZTL: + case PPC_INS_BDNZTLA: case PPC_INS_BDNZL: case PPC_INS_BDNZLA: case PPC_INS_BDNZLRL: @@ -281,6 +278,15 @@ RZ_IPI bool ppc_sets_lr(ut32 insn_id) { case PPC_INS_BDZTLA: case PPC_INS_BDZFL: case PPC_INS_BDZFLA: +#endif + case PPC_INS_BCCTRL: + case PPC_INS_BCL: + case PPC_INS_BCLRL: + case PPC_INS_BCTRL: + case PPC_INS_BL: + case PPC_INS_BLA: + case PPC_INS_BLRL: + case PPC_INS_BCLA: return true; } } @@ -295,7 +301,7 @@ RZ_IPI bool ppc_is_conditional(ut32 insn_id) { switch (insn_id) { default: return false; -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BEQ: case PPC_INS_BEQA: case PPC_INS_BF: @@ -330,6 +336,22 @@ RZ_IPI bool ppc_is_conditional(ut32 insn_id) { case PPC_INS_BGELRL: case PPC_INS_BGECTR: case PPC_INS_BGECTRL: + case PPC_INS_BDNZT: + case PPC_INS_BDNZTL: + case PPC_INS_BDNZTA: + case PPC_INS_BDNZTLA: + case PPC_INS_BDNZF: + case PPC_INS_BDNZFL: + case PPC_INS_BDNZFA: + case PPC_INS_BDNZFLA: + case PPC_INS_BDZT: + case PPC_INS_BDZTA: + case PPC_INS_BDZTL: + case PPC_INS_BDZTLA: + case PPC_INS_BDZF: + case PPC_INS_BDZFA: + case PPC_INS_BDZFL: + case PPC_INS_BDZFLA: #endif case PPC_INS_BC: case PPC_INS_BCCTR: @@ -341,32 +363,13 @@ RZ_IPI bool ppc_is_conditional(ut32 insn_id) { case PPC_INS_BCLA: case PPC_INS_BDNZ: case PPC_INS_BDNZA: - case PPC_INS_BDNZL: - case PPC_INS_BDNZLA: case PPC_INS_BDNZLR: case PPC_INS_BDNZLRL: case PPC_INS_BDZ: case PPC_INS_BDZA: - case PPC_INS_BDZL: case PPC_INS_BDZLA: case PPC_INS_BDZLR: case PPC_INS_BDZLRL: - case PPC_INS_BDNZT: - case PPC_INS_BDNZTL: - case PPC_INS_BDNZTA: - case PPC_INS_BDNZTLA: - case PPC_INS_BDNZF: - case PPC_INS_BDNZFL: - case PPC_INS_BDNZFA: - case PPC_INS_BDNZFLA: - case PPC_INS_BDZT: - case PPC_INS_BDZTA: - case PPC_INS_BDZTL: - case PPC_INS_BDZTLA: - case PPC_INS_BDZF: - case PPC_INS_BDZFA: - case PPC_INS_BDZFL: - case PPC_INS_BDZFLA: return true; } } @@ -378,6 +381,10 @@ RZ_IPI bool ppc_is_conditional(ut32 insn_id) { * \return bool True if the instructions moves a value to a SPR. False otherwise. */ RZ_IPI bool ppc_moves_to_spr(ut32 insn_id) { +#if CS_API_MAJOR >= 6 + return (insn_id > PPC_MTSPR_ALIAS_FIRST && insn_id < PPC_INS_ENDING) || insn_id == PPC_INS_MTSPR; +#else + switch (insn_id) { default: return false; @@ -395,7 +402,9 @@ RZ_IPI bool ppc_moves_to_spr(ut32 insn_id) { case PPC_INS_MTSR: case PPC_INS_MTSRIN: case PPC_INS_MTVSCR: +#if CS_API_MAJOR < 6 case PPC_INS_MTCR: +#endif case PPC_INS_MTBR0: case PPC_INS_MTBR1: case PPC_INS_MTBR2: @@ -417,10 +426,12 @@ RZ_IPI bool ppc_moves_to_spr(ut32 insn_id) { case PPC_INS_MTTBU: case PPC_INS_MTTBLO: case PPC_INS_MTTBHI: +#if CS_API_MAJOR < 6 case PPC_INS_MTDBATU: case PPC_INS_MTDBATL: case PPC_INS_MTIBATU: case PPC_INS_MTIBATL: +#endif case PPC_INS_MTDCCR: case PPC_INS_MTICCR: case PPC_INS_MTDEAR: @@ -430,6 +441,7 @@ RZ_IPI bool ppc_moves_to_spr(ut32 insn_id) { case PPC_INS_MFSRIN: return true; } +#endif } /** @@ -446,7 +458,7 @@ RZ_IPI bool ppc_decrements_ctr(RZ_BORROW cs_insn *insn, const cs_mode mode) { switch (id) { default: return false; -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BGEL: case PPC_INS_BGELA: #endif @@ -469,6 +481,7 @@ RZ_IPI bool ppc_decrements_ctr(RZ_BORROW cs_insn *insn, const cs_mode mode) { case PPC_INS_BDZLR: case PPC_INS_BDZLRL: return !(0x4 & PPC_READ_BO_FIELD); // not BO_2 +#if CS_API_MAJOR < 6 case PPC_INS_BDNZT: case PPC_INS_BDNZTL: case PPC_INS_BDNZTA: @@ -486,6 +499,7 @@ RZ_IPI bool ppc_decrements_ctr(RZ_BORROW cs_insn *insn, const cs_mode mode) { case PPC_INS_BDZFL: case PPC_INS_BDZFLA: return true; +#endif } } @@ -663,7 +677,7 @@ RZ_IPI RZ_OWN RzILOpPure *ppc_get_branch_cond(const csh handle, RZ_BORROW cs_ins return IL_FALSE; // For learning how the conditions of BCxxx branch instructions are // formed see the Power ISA -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BEQ: case PPC_INS_BEQA: case PPC_INS_BF: @@ -724,7 +738,7 @@ RZ_IPI RZ_OWN RzILOpPure *ppc_get_branch_cond(const csh handle, RZ_BORROW cs_ins return LET("bo", UN(5, bo), AND(cond_ok, ctr_ok)); case PPC_INS_BCCTR: case PPC_INS_BCCTRL: -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BEQCTR: case PPC_INS_BEQCTRL: case PPC_INS_BFCTR: @@ -868,7 +882,7 @@ RZ_IPI RZ_OWN RzILOpPure *ppc_get_branch_ta(RZ_BORROW cs_insn *insn, const cs_mo case PPC_INS_BDZFLA: // EXTS(LI || 0b00) // Branch to relative address -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BEQ: case PPC_INS_BEQA: case PPC_INS_BF: @@ -919,7 +933,7 @@ RZ_IPI RZ_OWN RzILOpPure *ppc_get_branch_ta(RZ_BORROW cs_insn *insn, const cs_mo case PPC_INS_BDNZA: case PPC_INS_BDNZLA: // EXTS(BD || 0b00) -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BGEL: case PPC_INS_BGELA: #endif @@ -937,7 +951,7 @@ RZ_IPI RZ_OWN RzILOpPure *ppc_get_branch_ta(RZ_BORROW cs_insn *insn, const cs_mo return UA(INSOP(0).imm); } // Branch to LR -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BEQLR: case PPC_INS_BEQLRL: case PPC_INS_BLELR: @@ -958,7 +972,7 @@ RZ_IPI RZ_OWN RzILOpPure *ppc_get_branch_ta(RZ_BORROW cs_insn *insn, const cs_mo // LR_0:61 || 0b00 return LOGAND(UA(-4), VARG("lr")); // Branch to CTR -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BEQCTR: case PPC_INS_BEQCTRL: case PPC_INS_BFCTR: diff --git a/librz/analysis/arch/ppc/ppc_il_ops.c b/librz/analysis/arch/ppc/ppc_il_ops.c index efcaacc808f..b58e6b2a923 100644 --- a/librz/analysis/arch/ppc/ppc_il_ops.c +++ b/librz/analysis/arch/ppc/ppc_il_ops.c @@ -434,7 +434,7 @@ static RzILOpEffect *compare_op(RZ_BORROW csh handle, RZ_BORROW cs_insn *insn, c bool signed_cmp = false; -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 // weird bug on cmp/cmpl in capstone v5 if (id == PPC_INS_CMP) { if (!strcmp(insn->mnemonic, "cmpw")) { @@ -526,7 +526,7 @@ static RzILOpEffect *compare_op(RZ_BORROW csh handle, RZ_BORROW cs_insn *insn, c return ppc_cmp_set_cr(left, right, signed_cmp, crX, mode); } -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 // bug on xori in capstone v5 static bool is_xnop(cs_insn *insn) { return insn->id == PPC_INS_XNOP && @@ -538,7 +538,7 @@ static bool is_xnop(cs_insn *insn) { static RzILOpEffect *bitwise_op(RZ_BORROW csh handle, RZ_BORROW cs_insn *insn, const cs_mode mode) { rz_return_val_if_fail(handle && insn, EMPTY()); -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 if (is_xnop(insn)) { return NOP(); } @@ -577,7 +577,6 @@ static RzILOpEffect *bitwise_op(RZ_BORROW csh handle, RZ_BORROW cs_insn *insn, c } res = LOGAND(op0, op1); break; - case PPC_INS_MR: case PPC_INS_OR: case PPC_INS_ORC: case PPC_INS_ORI: @@ -585,14 +584,12 @@ static RzILOpEffect *bitwise_op(RZ_BORROW csh handle, RZ_BORROW cs_insn *insn, c op0 = VARG(rS); if (id == PPC_INS_OR || id == PPC_INS_ORC) { op1 = (id == PPC_INS_OR) ? VARG(rB) : LOGNOT(VARG(rB)); - } else if (id == PPC_INS_MR) { - op1 = DUP(op0); // Extended Mnemonic for `or RA, RS, RS` } else { op1 = (id == PPC_INS_ORI) ? EXTZ(U16(uI)) : EXTZ(APPEND(U16(uI), U16(0))); } res = LOGOR(op0, op1); break; -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 // bug on xori in capstone v5 case PPC_INS_XNOP: op0 = VARG(rS); @@ -840,7 +837,6 @@ static RzILOpEffect *move_from_to_spr_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_MTMSR: case PPC_INS_MTMSRD: NOT_IMPLEMENTED; - case PPC_INS_MTCR: case PPC_INS_MTCRF: { ut32 mask = 0xffffffff; if (id == PPC_INS_MTCRF) { @@ -964,10 +960,29 @@ static RzILOpEffect *move_from_to_spr_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_MFPID: case PPC_INS_MFTBLO: case PPC_INS_MFTBHI: +#if CS_API_MAJOR == 6 + case PPC_INS_MFDBATU0: + case PPC_INS_MFDBATL0: + case PPC_INS_MFDBATU1: + case PPC_INS_MFDBATL1: + case PPC_INS_MFDBATU2: + case PPC_INS_MFDBATL2: + case PPC_INS_MFDBATU3: + case PPC_INS_MFDBATL3: + case PPC_INS_MFIBATU0: + case PPC_INS_MFIBATL0: + case PPC_INS_MFIBATU1: + case PPC_INS_MFIBATL1: + case PPC_INS_MFIBATU2: + case PPC_INS_MFIBATL2: + case PPC_INS_MFIBATU3: + case PPC_INS_MFIBATL3: +#else case PPC_INS_MFDBATU: case PPC_INS_MFDBATL: case PPC_INS_MFIBATU: case PPC_INS_MFIBATL: +#endif case PPC_INS_MFDCCR: case PPC_INS_MFICCR: case PPC_INS_MFDEAR: @@ -976,7 +991,9 @@ static RzILOpEffect *move_from_to_spr_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_MFTCR: case PPC_INS_MFASR: case PPC_INS_MFPVR: +#if CS_API_MAJOR < 6 case PPC_INS_MFTBU: +#endif case PPC_INS_MTDSISR: case PPC_INS_MTDAR: case PPC_INS_MTSRR2: @@ -988,10 +1005,29 @@ static RzILOpEffect *move_from_to_spr_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_MTTBU: case PPC_INS_MTTBLO: case PPC_INS_MTTBHI: +#if CS_API_MAJOR == 6 + case PPC_INS_MTDBATU0: + case PPC_INS_MTDBATL0: + case PPC_INS_MTDBATU1: + case PPC_INS_MTDBATL1: + case PPC_INS_MTDBATU2: + case PPC_INS_MTDBATL2: + case PPC_INS_MTDBATU3: + case PPC_INS_MTDBATL3: + case PPC_INS_MTIBATU0: + case PPC_INS_MTIBATL0: + case PPC_INS_MTIBATU1: + case PPC_INS_MTIBATL1: + case PPC_INS_MTIBATU2: + case PPC_INS_MTIBATL2: + case PPC_INS_MTIBATU3: + case PPC_INS_MTIBATL3: +#else case PPC_INS_MTDBATU: case PPC_INS_MTDBATL: case PPC_INS_MTIBATU: case PPC_INS_MTIBATL: +#endif case PPC_INS_MTDCCR: case PPC_INS_MTICCR: case PPC_INS_MTDEAR: @@ -1257,9 +1293,11 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn // Everything is executed linear => Sync instructions are NOP()s. case PPC_INS_ISYNC: case PPC_INS_SYNC: +#if CS_API_MAJOR < 6 case PPC_INS_LWSYNC: case PPC_INS_MSYNC: case PPC_INS_PTESYNC: +#endif case PPC_INS_TLBSYNC: lop = NOP(); break; @@ -1383,7 +1421,9 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn #endif lop = store_op(handle, insn, mode); break; +#if CS_API_MAJOR < 6 case PPC_INS_MR: +#endif case PPC_INS_AND: case PPC_INS_ANDC: case PPC_INS_ANDIS: @@ -1394,7 +1434,7 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_ORIS: case PPC_INS_NAND: case PPC_INS_NOR: -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 // bug on xori in capstone v5 case PPC_INS_XNOP: #endif @@ -1412,13 +1452,13 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn #if CS_API_MAJOR > 3 case PPC_INS_CMPB: #endif -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_CMPRB: case PPC_INS_CMPEQB: #endif lop = bitwise_op(handle, insn, mode); break; -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_CMP: case PPC_INS_CMPI: case PPC_INS_CMPL: @@ -1462,6 +1502,7 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_BLRL: case PPC_INS_BCA: case PPC_INS_BCLA: +#if CS_API_MAJOR < 6 case PPC_INS_BDNZT: case PPC_INS_BDNZTL: case PPC_INS_BDNZTA: @@ -1478,7 +1519,8 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_BDZFA: case PPC_INS_BDZFL: case PPC_INS_BDZFLA: -#if CS_API_MAJOR > 4 +#endif +#if CS_API_MAJOR == 5 case PPC_INS_BCDCFN: case PPC_INS_BCDCFSQ: case PPC_INS_BCDCFZ: @@ -1666,10 +1708,18 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_MFPID: case PPC_INS_MFTBLO: case PPC_INS_MFTBHI: +#if CS_API_MAJOR < 6 case PPC_INS_MFDBATU: case PPC_INS_MFDBATL: case PPC_INS_MFIBATU: case PPC_INS_MFIBATL: + case PPC_INS_MFTBU: + case PPC_INS_MTCR: + case PPC_INS_MTDBATU: + case PPC_INS_MTDBATL: + case PPC_INS_MTIBATU: + case PPC_INS_MTIBATL: +#endif case PPC_INS_MFDCCR: case PPC_INS_MFICCR: case PPC_INS_MFDEAR: @@ -1678,8 +1728,6 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_MFTCR: case PPC_INS_MFASR: case PPC_INS_MFPVR: - case PPC_INS_MFTBU: - case PPC_INS_MTCR: case PPC_INS_MTBR0: case PPC_INS_MTBR1: case PPC_INS_MTBR2: @@ -1701,10 +1749,6 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_MTTBU: case PPC_INS_MTTBLO: case PPC_INS_MTTBHI: - case PPC_INS_MTDBATU: - case PPC_INS_MTDBATL: - case PPC_INS_MTIBATU: - case PPC_INS_MTIBATL: case PPC_INS_MTDCCR: case PPC_INS_MTICCR: case PPC_INS_MTDEAR: @@ -1724,10 +1768,12 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn case PPC_INS_CRNOR: case PPC_INS_CROR: case PPC_INS_CRORC: +#if CS_API_MAJOR < 6 case PPC_INS_CRSET: case PPC_INS_CRNOT: case PPC_INS_CRMOVE: case PPC_INS_CRCLR: +#endif NOT_IMPLEMENTED; case PPC_INS_MCRF: lop = cr_logical(handle, insn, mode); diff --git a/librz/analysis/p/analysis_ppc_cs.c b/librz/analysis/p/analysis_ppc_cs.c index 4488e2ce624..84bf084b36b 100644 --- a/librz/analysis/p/analysis_ppc_cs.c +++ b/librz/analysis/p/analysis_ppc_cs.c @@ -982,7 +982,7 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf case PPC_INS_CMPLWI: case PPC_INS_CMPW: case PPC_INS_CMPWI: -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_CMP: case PPC_INS_CMPI: #endif @@ -1004,7 +1004,9 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf op->type = RZ_ANALYSIS_OP_TYPE_MOV; esilprintf(op, "%s,lr,=", ARG(0)); break; +#if CS_API_MAJOR < 6 case PPC_INS_MR: +#endif case PPC_INS_LI: op->type = RZ_ANALYSIS_OP_TYPE_MOV; op->val = IMM(1); @@ -1051,9 +1053,11 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf break; case PPC_INS_SYNC: case PPC_INS_ISYNC: +#if CS_API_MAJOR < 6 case PPC_INS_LWSYNC: case PPC_INS_MSYNC: case PPC_INS_PTESYNC: +#endif case PPC_INS_TLBSYNC: case PPC_INS_SLBIA: case PPC_INS_SLBIE: @@ -1250,12 +1254,14 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf op->type = RZ_ANALYSIS_OP_TYPE_ADD; esilprintf(op, "%s,%s,+,%s,=", ARG(2), ARG(1), ARG(0)); break; +#if CS_API_MAJOR < 6 case PPC_INS_CRCLR: case PPC_INS_CRSET: case PPC_INS_CRMOVE: + case PPC_INS_CRNOT: +#endif case PPC_INS_CRXOR: case PPC_INS_CRNOR: - case PPC_INS_CRNOT: // reset conditional bits op->type = RZ_ANALYSIS_OP_TYPE_MOV; break; @@ -1283,7 +1289,7 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf op->type = RZ_ANALYSIS_OP_TYPE_CALL; esilprintf(op, "pc,lr,=,ctr,pc,="); break; -#if CS_API_MAJOR > 4 +#if CS_API_MAJOR == 5 case PPC_INS_BEQ: case PPC_INS_BEQA: case PPC_INS_BFA: