diff --git a/librz/arch/isa/xtensa/xtensa_il.c b/librz/arch/isa/xtensa/xtensa_il.c
index b63be9d00a5..d0ab18724e4 100644
--- a/librz/arch/isa/xtensa/xtensa_il.c
+++ b/librz/arch/isa/xtensa/xtensa_il.c
@@ -490,6 +490,14 @@ static RzAnalysisLiftedILOp op_isync(XtensaContext *ctx) {
 	return NOP();
 }
 
+static RzAnalysisLiftedILOp op_j(XtensaContext *ctx) {
+	return JMP(U32(PC + IMM(0)));
+}
+
+static RzAnalysisLiftedILOp op_jx(XtensaContext *ctx) {
+	return JMP(IREG(0));
+}
+
 #include <rz_il/rz_il_opbuilder_end.h>
 
 static const fn_analyze_op_il fn_tbl[] = {
@@ -563,6 +571,8 @@ static const fn_analyze_op_il fn_tbl[] = {
 	[XTENSA_INS_FLOAT_S] = op_float_s,
 	[XTENSA_INS_FLOOR_S] = op_floor_s,
 	[XTENSA_INS_ISYNC] = op_isync,
+	[XTENSA_INS_J] = op_j,
+	[XTENSA_INS_JX] = op_jx,
 };
 
 void xtensa_analyze_op_rzil(XtensaContext *ctx, RzAnalysisOp *op) {
diff --git a/test/db/asm/xtensa b/test/db/asm/xtensa
index 3974c83270b..7d94b94a620 100644
--- a/test/db/asm/xtensa
+++ b/test/db/asm/xtensa
@@ -77,4 +77,7 @@ d "extui a2, a1, 0x13, 5" 102345 0x0 (set a2 (let at (var a1) (& (bv 32 0x3f) (l
 d "extw" d02000 0x0 nop
 d "float.s f2, a3, 1" 1023ca 0x0 (set f2 (cast 64 false (fbits (fcast_float ieee754-bin32 rna (div (var a3) (bv 32 0x0))))))
 d "floor.s a2, f3, 1" 1023aa 0x0 (set a2 (fcast_sint 32 rna (*. rna (float 0 (var f3) ) (float 0 (bv 32 0x40000000) ))))
-d "" 002000 0 ()
\ No newline at end of file
+d "isync" 002000 0x0 nop
+d "jx a1" a00100 0x0 (jmp (var a1))
+d "j . +3" c6ffff 0x0 (jmp (bv 32 0x3))
+d "j . +3" c6ffff 0x40000 (jmp (bv 32 0x40003))