From 5f39d0e26d888ec913557f5e5361f61943fa9bf3 Mon Sep 17 00:00:00 2001 From: Rot127 Date: Sat, 16 Mar 2024 06:43:47 -0500 Subject: [PATCH] Sync with lated generated files. --- librz/arch/isa/hexagon/hexagon.c | 2 +- librz/arch/isa/hexagon/hexagon.h | 2 +- librz/arch/isa/hexagon/hexagon_arch.c | 2 +- librz/arch/isa/hexagon/hexagon_arch.h | 2 +- librz/arch/isa/hexagon/hexagon_disas.c | 2 +- .../hexagon/hexagon_dwarf_reg_num_table.inc | 2 +- librz/arch/isa/hexagon/hexagon_il.c | 6 +- librz/arch/isa/hexagon/hexagon_il.h | 2 +- .../isa/hexagon/hexagon_il_getter_table.h | 2 +- librz/arch/isa/hexagon/hexagon_insn.h | 2 +- librz/arch/isa/hexagon/hexagon_reg_tables.h | 2 +- .../isa/hexagon/il_ops/hexagon_il_A2_ops.c | 90 +++---- .../isa/hexagon/il_ops/hexagon_il_A4_ops.c | 42 ++-- .../isa/hexagon/il_ops/hexagon_il_A5_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_A6_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_A7_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_C2_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_C4_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_F2_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_G4_ops.c | 2 +- .../hexagon/il_ops/hexagon_il_IMPORTED_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_J2_ops.c | 70 +++--- .../isa/hexagon/il_ops/hexagon_il_J4_ops.c | 238 +++++++++--------- .../isa/hexagon/il_ops/hexagon_il_L2_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_L4_ops.c | 24 +- .../isa/hexagon/il_ops/hexagon_il_L6_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_M2_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_M4_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_M5_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_M6_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_M7_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_R6_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_S2_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_S4_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_S5_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_S6_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_SA1_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_SL1_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_SL2_ops.c | 22 +- .../isa/hexagon/il_ops/hexagon_il_SS1_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_SS2_ops.c | 2 +- .../il_ops/hexagon_il_UNDOCUMENTED_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_V6_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_Y2_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_Y4_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_Y5_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_Y6_ops.c | 2 +- .../isa/hexagon/il_ops/hexagon_il_dep_ops.c | 2 +- .../hexagon/il_ops/hexagon_il_invalid_ops.c | 2 +- .../hexagon/il_ops/hexagon_il_non_insn_ops.c | 26 +- librz/arch/p/analysis/analysis_hexagon.c | 2 +- librz/arch/p/asm/asm_hexagon.c | 2 +- 52 files changed, 297 insertions(+), 309 deletions(-) diff --git a/librz/arch/isa/hexagon/hexagon.c b/librz/arch/isa/hexagon/hexagon.c index eeba5c3c141..571ed4a8577 100644 --- a/librz/arch/isa/hexagon/hexagon.c +++ b/librz/arch/isa/hexagon/hexagon.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon.h b/librz/arch/isa/hexagon/hexagon.h index 1ac3d8b3733..547f6b70fe2 100644 --- a/librz/arch/isa/hexagon/hexagon.h +++ b/librz/arch/isa/hexagon/hexagon.h @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon_arch.c b/librz/arch/isa/hexagon/hexagon_arch.c index 917fa7ae775..cc245073fad 100644 --- a/librz/arch/isa/hexagon/hexagon_arch.c +++ b/librz/arch/isa/hexagon/hexagon_arch.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon_arch.h b/librz/arch/isa/hexagon/hexagon_arch.h index b18cb493b52..e29c4b53d79 100644 --- a/librz/arch/isa/hexagon/hexagon_arch.h +++ b/librz/arch/isa/hexagon/hexagon_arch.h @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon_disas.c b/librz/arch/isa/hexagon/hexagon_disas.c index 9f52c30add5..e23bc5e00d2 100644 --- a/librz/arch/isa/hexagon/hexagon_disas.c +++ b/librz/arch/isa/hexagon/hexagon_disas.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon_dwarf_reg_num_table.inc b/librz/arch/isa/hexagon/hexagon_dwarf_reg_num_table.inc index d5789a6be91..148ccc01c40 100644 --- a/librz/arch/isa/hexagon/hexagon_dwarf_reg_num_table.inc +++ b/librz/arch/isa/hexagon/hexagon_dwarf_reg_num_table.inc @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon_il.c b/librz/arch/isa/hexagon/hexagon_il.c index 5645a7e7486..b3b8ff8fa83 100644 --- a/librz/arch/isa/hexagon/hexagon_il.c +++ b/librz/arch/isa/hexagon/hexagon_il.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: @@ -408,9 +408,9 @@ RZ_IPI RzILOpEffect *hex_get_il_op(const ut32 addr, const bool get_pkt_op) { rz_pvector_push(p->il_ops, &hex_endloop01_op); } + rz_pvector_push(p->il_ops, &hex_pkt_commit); // Add a jump to the next packet. rz_pvector_push(p->il_ops, &hex_next_jump_to_next_pkt); - rz_pvector_push(p->il_ops, &hex_pkt_commit); check_for_jumps(p, &might_has_jumped); @@ -864,7 +864,7 @@ RZ_IPI void hex_reset_il_pkt_stats(HexILExecData *stats) { rz_bv_free(stats->ctr_tmp_read); rz_bv_free(stats->gpr_tmp_read); rz_bv_free(stats->pred_tmp_read); - stats->slot_cancelled = rz_bv_new(32); + stats->slot_cancelled = rz_bv_new(64); stats->ctr_written = rz_bv_new(64); stats->gpr_written = rz_bv_new(64); stats->pred_written = rz_bv_new(32); diff --git a/librz/arch/isa/hexagon/hexagon_il.h b/librz/arch/isa/hexagon/hexagon_il.h index 8d0fcd95e94..93fffd23ce6 100644 --- a/librz/arch/isa/hexagon/hexagon_il.h +++ b/librz/arch/isa/hexagon/hexagon_il.h @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon_il_getter_table.h b/librz/arch/isa/hexagon/hexagon_il_getter_table.h index 2948a4ae4f6..4532fb2276c 100644 --- a/librz/arch/isa/hexagon/hexagon_il_getter_table.h +++ b/librz/arch/isa/hexagon/hexagon_il_getter_table.h @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon_insn.h b/librz/arch/isa/hexagon/hexagon_insn.h index a5d1335b49f..ac8a5c07b74 100644 --- a/librz/arch/isa/hexagon/hexagon_insn.h +++ b/librz/arch/isa/hexagon/hexagon_insn.h @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/hexagon_reg_tables.h b/librz/arch/isa/hexagon/hexagon_reg_tables.h index dcb5319d972..c7cbd1b4fa4 100644 --- a/librz/arch/isa/hexagon/hexagon_reg_tables.h +++ b/librz/arch/isa/hexagon/hexagon_reg_tables.h @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_A2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_A2_ops.c index 0418405f3cc..78a42258837 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_A2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_A2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: @@ -6279,45 +6279,45 @@ RzILOpEffect *hex_il_op_a2_vcmpwgt(HexInsnPktBundle *bundle) { RzILOpEffect *seq_44 = SEQN(2, op_ASSIGN_2, for_43); // j = 0x4; - RzILOpEffect *op_ASSIGN_47 = SETL("j", SN(32, 4)); + RzILOpEffect *op_ASSIGN_46 = SETL("j", SN(32, 4)); // HYB(++j); - RzILOpEffect *op_INC_50 = SETL("j", INC(VARL("j"), 32)); + RzILOpEffect *op_INC_49 = SETL("j", INC(VARL("j"), 32)); // h_tmp71 = HYB(++j); - RzILOpEffect *op_ASSIGN_hybrid_tmp_52 = SETL("h_tmp71", VARL("j")); + RzILOpEffect *op_ASSIGN_hybrid_tmp_51 = SETL("h_tmp71", VARL("j")); // seq(h_tmp71 = HYB(++j); HYB(++j)); - RzILOpEffect *seq_53 = SEQN(2, op_ASSIGN_hybrid_tmp_52, op_INC_50); + RzILOpEffect *seq_52 = SEQN(2, op_ASSIGN_hybrid_tmp_51, op_INC_49); // Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << j))) | (((((st64) ((st32) ((Rss >> 0x20) & 0xffffffff))) > ((st64) ((st32) ((Rtt >> 0x20) & 0xffffffff)))) ? 0x1 : 0x0) << j))); - RzILOpPure *op_LSHIFT_55 = SHIFTL0(UN(64, 1), VARL("j")); - RzILOpPure *op_NOT_56 = LOGNOT(op_LSHIFT_55); - RzILOpPure *op_AND_59 = LOGAND(CAST(64, IL_FALSE, CAST(32, MSB(READ_REG(pkt, Pd_op, true)), READ_REG(pkt, Pd_op, true))), op_NOT_56); - RzILOpPure *op_RSHIFT_63 = SHIFTRA(DUP(Rss), SN(32, 0x20)); - RzILOpPure *op_AND_65 = LOGAND(op_RSHIFT_63, SN(64, 0xffffffff)); - RzILOpPure *op_RSHIFT_71 = SHIFTRA(DUP(Rtt), SN(32, 0x20)); - RzILOpPure *op_AND_73 = LOGAND(op_RSHIFT_71, SN(64, 0xffffffff)); - RzILOpPure *op_GT_76 = SGT(CAST(64, MSB(CAST(32, MSB(op_AND_65), DUP(op_AND_65))), CAST(32, MSB(DUP(op_AND_65)), DUP(op_AND_65))), CAST(64, MSB(CAST(32, MSB(op_AND_73), DUP(op_AND_73))), CAST(32, MSB(DUP(op_AND_73)), DUP(op_AND_73)))); - RzILOpPure *ite_cast_ut64_77 = ITE(op_GT_76, UN(64, 1), UN(64, 0)); - RzILOpPure *op_LSHIFT_78 = SHIFTL0(ite_cast_ut64_77, VARL("j")); - RzILOpPure *op_OR_79 = LOGOR(op_AND_59, op_LSHIFT_78); - RzILOpEffect *op_ASSIGN_81 = WRITE_REG(bundle, Pd_op, CAST(8, IL_FALSE, op_OR_79)); + RzILOpPure *op_LSHIFT_54 = SHIFTL0(UN(64, 1), VARL("j")); + RzILOpPure *op_NOT_55 = LOGNOT(op_LSHIFT_54); + RzILOpPure *op_AND_58 = LOGAND(CAST(64, IL_FALSE, CAST(32, MSB(READ_REG(pkt, Pd_op, true)), READ_REG(pkt, Pd_op, true))), op_NOT_55); + RzILOpPure *op_RSHIFT_62 = SHIFTRA(DUP(Rss), SN(32, 0x20)); + RzILOpPure *op_AND_64 = LOGAND(op_RSHIFT_62, SN(64, 0xffffffff)); + RzILOpPure *op_RSHIFT_70 = SHIFTRA(DUP(Rtt), SN(32, 0x20)); + RzILOpPure *op_AND_72 = LOGAND(op_RSHIFT_70, SN(64, 0xffffffff)); + RzILOpPure *op_GT_75 = SGT(CAST(64, MSB(CAST(32, MSB(op_AND_64), DUP(op_AND_64))), CAST(32, MSB(DUP(op_AND_64)), DUP(op_AND_64))), CAST(64, MSB(CAST(32, MSB(op_AND_72), DUP(op_AND_72))), CAST(32, MSB(DUP(op_AND_72)), DUP(op_AND_72)))); + RzILOpPure *ite_cast_ut64_76 = ITE(op_GT_75, UN(64, 1), UN(64, 0)); + RzILOpPure *op_LSHIFT_77 = SHIFTL0(ite_cast_ut64_76, VARL("j")); + RzILOpPure *op_OR_78 = LOGOR(op_AND_58, op_LSHIFT_77); + RzILOpEffect *op_ASSIGN_80 = WRITE_REG(bundle, Pd_op, CAST(8, IL_FALSE, op_OR_78)); // seq(h_tmp71; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << j))) ...; - RzILOpEffect *seq_83 = op_ASSIGN_81; + RzILOpEffect *seq_82 = op_ASSIGN_80; // seq(seq(h_tmp71; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << ...; - RzILOpEffect *seq_84 = SEQN(2, seq_83, seq_53); + RzILOpEffect *seq_83 = SEQN(2, seq_82, seq_52); // while ((j <= 0x7)) { seq(seq(h_tmp71; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << ... }; - RzILOpPure *op_LE_49 = SLE(VARL("j"), SN(32, 7)); - RzILOpEffect *for_85 = REPEAT(op_LE_49, seq_84); + RzILOpPure *op_LE_48 = SLE(VARL("j"), SN(32, 7)); + RzILOpEffect *for_84 = REPEAT(op_LE_48, seq_83); // seq(j = 0x4; while ((j <= 0x7)) { seq(seq(h_tmp71; Pd = ((st8) ( ...; - RzILOpEffect *seq_86 = SEQN(2, op_ASSIGN_47, for_85); + RzILOpEffect *seq_85 = SEQN(2, op_ASSIGN_46, for_84); - RzILOpEffect *instruction_sequence = SEQN(2, seq_44, seq_86); + RzILOpEffect *instruction_sequence = SEQN(2, seq_44, seq_85); return instruction_sequence; } @@ -6373,45 +6373,45 @@ RzILOpEffect *hex_il_op_a2_vcmpwgtu(HexInsnPktBundle *bundle) { RzILOpEffect *seq_44 = SEQN(2, op_ASSIGN_2, for_43); // j = 0x4; - RzILOpEffect *op_ASSIGN_46 = SETL("j", SN(32, 4)); + RzILOpEffect *op_ASSIGN_47 = SETL("j", SN(32, 4)); // HYB(++j); - RzILOpEffect *op_INC_49 = SETL("j", INC(VARL("j"), 32)); + RzILOpEffect *op_INC_50 = SETL("j", INC(VARL("j"), 32)); // h_tmp73 = HYB(++j); - RzILOpEffect *op_ASSIGN_hybrid_tmp_51 = SETL("h_tmp73", VARL("j")); + RzILOpEffect *op_ASSIGN_hybrid_tmp_52 = SETL("h_tmp73", VARL("j")); // seq(h_tmp73 = HYB(++j); HYB(++j)); - RzILOpEffect *seq_52 = SEQN(2, op_ASSIGN_hybrid_tmp_51, op_INC_49); + RzILOpEffect *seq_53 = SEQN(2, op_ASSIGN_hybrid_tmp_52, op_INC_50); // Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << j))) | (((((ut64) ((ut32) ((Rss >> 0x20) & 0xffffffff))) > ((ut64) ((ut32) ((Rtt >> 0x20) & 0xffffffff)))) ? 0x1 : 0x0) << j))); - RzILOpPure *op_LSHIFT_54 = SHIFTL0(UN(64, 1), VARL("j")); - RzILOpPure *op_NOT_55 = LOGNOT(op_LSHIFT_54); - RzILOpPure *op_AND_58 = LOGAND(CAST(64, IL_FALSE, CAST(32, MSB(READ_REG(pkt, Pd_op, true)), READ_REG(pkt, Pd_op, true))), op_NOT_55); - RzILOpPure *op_RSHIFT_62 = SHIFTRA(DUP(Rss), SN(32, 0x20)); - RzILOpPure *op_AND_64 = LOGAND(op_RSHIFT_62, SN(64, 0xffffffff)); - RzILOpPure *op_RSHIFT_70 = SHIFTRA(DUP(Rtt), SN(32, 0x20)); - RzILOpPure *op_AND_72 = LOGAND(op_RSHIFT_70, SN(64, 0xffffffff)); - RzILOpPure *op_GT_75 = UGT(CAST(64, IL_FALSE, CAST(32, IL_FALSE, op_AND_64)), CAST(64, IL_FALSE, CAST(32, IL_FALSE, op_AND_72))); - RzILOpPure *ite_cast_ut64_76 = ITE(op_GT_75, UN(64, 1), UN(64, 0)); - RzILOpPure *op_LSHIFT_77 = SHIFTL0(ite_cast_ut64_76, VARL("j")); - RzILOpPure *op_OR_78 = LOGOR(op_AND_58, op_LSHIFT_77); - RzILOpEffect *op_ASSIGN_80 = WRITE_REG(bundle, Pd_op, CAST(8, IL_FALSE, op_OR_78)); + RzILOpPure *op_LSHIFT_55 = SHIFTL0(UN(64, 1), VARL("j")); + RzILOpPure *op_NOT_56 = LOGNOT(op_LSHIFT_55); + RzILOpPure *op_AND_59 = LOGAND(CAST(64, IL_FALSE, CAST(32, MSB(READ_REG(pkt, Pd_op, true)), READ_REG(pkt, Pd_op, true))), op_NOT_56); + RzILOpPure *op_RSHIFT_63 = SHIFTRA(DUP(Rss), SN(32, 0x20)); + RzILOpPure *op_AND_65 = LOGAND(op_RSHIFT_63, SN(64, 0xffffffff)); + RzILOpPure *op_RSHIFT_71 = SHIFTRA(DUP(Rtt), SN(32, 0x20)); + RzILOpPure *op_AND_73 = LOGAND(op_RSHIFT_71, SN(64, 0xffffffff)); + RzILOpPure *op_GT_76 = UGT(CAST(64, IL_FALSE, CAST(32, IL_FALSE, op_AND_65)), CAST(64, IL_FALSE, CAST(32, IL_FALSE, op_AND_73))); + RzILOpPure *ite_cast_ut64_77 = ITE(op_GT_76, UN(64, 1), UN(64, 0)); + RzILOpPure *op_LSHIFT_78 = SHIFTL0(ite_cast_ut64_77, VARL("j")); + RzILOpPure *op_OR_79 = LOGOR(op_AND_59, op_LSHIFT_78); + RzILOpEffect *op_ASSIGN_81 = WRITE_REG(bundle, Pd_op, CAST(8, IL_FALSE, op_OR_79)); // seq(h_tmp73; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << j))) ...; - RzILOpEffect *seq_82 = op_ASSIGN_80; + RzILOpEffect *seq_83 = op_ASSIGN_81; // seq(seq(h_tmp73; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << ...; - RzILOpEffect *seq_83 = SEQN(2, seq_82, seq_52); + RzILOpEffect *seq_84 = SEQN(2, seq_83, seq_53); // while ((j <= 0x7)) { seq(seq(h_tmp73; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << ... }; - RzILOpPure *op_LE_48 = SLE(VARL("j"), SN(32, 7)); - RzILOpEffect *for_84 = REPEAT(op_LE_48, seq_83); + RzILOpPure *op_LE_49 = SLE(VARL("j"), SN(32, 7)); + RzILOpEffect *for_85 = REPEAT(op_LE_49, seq_84); // seq(j = 0x4; while ((j <= 0x7)) { seq(seq(h_tmp73; Pd = ((st8) ( ...; - RzILOpEffect *seq_85 = SEQN(2, op_ASSIGN_46, for_84); + RzILOpEffect *seq_86 = SEQN(2, op_ASSIGN_47, for_85); - RzILOpEffect *instruction_sequence = SEQN(2, seq_44, seq_85); + RzILOpEffect *instruction_sequence = SEQN(2, seq_44, seq_86); return instruction_sequence; } diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_A4_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_A4_ops.c index 68f3ec1b270..eafba8be28f 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_A4_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_A4_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: @@ -2567,43 +2567,43 @@ RzILOpEffect *hex_il_op_a4_vcmpwgti(HexInsnPktBundle *bundle) { RzILOpEffect *seq_38 = SEQN(2, op_ASSIGN_2, for_37); // j = 0x4; - RzILOpEffect *op_ASSIGN_41 = SETL("j", SN(32, 4)); + RzILOpEffect *op_ASSIGN_40 = SETL("j", SN(32, 4)); // HYB(++j); - RzILOpEffect *op_INC_44 = SETL("j", INC(VARL("j"), 32)); + RzILOpEffect *op_INC_43 = SETL("j", INC(VARL("j"), 32)); // h_tmp136 = HYB(++j); - RzILOpEffect *op_ASSIGN_hybrid_tmp_46 = SETL("h_tmp136", VARL("j")); + RzILOpEffect *op_ASSIGN_hybrid_tmp_45 = SETL("h_tmp136", VARL("j")); // seq(h_tmp136 = HYB(++j); HYB(++j)); - RzILOpEffect *seq_47 = SEQN(2, op_ASSIGN_hybrid_tmp_46, op_INC_44); + RzILOpEffect *seq_46 = SEQN(2, op_ASSIGN_hybrid_tmp_45, op_INC_43); // Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << j))) | (((((st64) ((st32) ((Rss >> 0x20) & 0xffffffff))) > ((st64) s)) ? 0x1 : 0x0) << j))); - RzILOpPure *op_LSHIFT_49 = SHIFTL0(UN(64, 1), VARL("j")); - RzILOpPure *op_NOT_50 = LOGNOT(op_LSHIFT_49); - RzILOpPure *op_AND_53 = LOGAND(CAST(64, IL_FALSE, CAST(32, MSB(READ_REG(pkt, Pd_op, true)), READ_REG(pkt, Pd_op, true))), op_NOT_50); - RzILOpPure *op_RSHIFT_57 = SHIFTRA(DUP(Rss), SN(32, 0x20)); - RzILOpPure *op_AND_59 = LOGAND(op_RSHIFT_57, SN(64, 0xffffffff)); - RzILOpPure *op_GT_63 = SGT(CAST(64, MSB(CAST(32, MSB(op_AND_59), DUP(op_AND_59))), CAST(32, MSB(DUP(op_AND_59)), DUP(op_AND_59))), CAST(64, MSB(VARL("s")), VARL("s"))); - RzILOpPure *ite_cast_ut64_64 = ITE(op_GT_63, UN(64, 1), UN(64, 0)); - RzILOpPure *op_LSHIFT_65 = SHIFTL0(ite_cast_ut64_64, VARL("j")); - RzILOpPure *op_OR_66 = LOGOR(op_AND_53, op_LSHIFT_65); - RzILOpEffect *op_ASSIGN_68 = WRITE_REG(bundle, Pd_op, CAST(8, IL_FALSE, op_OR_66)); + RzILOpPure *op_LSHIFT_48 = SHIFTL0(UN(64, 1), VARL("j")); + RzILOpPure *op_NOT_49 = LOGNOT(op_LSHIFT_48); + RzILOpPure *op_AND_52 = LOGAND(CAST(64, IL_FALSE, CAST(32, MSB(READ_REG(pkt, Pd_op, true)), READ_REG(pkt, Pd_op, true))), op_NOT_49); + RzILOpPure *op_RSHIFT_56 = SHIFTRA(DUP(Rss), SN(32, 0x20)); + RzILOpPure *op_AND_58 = LOGAND(op_RSHIFT_56, SN(64, 0xffffffff)); + RzILOpPure *op_GT_62 = SGT(CAST(64, MSB(CAST(32, MSB(op_AND_58), DUP(op_AND_58))), CAST(32, MSB(DUP(op_AND_58)), DUP(op_AND_58))), CAST(64, MSB(VARL("s")), VARL("s"))); + RzILOpPure *ite_cast_ut64_63 = ITE(op_GT_62, UN(64, 1), UN(64, 0)); + RzILOpPure *op_LSHIFT_64 = SHIFTL0(ite_cast_ut64_63, VARL("j")); + RzILOpPure *op_OR_65 = LOGOR(op_AND_52, op_LSHIFT_64); + RzILOpEffect *op_ASSIGN_67 = WRITE_REG(bundle, Pd_op, CAST(8, IL_FALSE, op_OR_65)); // seq(h_tmp136; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << j)) ...; - RzILOpEffect *seq_70 = op_ASSIGN_68; + RzILOpEffect *seq_69 = op_ASSIGN_67; // seq(seq(h_tmp136; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << ...; - RzILOpEffect *seq_71 = SEQN(2, seq_70, seq_47); + RzILOpEffect *seq_70 = SEQN(2, seq_69, seq_46); // while ((j <= 0x7)) { seq(seq(h_tmp136; Pd = ((st8) ((((ut64) ((st32) Pd)) & (~(0x1 << ... }; - RzILOpPure *op_LE_43 = SLE(VARL("j"), SN(32, 7)); - RzILOpEffect *for_72 = REPEAT(op_LE_43, seq_71); + RzILOpPure *op_LE_42 = SLE(VARL("j"), SN(32, 7)); + RzILOpEffect *for_71 = REPEAT(op_LE_42, seq_70); // seq(j = 0x4; while ((j <= 0x7)) { seq(seq(h_tmp136; Pd = ((st8) ...; - RzILOpEffect *seq_73 = SEQN(2, op_ASSIGN_41, for_72); + RzILOpEffect *seq_72 = SEQN(2, op_ASSIGN_40, for_71); - RzILOpEffect *instruction_sequence = SEQN(3, imm_assign_25, seq_38, seq_73); + RzILOpEffect *instruction_sequence = SEQN(3, imm_assign_25, seq_38, seq_72); return instruction_sequence; } diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_A5_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_A5_ops.c index a4b24919301..4b125b33137 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_A5_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_A5_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_A6_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_A6_ops.c index 01873e29717..93b14c9cc79 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_A6_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_A6_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_A7_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_A7_ops.c index f27449d75b8..4433429e16d 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_A7_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_A7_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_C2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_C2_ops.c index 1650d0f9ece..adf581eb54f 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_C2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_C2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_C4_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_C4_ops.c index cf270c24847..4b4becc9330 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_C4_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_C4_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_F2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_F2_ops.c index c0fcda9b225..ab2b3db7ef8 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_F2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_F2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_G4_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_G4_ops.c index d16605dc7cd..ab13cca78bb 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_G4_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_G4_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_IMPORTED_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_IMPORTED_ops.c index 6de1ef64ff5..07468a894a9 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_IMPORTED_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_IMPORTED_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_J2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_J2_ops.c index 2d4bd119bf0..f4002386869 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_J2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_J2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: @@ -48,7 +48,7 @@ RzILOpEffect *hex_il_op_j2_call(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_20 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_20_21 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_20)); + RzILOpEffect *jump_op_ADD_20_21 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_20)); RzILOpEffect *instruction_sequence = SEQN(4, imm_assign_0, op_ASSIGN_7, seq_17, jump_op_ADD_20_21); return instruction_sequence; @@ -90,7 +90,7 @@ RzILOpEffect *hex_il_op_j2_callf(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_26 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_26_27 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_26)); + RzILOpEffect *jump_op_ADD_26_27 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_26)); // seq(seq(seq(HYB(call_pkt); h_tmp158 = HYB(call_pkt)); lr = (h_tm ...; RzILOpEffect *seq_then_30 = SEQN(2, seq_23, jump_op_ADD_26_27); @@ -130,7 +130,7 @@ RzILOpEffect *hex_il_op_j2_callr(HexInsnPktBundle *bundle) { RzILOpEffect *seq_9 = SEQN(2, seq_4, op_ASSIGN_8); // jump(Rs); - RzILOpEffect *jump_Rs_11 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_11 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); RzILOpEffect *instruction_sequence = SEQN(2, seq_9, jump_Rs_11); return instruction_sequence; @@ -164,7 +164,7 @@ RzILOpEffect *hex_il_op_j2_callrf(HexInsnPktBundle *bundle) { RzILOpEffect *seq_15 = SEQN(2, seq_10, op_ASSIGN_14); // jump(Rs); - RzILOpEffect *jump_Rs_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(seq(seq(HYB(call_pkt); h_tmp160 = HYB(call_pkt)); lr = (h_tm ...; RzILOpEffect *seq_then_20 = SEQN(2, seq_15, jump_Rs_17); @@ -204,7 +204,7 @@ RzILOpEffect *hex_il_op_j2_callrh(HexInsnPktBundle *bundle) { RzILOpEffect *seq_9 = SEQN(2, seq_4, op_ASSIGN_8); // jump(Rs); - RzILOpEffect *jump_Rs_11 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_11 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); RzILOpEffect *instruction_sequence = SEQN(2, seq_9, jump_Rs_11); return instruction_sequence; @@ -238,7 +238,7 @@ RzILOpEffect *hex_il_op_j2_callrt(HexInsnPktBundle *bundle) { RzILOpEffect *seq_14 = SEQN(2, seq_9, op_ASSIGN_13); // jump(Rs); - RzILOpEffect *jump_Rs_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(seq(seq(HYB(call_pkt); h_tmp162 = HYB(call_pkt)); lr = (h_tm ...; RzILOpEffect *seq_then_19 = SEQN(2, seq_14, jump_Rs_16); @@ -287,7 +287,7 @@ RzILOpEffect *hex_il_op_j2_callt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_25 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_25_26 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_25)); + RzILOpEffect *jump_op_ADD_25_26 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_25)); // seq(seq(seq(HYB(call_pkt); h_tmp163 = HYB(call_pkt)); lr = (h_tm ...; RzILOpEffect *seq_then_29 = SEQN(2, seq_22, jump_op_ADD_25_26); @@ -317,7 +317,7 @@ RzILOpEffect *hex_il_op_j2_jump(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_10 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_10_11 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_10)); + RzILOpEffect *jump_op_ADD_10_11 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_10)); RzILOpEffect *instruction_sequence = SEQN(3, imm_assign_0, op_ASSIGN_7, jump_op_ADD_10_11); return instruction_sequence; @@ -342,7 +342,7 @@ RzILOpEffect *hex_il_op_j2_jumpf(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -375,7 +375,7 @@ RzILOpEffect *hex_il_op_j2_jumpfnew(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -408,7 +408,7 @@ RzILOpEffect *hex_il_op_j2_jumpfnewpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -441,7 +441,7 @@ RzILOpEffect *hex_il_op_j2_jumpfpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -464,7 +464,7 @@ RzILOpEffect *hex_il_op_j2_jumpr(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_1 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_1 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); RzILOpEffect *instruction_sequence = jump_Rs_1; return instruction_sequence; @@ -481,7 +481,7 @@ RzILOpEffect *hex_il_op_j2_jumprf(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_7 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_7 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(jump(Rs)); RzILOpEffect *seq_then_10 = jump_Rs_7; @@ -506,7 +506,7 @@ RzILOpEffect *hex_il_op_j2_jumprfnew(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_7 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_7 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(jump(Rs)); RzILOpEffect *seq_then_10 = jump_Rs_7; @@ -531,7 +531,7 @@ RzILOpEffect *hex_il_op_j2_jumprfnewpt(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_7 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_7 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(jump(Rs)); RzILOpEffect *seq_then_10 = jump_Rs_7; @@ -556,7 +556,7 @@ RzILOpEffect *hex_il_op_j2_jumprfpt(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_7 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_7 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(jump(Rs)); RzILOpEffect *seq_then_10 = jump_Rs_7; @@ -585,7 +585,7 @@ RzILOpEffect *hex_il_op_j2_jumprgtez(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_7 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_7)); + RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_7)); // seq(jump(pc + ((ut32) r))); RzILOpEffect *seq_then_10 = jump_op_ADD_7_8; @@ -613,7 +613,7 @@ RzILOpEffect *hex_il_op_j2_jumprgtezpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_7 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_7)); + RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_7)); // seq(jump(pc + ((ut32) r))); RzILOpEffect *seq_then_10 = jump_op_ADD_7_8; @@ -635,7 +635,7 @@ RzILOpEffect *hex_il_op_j2_jumprh(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_1 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_1 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); RzILOpEffect *instruction_sequence = jump_Rs_1; return instruction_sequence; @@ -656,7 +656,7 @@ RzILOpEffect *hex_il_op_j2_jumprltez(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_7 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_7)); + RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_7)); // seq(jump(pc + ((ut32) r))); RzILOpEffect *seq_then_10 = jump_op_ADD_7_8; @@ -684,7 +684,7 @@ RzILOpEffect *hex_il_op_j2_jumprltezpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_7 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_7)); + RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_7)); // seq(jump(pc + ((ut32) r))); RzILOpEffect *seq_then_10 = jump_op_ADD_7_8; @@ -712,7 +712,7 @@ RzILOpEffect *hex_il_op_j2_jumprnz(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_7 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_7)); + RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_7)); // seq(jump(pc + ((ut32) r))); RzILOpEffect *seq_then_10 = jump_op_ADD_7_8; @@ -740,7 +740,7 @@ RzILOpEffect *hex_il_op_j2_jumprnzpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_7 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_7)); + RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_7)); // seq(jump(pc + ((ut32) r))); RzILOpEffect *seq_then_10 = jump_op_ADD_7_8; @@ -764,7 +764,7 @@ RzILOpEffect *hex_il_op_j2_jumprt(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_6 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_6 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(jump(Rs)); RzILOpEffect *seq_then_9 = jump_Rs_6; @@ -788,7 +788,7 @@ RzILOpEffect *hex_il_op_j2_jumprtnew(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_6 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_6 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(jump(Rs)); RzILOpEffect *seq_then_9 = jump_Rs_6; @@ -812,7 +812,7 @@ RzILOpEffect *hex_il_op_j2_jumprtnewpt(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_6 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_6 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(jump(Rs)); RzILOpEffect *seq_then_9 = jump_Rs_6; @@ -836,7 +836,7 @@ RzILOpEffect *hex_il_op_j2_jumprtpt(HexInsnPktBundle *bundle) { RzILOpPure *Rs = READ_REG(pkt, Rs_op, false); // jump(Rs); - RzILOpEffect *jump_Rs_6 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(Rs)); + RzILOpEffect *jump_Rs_6 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", Rs)); // seq(jump(Rs)); RzILOpEffect *seq_then_9 = jump_Rs_6; @@ -864,7 +864,7 @@ RzILOpEffect *hex_il_op_j2_jumprz(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_7 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_7)); + RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_7)); // seq(jump(pc + ((ut32) r))); RzILOpEffect *seq_then_10 = jump_op_ADD_7_8; @@ -892,7 +892,7 @@ RzILOpEffect *hex_il_op_j2_jumprzpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_7 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_7)); + RzILOpEffect *jump_op_ADD_7_8 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_7)); // seq(jump(pc + ((ut32) r))); RzILOpEffect *seq_then_10 = jump_op_ADD_7_8; @@ -924,7 +924,7 @@ RzILOpEffect *hex_il_op_j2_jumpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -956,7 +956,7 @@ RzILOpEffect *hex_il_op_j2_jumptnew(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -988,7 +988,7 @@ RzILOpEffect *hex_il_op_j2_jumptnewpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1020,7 +1020,7 @@ RzILOpEffect *hex_il_op_j2_jumptpt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_J4_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_J4_ops.c index bee51afe105..2406c8a0653 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_J4_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_J4_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: @@ -35,7 +35,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -69,7 +69,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -121,7 +121,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -174,7 +174,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -227,7 +227,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -280,7 +280,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -315,7 +315,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -349,7 +349,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -401,7 +401,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -453,7 +453,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -505,7 +505,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -557,7 +557,7 @@ RzILOpEffect *hex_il_op_j4_cmpeq_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -593,7 +593,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -629,7 +629,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -683,7 +683,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -738,7 +738,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -793,7 +793,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -848,7 +848,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -885,7 +885,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -921,7 +921,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -975,7 +975,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -1029,7 +1029,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -1083,7 +1083,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -1137,7 +1137,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqi_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -1169,7 +1169,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1201,7 +1201,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1251,7 +1251,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1302,7 +1302,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1353,7 +1353,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1404,7 +1404,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1437,7 +1437,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1469,7 +1469,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1519,7 +1519,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -1569,7 +1569,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -1619,7 +1619,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -1669,7 +1669,7 @@ RzILOpEffect *hex_il_op_j4_cmpeqn1_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -1703,7 +1703,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1738,7 +1738,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1791,7 +1791,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1844,7 +1844,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1897,7 +1897,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1950,7 +1950,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -1985,7 +1985,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2019,7 +2019,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2071,7 +2071,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2123,7 +2123,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2175,7 +2175,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2227,7 +2227,7 @@ RzILOpEffect *hex_il_op_j4_cmpgt_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2263,7 +2263,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_17 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_17)); + RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_17)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_14, jump_op_ADD_17_18); @@ -2300,7 +2300,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_17 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_17)); + RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_17)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_14, jump_op_ADD_17_18); @@ -2355,7 +2355,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -2410,7 +2410,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -2465,7 +2465,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -2520,7 +2520,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -2557,7 +2557,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -2593,7 +2593,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -2647,7 +2647,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2701,7 +2701,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2755,7 +2755,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2809,7 +2809,7 @@ RzILOpEffect *hex_il_op_j4_cmpgti_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -2841,7 +2841,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -2874,7 +2874,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -2925,7 +2925,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -2976,7 +2976,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3027,7 +3027,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3078,7 +3078,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3111,7 +3111,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3143,7 +3143,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3193,7 +3193,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -3243,7 +3243,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -3293,7 +3293,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -3343,7 +3343,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtn1_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -3377,7 +3377,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_17 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_17)); + RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_17)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_14, jump_op_ADD_17_18); @@ -3412,7 +3412,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_17 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_17)); + RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_17)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_14, jump_op_ADD_17_18); @@ -3465,7 +3465,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3518,7 +3518,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3571,7 +3571,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3624,7 +3624,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -3659,7 +3659,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -3693,7 +3693,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -3745,7 +3745,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -3797,7 +3797,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -3849,7 +3849,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -3901,7 +3901,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtu_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -3937,7 +3937,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_17 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_17)); + RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_17)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_14, jump_op_ADD_17_18); @@ -3974,7 +3974,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_17 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_17)); + RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_17)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_14, jump_op_ADD_17_18); @@ -4029,7 +4029,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4084,7 +4084,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4139,7 +4139,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4194,7 +4194,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4231,7 +4231,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -4267,7 +4267,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -4321,7 +4321,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -4375,7 +4375,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -4429,7 +4429,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -4483,7 +4483,7 @@ RzILOpEffect *hex_il_op_j4_cmpgtui_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -4517,7 +4517,7 @@ RzILOpEffect *hex_il_op_j4_cmplt_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4552,7 +4552,7 @@ RzILOpEffect *hex_il_op_j4_cmplt_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4587,7 +4587,7 @@ RzILOpEffect *hex_il_op_j4_cmplt_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -4621,7 +4621,7 @@ RzILOpEffect *hex_il_op_j4_cmplt_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -4655,7 +4655,7 @@ RzILOpEffect *hex_il_op_j4_cmpltu_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_17 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_17)); + RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_17)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_14, jump_op_ADD_17_18); @@ -4690,7 +4690,7 @@ RzILOpEffect *hex_il_op_j4_cmpltu_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_17 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_17)); + RzILOpEffect *jump_op_ADD_17_18 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_17)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_20 = SEQN(2, op_ASSIGN_14, jump_op_ADD_17_18); @@ -4725,7 +4725,7 @@ RzILOpEffect *hex_il_op_j4_cmpltu_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -4759,7 +4759,7 @@ RzILOpEffect *hex_il_op_j4_cmpltu_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_16 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_16)); + RzILOpEffect *jump_op_ADD_16_17 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_16)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_19 = SEQN(2, op_ASSIGN_13, jump_op_ADD_16_17); @@ -4805,7 +4805,7 @@ RzILOpEffect *hex_il_op_j4_jumpseti(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); RzILOpEffect *instruction_sequence = SEQN(5, imm_assign_0, imm_assign_9, op_ASSIGN_7, op_ASSIGN_12, jump_op_ADD_15_16); return instruction_sequence; @@ -4834,7 +4834,7 @@ RzILOpEffect *hex_il_op_j4_jumpsetr(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_13 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_13_14 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_13)); + RzILOpEffect *jump_op_ADD_13_14 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_13)); RzILOpEffect *instruction_sequence = SEQN(4, imm_assign_0, op_ASSIGN_7, op_ASSIGN_10, jump_op_ADD_13_14); return instruction_sequence; @@ -4859,7 +4859,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_f_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4892,7 +4892,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_f_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4943,7 +4943,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_fp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -4994,7 +4994,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_fp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -5045,7 +5045,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_fp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -5096,7 +5096,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_fp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_15 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_15)); + RzILOpEffect *jump_op_ADD_15_16 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_15)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_18 = SEQN(2, op_ASSIGN_12, jump_op_ADD_15_16); @@ -5129,7 +5129,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_t_jumpnv_nt(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -5161,7 +5161,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_t_jumpnv_t(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -5211,7 +5211,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_tp0_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -5261,7 +5261,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_tp0_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -5311,7 +5311,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_tp1_jump_nt_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); @@ -5361,7 +5361,7 @@ RzILOpEffect *hex_il_op_j4_tstbit0_tp1_jump_t_part1(HexInsnPktBundle *bundle) { // jump(pc + ((ut32) r)); RzILOpPure *op_ADD_14 = ADD(pc, CAST(32, IL_FALSE, VARL("r"))); - RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(op_ADD_14)); + RzILOpEffect *jump_op_ADD_14_15 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", op_ADD_14)); // seq(r; r = (r & -0x4); jump(pc + ((ut32) r))); RzILOpEffect *seq_then_17 = SEQN(2, op_ASSIGN_11, jump_op_ADD_14_15); diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_L2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_L2_ops.c index 4d3c1e79c0c..322f5d7ae16 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_L2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_L2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_L4_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_L4_ops.c index 8d8cb3ec22b..8113b034abb 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_L4_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_L4_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: @@ -887,9 +887,9 @@ RzILOpEffect *hex_il_op_l4_loadbsw2_ap(HexInsnPktBundle *bundle) { RzILOpEffect *seq_48 = SEQN(2, op_ASSIGN_11, for_47); // Re = ((st32) U); - RzILOpEffect *op_ASSIGN_52 = WRITE_REG(bundle, Re_op, CAST(32, IL_FALSE, VARL("U"))); + RzILOpEffect *op_ASSIGN_51 = WRITE_REG(bundle, Re_op, CAST(32, IL_FALSE, VARL("U"))); - RzILOpEffect *instruction_sequence = SEQN(5, imm_assign_0, op_ASSIGN_3, op_ASSIGN_9, seq_48, op_ASSIGN_52); + RzILOpEffect *instruction_sequence = SEQN(5, imm_assign_0, op_ASSIGN_3, op_ASSIGN_9, seq_48, op_ASSIGN_51); return instruction_sequence; } @@ -1167,9 +1167,9 @@ RzILOpEffect *hex_il_op_l4_loadbzw2_ap(HexInsnPktBundle *bundle) { RzILOpEffect *seq_48 = SEQN(2, op_ASSIGN_11, for_47); // Re = ((st32) U); - RzILOpEffect *op_ASSIGN_52 = WRITE_REG(bundle, Re_op, CAST(32, IL_FALSE, VARL("U"))); + RzILOpEffect *op_ASSIGN_51 = WRITE_REG(bundle, Re_op, CAST(32, IL_FALSE, VARL("U"))); - RzILOpEffect *instruction_sequence = SEQN(5, imm_assign_0, op_ASSIGN_3, op_ASSIGN_9, seq_48, op_ASSIGN_52); + RzILOpEffect *instruction_sequence = SEQN(5, imm_assign_0, op_ASSIGN_3, op_ASSIGN_9, seq_48, op_ASSIGN_51); return instruction_sequence; } @@ -4057,7 +4057,7 @@ RzILOpEffect *hex_il_op_l4_return(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((Rdd >> 0x20) & 0xffffffff))))); RzILOpPure *op_RSHIFT_25 = SHIFTRA(READ_REG(pkt, Rdd_op, true), SN(32, 0x20)); RzILOpPure *op_AND_27 = LOGAND(op_RSHIFT_25, SN(64, 0xffffffff)); - RzILOpEffect *jump_cast_ut32_30_31 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_27), DUP(op_AND_27))), CAST(32, MSB(DUP(op_AND_27)), DUP(op_AND_27)))))); + RzILOpEffect *jump_cast_ut32_30_31 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_27), DUP(op_AND_27))), CAST(32, MSB(DUP(op_AND_27)), DUP(op_AND_27)))))); RzILOpEffect *instruction_sequence = SEQN(5, op_ASSIGN_4, op_ASSIGN_8, op_ASSIGN_16, op_ASSIGN_21, jump_cast_ut32_30_31); return instruction_sequence; @@ -4098,7 +4098,7 @@ RzILOpEffect *hex_il_op_l4_return_f(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((Rdd >> 0x20) & 0xffffffff))))); RzILOpPure *op_RSHIFT_31 = SHIFTRA(READ_REG(pkt, Rdd_op, true), SN(32, 0x20)); RzILOpPure *op_AND_33 = LOGAND(op_RSHIFT_31, SN(64, 0xffffffff)); - RzILOpEffect *jump_cast_ut32_36_37 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_33), DUP(op_AND_33))), CAST(32, MSB(DUP(op_AND_33)), DUP(op_AND_33)))))); + RzILOpEffect *jump_cast_ut32_36_37 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_33), DUP(op_AND_33))), CAST(32, MSB(DUP(op_AND_33)), DUP(op_AND_33)))))); // nop; RzILOpEffect *nop_39 = NOP(); @@ -4153,7 +4153,7 @@ RzILOpEffect *hex_il_op_l4_return_fnew_pnt(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((Rdd >> 0x20) & 0xffffffff))))); RzILOpPure *op_RSHIFT_31 = SHIFTRA(READ_REG(pkt, Rdd_op, true), SN(32, 0x20)); RzILOpPure *op_AND_33 = LOGAND(op_RSHIFT_31, SN(64, 0xffffffff)); - RzILOpEffect *jump_cast_ut32_36_37 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_33), DUP(op_AND_33))), CAST(32, MSB(DUP(op_AND_33)), DUP(op_AND_33)))))); + RzILOpEffect *jump_cast_ut32_36_37 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_33), DUP(op_AND_33))), CAST(32, MSB(DUP(op_AND_33)), DUP(op_AND_33)))))); // nop; RzILOpEffect *nop_39 = NOP(); @@ -4208,7 +4208,7 @@ RzILOpEffect *hex_il_op_l4_return_fnew_pt(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((Rdd >> 0x20) & 0xffffffff))))); RzILOpPure *op_RSHIFT_31 = SHIFTRA(READ_REG(pkt, Rdd_op, true), SN(32, 0x20)); RzILOpPure *op_AND_33 = LOGAND(op_RSHIFT_31, SN(64, 0xffffffff)); - RzILOpEffect *jump_cast_ut32_36_37 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_33), DUP(op_AND_33))), CAST(32, MSB(DUP(op_AND_33)), DUP(op_AND_33)))))); + RzILOpEffect *jump_cast_ut32_36_37 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_33), DUP(op_AND_33))), CAST(32, MSB(DUP(op_AND_33)), DUP(op_AND_33)))))); // nop; RzILOpEffect *nop_39 = NOP(); @@ -4263,7 +4263,7 @@ RzILOpEffect *hex_il_op_l4_return_t(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((Rdd >> 0x20) & 0xffffffff))))); RzILOpPure *op_RSHIFT_30 = SHIFTRA(READ_REG(pkt, Rdd_op, true), SN(32, 0x20)); RzILOpPure *op_AND_32 = LOGAND(op_RSHIFT_30, SN(64, 0xffffffff)); - RzILOpEffect *jump_cast_ut32_35_36 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_32), DUP(op_AND_32))), CAST(32, MSB(DUP(op_AND_32)), DUP(op_AND_32)))))); + RzILOpEffect *jump_cast_ut32_35_36 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_32), DUP(op_AND_32))), CAST(32, MSB(DUP(op_AND_32)), DUP(op_AND_32)))))); // nop; RzILOpEffect *nop_38 = NOP(); @@ -4317,7 +4317,7 @@ RzILOpEffect *hex_il_op_l4_return_tnew_pnt(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((Rdd >> 0x20) & 0xffffffff))))); RzILOpPure *op_RSHIFT_30 = SHIFTRA(READ_REG(pkt, Rdd_op, true), SN(32, 0x20)); RzILOpPure *op_AND_32 = LOGAND(op_RSHIFT_30, SN(64, 0xffffffff)); - RzILOpEffect *jump_cast_ut32_35_36 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_32), DUP(op_AND_32))), CAST(32, MSB(DUP(op_AND_32)), DUP(op_AND_32)))))); + RzILOpEffect *jump_cast_ut32_35_36 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_32), DUP(op_AND_32))), CAST(32, MSB(DUP(op_AND_32)), DUP(op_AND_32)))))); // nop; RzILOpEffect *nop_38 = NOP(); @@ -4371,7 +4371,7 @@ RzILOpEffect *hex_il_op_l4_return_tnew_pt(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((Rdd >> 0x20) & 0xffffffff))))); RzILOpPure *op_RSHIFT_30 = SHIFTRA(READ_REG(pkt, Rdd_op, true), SN(32, 0x20)); RzILOpPure *op_AND_32 = LOGAND(op_RSHIFT_30, SN(64, 0xffffffff)); - RzILOpEffect *jump_cast_ut32_35_36 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_32), DUP(op_AND_32))), CAST(32, MSB(DUP(op_AND_32)), DUP(op_AND_32)))))); + RzILOpEffect *jump_cast_ut32_35_36 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, MSB(op_AND_32), DUP(op_AND_32))), CAST(32, MSB(DUP(op_AND_32)), DUP(op_AND_32)))))); // nop; RzILOpEffect *nop_38 = NOP(); diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_L6_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_L6_ops.c index 68a0168186c..c4e4aea7284 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_L6_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_L6_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_M2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_M2_ops.c index 7da89555739..190ab7ef046 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_M2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_M2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_M4_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_M4_ops.c index 730e956201b..3b51aac7985 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_M4_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_M4_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_M5_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_M5_ops.c index 9e985f53cc2..939a2ebe33c 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_M5_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_M5_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_M6_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_M6_ops.c index 42d4c2a4496..49c567ff4e7 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_M6_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_M6_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_M7_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_M7_ops.c index 9765e558065..83d2bae7fc6 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_M7_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_M7_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_R6_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_R6_ops.c index a96a58cde50..9f8467f3f41 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_R6_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_R6_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_S2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_S2_ops.c index 018133201e8..dad68401911 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_S2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_S2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_S4_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_S4_ops.c index 721363420a2..56b4b0cd6fd 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_S4_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_S4_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_S5_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_S5_ops.c index ff462ed5292..2cb22e94d2b 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_S5_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_S5_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_S6_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_S6_ops.c index 144f12f800a..be096be9047 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_S6_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_S6_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_SA1_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_SA1_ops.c index 82b5016667b..49d0fdb04cb 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_SA1_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_SA1_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_SL1_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_SL1_ops.c index 0c265133cb1..04e83198618 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_SL1_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_SL1_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_SL2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_SL2_ops.c index 5ea4aa35fdc..613dd76df11 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_SL2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_SL2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: @@ -64,7 +64,7 @@ RzILOpEffect *hex_il_op_sl2_jumpr31(HexInsnPktBundle *bundle) { RzILOpPure *lr = READ_REG(pkt, &lr_op, false); // jump(lr); - RzILOpEffect *jump_lr_1 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(lr)); + RzILOpEffect *jump_lr_1 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", lr)); RzILOpEffect *instruction_sequence = jump_lr_1; return instruction_sequence; @@ -80,7 +80,7 @@ RzILOpEffect *hex_il_op_sl2_jumpr31_f(HexInsnPktBundle *bundle) { RzILOpPure *lr = READ_REG(pkt, &lr_op, false); // jump(lr); - RzILOpEffect *jump_lr_7 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(lr)); + RzILOpEffect *jump_lr_7 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", lr)); // seq(jump(lr)); RzILOpEffect *seq_then_9 = jump_lr_7; @@ -104,7 +104,7 @@ RzILOpEffect *hex_il_op_sl2_jumpr31_fnew(HexInsnPktBundle *bundle) { RzILOpPure *lr = READ_REG(pkt, &lr_op, false); // jump(lr); - RzILOpEffect *jump_lr_7 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(lr)); + RzILOpEffect *jump_lr_7 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", lr)); // seq(jump(lr)); RzILOpEffect *seq_then_9 = jump_lr_7; @@ -128,7 +128,7 @@ RzILOpEffect *hex_il_op_sl2_jumpr31_t(HexInsnPktBundle *bundle) { RzILOpPure *lr = READ_REG(pkt, &lr_op, false); // jump(lr); - RzILOpEffect *jump_lr_6 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(lr)); + RzILOpEffect *jump_lr_6 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", lr)); // seq(jump(lr)); RzILOpEffect *seq_then_8 = jump_lr_6; @@ -151,7 +151,7 @@ RzILOpEffect *hex_il_op_sl2_jumpr31_tnew(HexInsnPktBundle *bundle) { RzILOpPure *lr = READ_REG(pkt, &lr_op, false); // jump(lr); - RzILOpEffect *jump_lr_6 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(lr)); + RzILOpEffect *jump_lr_6 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", lr)); // seq(jump(lr)); RzILOpEffect *seq_then_8 = jump_lr_6; @@ -335,7 +335,7 @@ RzILOpEffect *hex_il_op_sl2_return(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((tmp >> 0x20) & ((ut64) 0xffffffff)))))); RzILOpPure *op_RSHIFT_45 = SHIFTR0(VARL("tmp"), SN(32, 0x20)); RzILOpPure *op_AND_48 = LOGAND(op_RSHIFT_45, CAST(64, IL_FALSE, SN(64, 0xffffffff))); - RzILOpEffect *jump_cast_ut32_51_52 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_48)), CAST(32, IL_FALSE, DUP(op_AND_48)))))); + RzILOpEffect *jump_cast_ut32_51_52 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_48)), CAST(32, IL_FALSE, DUP(op_AND_48)))))); RzILOpEffect *instruction_sequence = SEQN(7, op_ASSIGN_3, op_ASSIGN_7, op_ASSIGN_13, op_ASSIGN_25, op_ASSIGN_36, op_ASSIGN_41, jump_cast_ut32_51_52); return instruction_sequence; @@ -384,7 +384,7 @@ RzILOpEffect *hex_il_op_sl2_return_f(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((tmp >> 0x20) & ((ut64) 0xffffffff)))))); RzILOpPure *op_RSHIFT_52 = SHIFTR0(VARL("tmp"), SN(32, 0x20)); RzILOpPure *op_AND_55 = LOGAND(op_RSHIFT_52, CAST(64, IL_FALSE, SN(64, 0xffffffff))); - RzILOpEffect *jump_cast_ut32_58_59 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_55)), CAST(32, IL_FALSE, DUP(op_AND_55)))))); + RzILOpEffect *jump_cast_ut32_58_59 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_55)), CAST(32, IL_FALSE, DUP(op_AND_55)))))); // nop; RzILOpEffect *nop_61 = NOP(); @@ -447,7 +447,7 @@ RzILOpEffect *hex_il_op_sl2_return_fnew(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((tmp >> 0x20) & ((ut64) 0xffffffff)))))); RzILOpPure *op_RSHIFT_51 = SHIFTR0(VARL("tmp"), SN(32, 0x20)); RzILOpPure *op_AND_54 = LOGAND(op_RSHIFT_51, CAST(64, IL_FALSE, SN(64, 0xffffffff))); - RzILOpEffect *jump_cast_ut32_57_58 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_54)), CAST(32, IL_FALSE, DUP(op_AND_54)))))); + RzILOpEffect *jump_cast_ut32_57_58 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_54)), CAST(32, IL_FALSE, DUP(op_AND_54)))))); // nop; RzILOpEffect *nop_60 = NOP(); @@ -510,7 +510,7 @@ RzILOpEffect *hex_il_op_sl2_return_t(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((tmp >> 0x20) & ((ut64) 0xffffffff)))))); RzILOpPure *op_RSHIFT_51 = SHIFTR0(VARL("tmp"), SN(32, 0x20)); RzILOpPure *op_AND_54 = LOGAND(op_RSHIFT_51, CAST(64, IL_FALSE, SN(64, 0xffffffff))); - RzILOpEffect *jump_cast_ut32_57_58 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_54)), CAST(32, IL_FALSE, DUP(op_AND_54)))))); + RzILOpEffect *jump_cast_ut32_57_58 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_54)), CAST(32, IL_FALSE, DUP(op_AND_54)))))); // nop; RzILOpEffect *nop_60 = NOP(); @@ -572,7 +572,7 @@ RzILOpEffect *hex_il_op_sl2_return_tnew(HexInsnPktBundle *bundle) { // jump(((ut32) ((st64) ((st32) ((tmp >> 0x20) & ((ut64) 0xffffffff)))))); RzILOpPure *op_RSHIFT_50 = SHIFTR0(VARL("tmp"), SN(32, 0x20)); RzILOpPure *op_AND_53 = LOGAND(op_RSHIFT_50, CAST(64, IL_FALSE, SN(64, 0xffffffff))); - RzILOpEffect *jump_cast_ut32_56_57 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_53)), CAST(32, IL_FALSE, DUP(op_AND_53)))))); + RzILOpEffect *jump_cast_ut32_56_57 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", CAST(32, IL_FALSE, CAST(64, MSB(CAST(32, IL_FALSE, op_AND_53)), CAST(32, IL_FALSE, DUP(op_AND_53)))))); // nop; RzILOpEffect *nop_59 = NOP(); diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_SS1_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_SS1_ops.c index c1e9d270966..b33a881a4c6 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_SS1_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_SS1_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_SS2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_SS2_ops.c index 3570f9b7f89..2fd7ed572bd 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_SS2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_SS2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_UNDOCUMENTED_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_UNDOCUMENTED_ops.c index ef3dbc1e884..334a9126fe5 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_UNDOCUMENTED_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_UNDOCUMENTED_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_V6_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_V6_ops.c index 0511917de28..45f6f3e98ac 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_V6_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_V6_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_Y2_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_Y2_ops.c index 299f0dcc57a..5f50c9a7db5 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_Y2_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_Y2_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_Y4_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_Y4_ops.c index f7dfbb7b6de..a1232b24475 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_Y4_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_Y4_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_Y5_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_Y5_ops.c index b25c1286a4e..b86c13d0a47 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_Y5_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_Y5_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_Y6_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_Y6_ops.c index 978b5852ff5..4992754d359 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_Y6_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_Y6_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_dep_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_dep_ops.c index fc274368c70..3ff0cf18125 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_dep_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_dep_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_invalid_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_invalid_ops.c index 0d74c98e7fc..a0941dfb43e 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_invalid_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_invalid_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/isa/hexagon/il_ops/hexagon_il_non_insn_ops.c b/librz/arch/isa/hexagon/il_ops/hexagon_il_non_insn_ops.c index ffb323e13ce..ed2c2fed4be 100644 --- a/librz/arch/isa/hexagon/il_ops/hexagon_il_non_insn_ops.c +++ b/librz/arch/isa/hexagon/il_ops/hexagon_il_non_insn_ops.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: @@ -105,14 +105,14 @@ RzILOpEffect *hex_il_op_j2_endloop01(HexInsnPktBundle *bundle) { RzILOpEffect *seq_42 = SEQN(2, seq_3, branch_41); // jump(sa0); - RzILOpEffect *jump_sa0_48 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(sa0)); + RzILOpEffect *jump_sa0_48 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", sa0)); // lc0 = lc0 - ((ut32) 0x1); RzILOpPure *op_SUB_52 = SUB(READ_REG(pkt, &lc0_op, true), CAST(32, IL_FALSE, SN(32, 1))); RzILOpEffect *op_ASSIGN_53 = WRITE_REG(bundle, &lc0_op, op_SUB_52); // jump(sa1); - RzILOpEffect *jump_sa1_59 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(sa1)); + RzILOpEffect *jump_sa1_59 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", sa1)); // lc1 = lc1 - ((ut32) 0x1); RzILOpPure *op_SUB_63 = SUB(READ_REG(pkt, &lc1_op, true), CAST(32, IL_FALSE, SN(32, 1))); @@ -148,7 +148,7 @@ RzILOpEffect *hex_il_op_j2_endloop1(HexInsnPktBundle *bundle) { RzILOpPure *sa1 = READ_REG(pkt, &sa1_op, false); // jump(sa1); - RzILOpEffect *jump_sa1_5 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(sa1)); + RzILOpEffect *jump_sa1_5 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", sa1)); // lc1 = lc1 - ((ut32) 0x1); RzILOpPure *op_SUB_9 = SUB(READ_REG(pkt, &lc1_op, true), CAST(32, IL_FALSE, SN(32, 1))); @@ -253,7 +253,7 @@ RzILOpEffect *hex_il_op_j2_endloop0(HexInsnPktBundle *bundle) { RzILOpEffect *seq_42 = SEQN(2, seq_3, branch_41); // jump(sa0); - RzILOpEffect *jump_sa0_48 = SEQ2(SETL("jump_flag", IL_TRUE), JMP(sa0)); + RzILOpEffect *jump_sa0_48 = SEQ2(SETL("jump_flag", IL_TRUE), SETL("jump_target", sa0)); // lc0 = lc0 - ((ut32) 0x1); RzILOpPure *op_SUB_52 = SUB(READ_REG(pkt, &lc0_op, true), CAST(32, IL_FALSE, SN(32, 1))); @@ -954,19 +954,7 @@ RZ_IPI RZ_OWN RzILOpEffect *hex_il_op_jump_flag_init(HexInsnPktBundle *bundle) { } RZ_IPI RZ_OWN RzILOpEffect *hex_il_op_next_pkt_jmp(HexInsnPktBundle *bundle) { - bool has_direct_jump = false; - void **it; - rz_pvector_foreach (bundle->pkt->il_ops, it) { - HexILOp *op = *it; - if (op->attr & HEX_IL_INSN_ATTR_BRANCH && !(op->attr & HEX_IL_INSN_ATTR_COND)) { - has_direct_jump = true; - } - } - if (!has_direct_jump) { - // Append the jump to the adjacent packet. - return BRANCH(VARL("jump_flag"), EMPTY(), JMP(U32(bundle->pkt->pkt_addr + (HEX_INSN_SIZE * rz_list_length(bundle->pkt->bin))))); - } - return EMPTY(); + return BRANCH(VARL("jump_flag"), JMP(VARL("jump_target")), JMP(U32(bundle->pkt->pkt_addr + (HEX_INSN_SIZE * rz_list_length(bundle->pkt->bin))))); } -#include \ No newline at end of file +#include diff --git a/librz/arch/p/analysis/analysis_hexagon.c b/librz/arch/p/analysis/analysis_hexagon.c index 23a04ff45de..6746b69afd1 100644 --- a/librz/arch/p/analysis/analysis_hexagon.c +++ b/librz/arch/p/analysis/analysis_hexagon.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: diff --git a/librz/arch/p/asm/asm_hexagon.c b/librz/arch/p/asm/asm_hexagon.c index 32bfdd86ee9..9567f70d013 100644 --- a/librz/arch/p/asm/asm_hexagon.c +++ b/librz/arch/p/asm/asm_hexagon.c @@ -3,7 +3,7 @@ // LLVM commit: b6f51787f6c8e77143f0aef6b58ddc7c55741d5c // LLVM commit date: 2023-11-15 07:10:59 -0800 (ISO 8601 format) -// Date of code generation: 2024-03-16 00:50:15-05:00 +// Date of code generation: 2024-03-16 06:22:39-05:00 //======================================== // The following code is generated. // Do not edit. Repository of code generator: