From d8fc1f61e3821c7b556be821f8bbaefa7c5a4eaf Mon Sep 17 00:00:00 2001 From: Rot127 Date: Fri, 6 Dec 2024 09:49:58 -0500 Subject: [PATCH 1/5] Fix check for rfe, operand is now an memory operand. --- librz/arch/isa/arm/arm_il32.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/librz/arch/isa/arm/arm_il32.c b/librz/arch/isa/arm/arm_il32.c index d895222110b..0e34dfbb85f 100644 --- a/librz/arch/isa/arm/arm_il32.c +++ b/librz/arch/isa/arm/arm_il32.c @@ -1947,10 +1947,10 @@ static RzILOpEffect *revsh(cs_insn *insn, bool is_thumb) { * ARM: rfeda, rfedb, rfaia, rfeib */ static RzILOpEffect *rfe(cs_insn *insn, bool is_thumb) { - if (!ISREG(0)) { + if (!ISMEM(0)) { return NULL; } - RzILOpBitVector *base = REG(0); + RzILOpBitVector *base = MEMBASE(0); if (!base) { return NULL; } From c56c1c353bb8a8c69782749f93ae9309b69a1361 Mon Sep 17 00:00:00 2001 From: Rot127 Date: Fri, 6 Dec 2024 09:50:36 -0500 Subject: [PATCH 2/5] Use ARM features upper case identifiers. --- librz/arch/isa/arm/arm_il32.c | 20 ++++++++++---------- librz/arch/p/analysis/analysis_arm_cs.c | 14 +++++++------- librz/arch/p/asm/asm_arm_cs.c | 6 +++--- 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/librz/arch/isa/arm/arm_il32.c b/librz/arch/isa/arm/arm_il32.c index 0e34dfbb85f..3c48b568a51 100644 --- a/librz/arch/isa/arm/arm_il32.c +++ b/librz/arch/isa/arm/arm_il32.c @@ -3623,12 +3623,12 @@ RZ_IPI bool rz_arm_cs_is_float_insn(const cs_insn *insn) { switch (group_it) { default: break; - case ARM_FEATURE_HasNEON: - case ARM_FEATURE_HasVFP2: - case ARM_FEATURE_HasVFP3: - case ARM_FEATURE_HasVFP4: - case ARM_FEATURE_HasDPVFP: - case ARM_FEATURE_HasMVEFloat: + case ARM_FEATURE_HASNEON: + case ARM_FEATURE_HASVFP2: + case ARM_FEATURE_HASVFP3: + case ARM_FEATURE_HASVFP4: + case ARM_FEATURE_HASDPVFP: + case ARM_FEATURE_HASMVEFLOAT: return true; } group_it = insn->detail->groups[++i]; @@ -3653,7 +3653,7 @@ static RzILOpEffect *try_as_int_cvt(cs_insn *insn, bool is_thumb, bool *success) ut32 fl_sz = rz_float_get_format_info(is_f2i ? from_fmt : to_fmt, RZ_FLOAT_INFO_TOTAL_LEN); #if CS_NEXT_VERSION >= 6 - if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HasNEON)) { + if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HASNEON)) { #else if (!rz_arm_cs_is_group_member(insn, ARM_GRP_NEON)) { #endif @@ -3890,7 +3890,7 @@ static RzILOpEffect *vadd(cs_insn *insn, bool is_thumb) { bool is_float_vec = fmt == RZ_FLOAT_UNK ? false : true; #if CS_NEXT_VERSION >= 6 - if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HasNEON)) { + if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HASNEON)) { #else if (!rz_arm_cs_is_group_member(insn, ARM_GRP_NEON)) { #endif @@ -3941,7 +3941,7 @@ static RzILOpEffect *vsub(cs_insn *insn, bool is_thumb) { bool is_float_vec = fmt == RZ_FLOAT_UNK ? false : true; #if CS_NEXT_VERSION >= 6 - if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HasNEON)) { + if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HASNEON)) { #else if (!rz_arm_cs_is_group_member(insn, ARM_GRP_NEON)) { #endif @@ -3990,7 +3990,7 @@ static RzILOpEffect *vmul(cs_insn *insn, bool is_thumb) { RzFloatFormat fmt = dt2fmt(dt); #if CS_NEXT_VERSION >= 6 - if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HasNEON)) { + if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HASNEON)) { #else if (!rz_arm_cs_is_group_member(insn, ARM_GRP_NEON)) { #endif diff --git a/librz/arch/p/analysis/analysis_arm_cs.c b/librz/arch/p/analysis/analysis_arm_cs.c index 4a2cee72a14..91da755601c 100644 --- a/librz/arch/p/analysis/analysis_arm_cs.c +++ b/librz/arch/p/analysis/analysis_arm_cs.c @@ -1292,20 +1292,20 @@ static void anop32(RzAnalysis *a, csh handle, RzAnalysisOp *op, cs_insn *insn, b /* grab family */ #if CS_NEXT_VERSION >= 6 - if (cs_insn_group(handle, insn, ARM_FEATURE_HasAES)) { + if (cs_insn_group(handle, insn, ARM_FEATURE_HASAES)) { op->family = RZ_ANALYSIS_OP_FAMILY_CRYPTO; - } else if (cs_insn_group(handle, insn, ARM_FEATURE_HasCRC)) { + } else if (cs_insn_group(handle, insn, ARM_FEATURE_HASCRC)) { op->family = RZ_ANALYSIS_OP_FAMILY_CRYPTO; } else if (cs_insn_group(handle, insn, ARM_GRP_PRIVILEGE)) { op->family = RZ_ANALYSIS_OP_FAMILY_PRIV; - } else if (cs_insn_group(handle, insn, ARM_FEATURE_HasVirtualization)) { + } else if (cs_insn_group(handle, insn, ARM_FEATURE_HASVIRTUALIZATION)) { op->family = RZ_ANALYSIS_OP_FAMILY_VIRT; - } else if (cs_insn_group(handle, insn, ARM_FEATURE_HasNEON)) { + } else if (cs_insn_group(handle, insn, ARM_FEATURE_HASNEON)) { op->family = RZ_ANALYSIS_OP_FAMILY_MMX; - } else if (cs_insn_group(handle, insn, ARM_FEATURE_HasFPARMv8)) { + } else if (cs_insn_group(handle, insn, ARM_FEATURE_HASFPARMV8)) { op->family = RZ_ANALYSIS_OP_FAMILY_FPU; - } else if (cs_insn_group(handle, insn, ARM_FEATURE_HasDSP) && - cs_insn_group(handle, insn, ARM_FEATURE_HasDSP)) { + } else if (cs_insn_group(handle, insn, ARM_FEATURE_HASDSP) && + cs_insn_group(handle, insn, ARM_FEATURE_HASDSP)) { op->family = RZ_ANALYSIS_OP_FAMILY_MMX; } else { op->family = RZ_ANALYSIS_OP_FAMILY_CPU; diff --git a/librz/arch/p/asm/asm_arm_cs.c b/librz/arch/p/asm/asm_arm_cs.c index f875e3186c1..c0d13b8ace4 100644 --- a/librz/arch/p/asm/asm_arm_cs.c +++ b/librz/arch/p/asm/asm_arm_cs.c @@ -41,9 +41,9 @@ static bool check_features(RzAsm *a, cs_insn *insn) { int id = insn->detail->groups[i]; switch (id) { #if CS_NEXT_VERSION >= 6 - case ARM_FEATURE_IsARM: - case ARM_FEATURE_IsThumb: - case ARM_FEATURE_IsThumb2: + case ARM_FEATURE_ISARM: + case ARM_FEATURE_ISTHUMB: + case ARM_FEATURE_ISTHUMB2: #else case ARM_GRP_ARM: case ARM_GRP_THUMB: From 07c16bc6791e2e89089d6290983d1badf31594de Mon Sep 17 00:00:00 2001 From: Rot127 Date: Mon, 16 Dec 2024 12:47:16 -0500 Subject: [PATCH 3/5] Bump Capstone to newest next. --- subprojects/capstone-next.wrap | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/subprojects/capstone-next.wrap b/subprojects/capstone-next.wrap index 7c7ae21ede8..b8e5abf220c 100644 --- a/subprojects/capstone-next.wrap +++ b/subprojects/capstone-next.wrap @@ -1,6 +1,6 @@ [wrap-git] url = https://github.com/capstone-engine/capstone.git -revision = 1ecfb5b04235539e0d94cc67b8984347be2f6a73 +revision = be6be784980079b2d90be3e78e9f011ab3fcadbd directory = capstone-next patch_directory = capstone-next depth = 1 From e0ef56ba0dee863be5410de6960e9b43b5cc5b9e Mon Sep 17 00:00:00 2001 From: Rot127 Date: Mon, 16 Dec 2024 13:08:14 -0500 Subject: [PATCH 4/5] Fix trivial tests --- test/db/analysis/arm | 4 ++-- test/db/analysis/ppc | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/test/db/analysis/arm b/test/db/analysis/arm index ca74e495a31..3bc03d73344 100644 --- a/test/db/analysis/arm +++ b/test/db/analysis/arm @@ -912,7 +912,7 @@ pseudo: push (r3, lr) mnemonic: push mask: ffffffff prefix: 0 -id: 438 +id: 440 bytes: 08402de9 refptr: 0 size: 4 @@ -935,7 +935,7 @@ mnemonic: add description: add two values mask: ffff prefix: 0 -id: 31 +id: 33 bytes: 00af refptr: 0 size: 2 diff --git a/test/db/analysis/ppc b/test/db/analysis/ppc index f07f22238ee..b442cddbf8d 100644 --- a/test/db/analysis/ppc +++ b/test/db/analysis/ppc @@ -716,7 +716,7 @@ EXPECT=< Date: Tue, 17 Dec 2024 16:08:41 +0800 Subject: [PATCH 5/5] Update capstone-next.wrap --- subprojects/capstone-next.wrap | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/subprojects/capstone-next.wrap b/subprojects/capstone-next.wrap index b8e5abf220c..95ca2cfb7df 100644 --- a/subprojects/capstone-next.wrap +++ b/subprojects/capstone-next.wrap @@ -1,6 +1,6 @@ [wrap-git] url = https://github.com/capstone-engine/capstone.git -revision = be6be784980079b2d90be3e78e9f011ab3fcadbd +revision = 9907b22d33693f3beb4b8b7ba261fbdd219afee3 directory = capstone-next patch_directory = capstone-next depth = 1