diff --git a/librz/arch/isa/ppc/ppc_il.c b/librz/arch/isa/ppc/ppc_il.c
index 5c47d7a1eca..9da8cef541e 100644
--- a/librz/arch/isa/ppc/ppc_il.c
+++ b/librz/arch/isa/ppc/ppc_il.c
@@ -85,10 +85,8 @@ RZ_IPI st32 ppc_get_mem_acc_size(ut32 insn_id) {
 	default:
 		RZ_LOG_INFO("Memory access size for instruction %d requested. But it is not in the switch case.\n", insn_id);
 		return -1;
-#if CS_NEXT_VERSION < 6
 	case PPC_INS_LI:
 	case PPC_INS_LIS:
-#endif
 		// Doesn't read from memory.
 		return 0;
 	case PPC_INS_LBZ:
diff --git a/librz/arch/isa/ppc/ppc_il_ops.c b/librz/arch/isa/ppc/ppc_il_ops.c
index 159a774b20c..2a2acb427fe 100644
--- a/librz/arch/isa/ppc/ppc_il_ops.c
+++ b/librz/arch/isa/ppc/ppc_il_ops.c
@@ -21,9 +21,7 @@ static RzILOpEffect *load_op(RZ_BORROW csh handle, RZ_BORROW cs_insn *insn, cons
 	const char *rB = cs_reg_name(handle, INSOP(1).mem.offset);
 #endif
 	st64 d = INSOP(1).mem.disp; // RA = base ; D = Disposition
-#if CS_NEXT_VERSION < 6
 	st64 sI = INSOP(1).imm; // liX instructions (alias for addX).
-#endif
 	bool update_ra = ppc_updates_ra_with_ea(id); // Save ea in RA?
 	ut32 mem_acc_size = ppc_get_mem_acc_size(id);
 	RzILOpPure *base;
@@ -49,7 +47,6 @@ static RzILOpEffect *load_op(RZ_BORROW csh handle, RZ_BORROW cs_insn *insn, cons
 	switch (id) {
 	default:
 		NOT_IMPLEMENTED;
-#if CS_NEXT_VERSION < 6
 	case PPC_INS_LI: // RT = sI
 		into_rt = EXTEND(PPC_ARCH_BITS, SN(16, sI));
 		update_ra = false;
@@ -58,7 +55,6 @@ static RzILOpEffect *load_op(RZ_BORROW csh handle, RZ_BORROW cs_insn *insn, cons
 		into_rt = EXTEND(PPC_ARCH_BITS, APPEND(SN(16, sI), U16(0)));
 		update_ra = false;
 		break;
-#endif
 	case PPC_INS_LA: // RT = EA
 		NOT_IMPLEMENTED;
 	case PPC_INS_LBZ:
@@ -1492,10 +1488,8 @@ RZ_IPI RzILOpEffect *rz_ppc_cs_get_il_op(RZ_BORROW csh handle, RZ_BORROW cs_insn
 	case PPC_INS_MULLW:
 		lop = div_mul_op(handle, insn, mode);
 		break;
-#if CS_NEXT_VERSION < 6
 	case PPC_INS_LI:
 	case PPC_INS_LIS:
-#endif
 	case PPC_INS_LA:
 	case PPC_INS_LBZ:
 	case PPC_INS_LBZU:
diff --git a/librz/arch/p/analysis/analysis_ppc_cs.c b/librz/arch/p/analysis/analysis_ppc_cs.c
index 4952c15464a..880b6b1fe0f 100644
--- a/librz/arch/p/analysis/analysis_ppc_cs.c
+++ b/librz/arch/p/analysis/analysis_ppc_cs.c
@@ -1036,7 +1036,12 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf
 			esilprintf(op, "%s,lr,=", ARG(0));
 			break;
 #if CS_NEXT_VERSION < 6
+		case PPC_INS_CLRLWI:
+			op->type = RZ_ANALYSIS_OP_TYPE_AND;
+			esilprintf(op, "%s,%s,&,%s,=", ARG(1), cmask32(a, ARG(2), "0x1F"), ARG(0));
+			break;
 		case PPC_INS_MR:
+#endif
 		case PPC_INS_LI:
 			op->type = RZ_ANALYSIS_OP_TYPE_MOV;
 			op->val = IMM(1);
@@ -1048,11 +1053,6 @@ static int analyze_op(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf
 			op->val <<= 16;
 			esilprintf(op, "%s0000,%s,=", ARG(1), ARG(0));
 			break;
-		case PPC_INS_CLRLWI:
-			op->type = RZ_ANALYSIS_OP_TYPE_AND;
-			esilprintf(op, "%s,%s,&,%s,=", ARG(1), cmask32(a, ARG(2), "0x1F"), ARG(0));
-			break;
-#endif
 		case PPC_INS_RLWINM:
 			op->type = RZ_ANALYSIS_OP_TYPE_ROL;
 			esilprintf(op, "%s,%s,<<<,%s,&,%s,=", ARG(2), ARG(1), cmask32(a, ARG(3), ARG(4)), ARG(0));