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aceitera.kicad_pcb
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aceitera.kicad_pcb
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(kicad_pcb (version 20211014) (generator pcbnew)
(general
(thickness 1.6)
)
(paper "A4")
(layers
(0 "F.Cu" signal)
(31 "B.Cu" signal)
(32 "B.Adhes" user "B.Adhesive")
(33 "F.Adhes" user "F.Adhesive")
(34 "B.Paste" user)
(35 "F.Paste" user)
(36 "B.SilkS" user "B.Silkscreen")
(37 "F.SilkS" user "F.Silkscreen")
(38 "B.Mask" user)
(39 "F.Mask" user)
(40 "Dwgs.User" user "User.Drawings")
(41 "Cmts.User" user "User.Comments")
(42 "Eco1.User" user "User.Eco1")
(43 "Eco2.User" user "User.Eco2")
(44 "Edge.Cuts" user)
(45 "Margin" user)
(46 "B.CrtYd" user "B.Courtyard")
(47 "F.CrtYd" user "F.Courtyard")
(48 "B.Fab" user)
(49 "F.Fab" user)
)
(setup
(stackup
(layer "F.SilkS" (type "Top Silk Screen"))
(layer "F.Paste" (type "Top Solder Paste"))
(layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01))
(layer "F.Cu" (type "copper") (thickness 0.035))
(layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
(layer "B.Cu" (type "copper") (thickness 0.035))
(layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01))
(layer "B.Paste" (type "Bottom Solder Paste"))
(layer "B.SilkS" (type "Bottom Silk Screen"))
(copper_finish "None")
(dielectric_constraints no)
)
(pad_to_mask_clearance 0)
(pcbplotparams
(layerselection 0x00010fc_ffffffff)
(disableapertmacros false)
(usegerberextensions false)
(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(svguseinch false)
(svgprecision 6)
(excludeedgelayer true)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(dxfpolygonmode true)
(dxfimperialunits true)
(dxfusepcbnewfont true)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(sketchpadsonfab false)
(subtractmaskfromsilk true)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory "Gerber/")
)
)
(property "DATE" "2020-08-27")
(property "REVISION" "v0.1")
(property "TITLE" "Aceitera")
(property "URL" "github.com/rockola/aceitera")
(net 0 "")
(net 1 "Net-(C1-Pad2)")
(net 2 "Net-(C1-Pad1)")
(net 3 "Net-(C2-Pad2)")
(net 4 "Net-(C2-Pad1)")
(net 5 "Net-(C3-Pad2)")
(net 6 "GND")
(net 7 "Net-(C4-Pad1)")
(net 8 "Net-(C6-Pad1)")
(net 9 "Net-(C7-Pad1)")
(net 10 "+9V")
(net 11 "Net-(D1-Pad1)")
(net 12 "VCC")
(net 13 "OUT")
(net 14 "IN")
(footprint "rockola_kicad_footprints:Header_1x03_P2.00mm" (layer "F.Cu")
(tedit 5F4782D7) (tstamp 116a57e7-f69b-4854-ba39-e1fb2e70a078)
(at 110.744 90.043 -90)
(descr "Through hole straight pin header, 1x03, 2.00mm pitch, single row")
(tags "Through hole pin header THT 1x03 2.00mm single row")
(property "Sheet file" "/mnt/Library/Electronics/src/aceitera/aceitera.kicad_sch")
(property "Sheet name" "")
(path "/92463281-9915-4eaa-afc4-df3249f9c8fa")
(attr through_hole)
(fp_text reference "RV1" (at 0.508 6.35) (layer "F.SilkS")
(effects (font (size 0.8 0.8) (thickness 0.127)))
(tstamp 15251f71-adff-4008-ba19-d7f2df34e30b)
)
(fp_text value "Volume A100k" (at 0 6.06 -90) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 4f0eba2f-048c-4de5-92bf-14c7f7d68bde)
)
(fp_text user "1" (at 0.762 -1.016 unlocked) (layer "B.SilkS")
(effects (font (size 0.6 0.6) (thickness 0.1)) (justify mirror))
(tstamp 73be5e6b-5afc-4848-985b-8584d950341b)
)
(fp_text user "1" (at 0.8128 -1.27 unlocked) (layer "F.SilkS")
(effects (font (size 0.6 0.6) (thickness 0.1)))
(tstamp 822ee974-cbb4-4353-b3bf-330aad42028e)
)
(fp_text user "${REFERENCE}" (at 0 2) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 6fe2d88b-33ed-4ab5-bc2c-4fac512a058a)
)
(fp_line (start -1.06 5.06) (end 1.06 5.06) (layer "F.SilkS") (width 0.12) (tstamp 5a895573-152c-4efe-87b6-58f833326262))
(fp_line (start -1.0668 -1.0668) (end -1.06 5.06) (layer "F.SilkS") (width 0.12) (tstamp 753bbc0a-ee04-4e07-9059-709c82af9b01))
(fp_line (start -1.070834 -1.068781) (end 0.2794 -1.0668) (layer "F.SilkS") (width 0.12) (tstamp b2387e80-5c8b-4c87-a6d4-eefbe14ae03f))
(fp_line (start 1.06 -0.7874) (end 1.06 5.06) (layer "F.SilkS") (width 0.12) (tstamp c6cea18b-7662-41dd-9bd5-19b0477da867))
(fp_line (start -1.5 5.5) (end 1.5 5.5) (layer "F.CrtYd") (width 0.05) (tstamp 0c148426-2ef5-406b-993e-690665bd6e87))
(fp_line (start 1.5 -1.5) (end -1.5 -1.5) (layer "F.CrtYd") (width 0.05) (tstamp 159cc886-d5be-496b-925a-888e18aaec78))
(fp_line (start 1.5 5.5) (end 1.5 -1.5) (layer "F.CrtYd") (width 0.05) (tstamp c7ead496-c691-413c-b3e7-ed9aa96d5911))
(fp_line (start -1.5 -1.5) (end -1.5 5.5) (layer "F.CrtYd") (width 0.05) (tstamp d107222e-ee97-4cc3-9242-dd3d703015eb))
(fp_line (start -1 -0.5) (end -0.5 -1) (layer "F.Fab") (width 0.1) (tstamp 3239e979-f4fd-43a9-b4a3-44a13ff832fe))
(fp_line (start 1 5) (end -1 5) (layer "F.Fab") (width 0.1) (tstamp 45abd6c3-0086-4abc-8c53-7e645f2ea180))
(fp_line (start -1 5) (end -1 -0.5) (layer "F.Fab") (width 0.1) (tstamp 4d2561c5-e557-4407-8c25-4ffadd925203))
(fp_line (start 1 -1) (end 1 5) (layer "F.Fab") (width 0.1) (tstamp e30b8b4f-3940-4efb-becc-328d82b03c62))
(fp_line (start -0.5 -1) (end 1 -1) (layer "F.Fab") (width 0.1) (tstamp f8e62a81-7f13-487b-b4b4-35c214058399))
(pad "1" thru_hole rect locked (at 0 0 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask)
(net 5 "Net-(C3-Pad2)") (pinfunction "1") (tstamp 319f66f0-6f19-4237-b748-02c21b1de615))
(pad "2" thru_hole oval locked (at 0 2 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask)
(net 13 "OUT") (pinfunction "2") (tstamp 28867935-fbf3-46b0-abce-abaac5ec331b))
(pad "3" thru_hole oval locked (at 0 4 270) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask)
(net 6 "GND") (pinfunction "3") (tstamp 5e6eb21b-941d-4164-bee7-05a50d717e9b))
(model "${KISYS3DMOD}/Connector_PinHeader_2.00mm.3dshapes/PinHeader_1x03_P2.00mm_Vertical.wrl"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(footprint "Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder" (layer "F.Cu")
(tedit 5B36C52B) (tstamp 21e35352-7e08-48b5-9d02-f5aa108abc39)
(at 109.601 83.566 180)
(descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
(tags "capacitor handsolder")
(property "Sheet file" "/mnt/Library/Electronics/src/aceitera/aceitera.kicad_sch")
(property "Sheet name" "")
(path "/2d874075-f196-415a-bb2c-61872ae880c9")
(attr smd)
(fp_text reference "C5" (at 2.54 -0.127) (layer "F.SilkS")
(effects (font (size 0.8 0.8) (thickness 0.15)))
(tstamp 1bca93e7-e4f8-49a5-a3da-204e91f2b179)
)
(fp_text value "10p" (at 0 1.65) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp e4290f03-d01e-4b7f-be4f-e193dd807ee4)
)
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
(effects (font (size 0.5 0.5) (thickness 0.08)))
(tstamp 1774429a-9d51-4706-b798-6e86aac8514a)
)
(fp_line (start -0.261252 -0.71) (end 0.261252 -0.71) (layer "F.SilkS") (width 0.12) (tstamp 941d63d6-713b-4d13-8b5b-4c3c01b6c1d9))
(fp_line (start -0.261252 0.71) (end 0.261252 0.71) (layer "F.SilkS") (width 0.12) (tstamp ba55b911-c9e8-4d02-9146-f1694f78d35c))
(fp_line (start 1.85 0.95) (end -1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 31a75d65-6ce0-4932-a939-2bb658c8ebac))
(fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 49f9821e-27fe-4a09-ad62-b7ff4d1089a4))
(fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 60e62a17-44cd-4898-a0a2-69465d915e81))
(fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 69b33937-a164-4eed-a950-a890a213f3a2))
(fp_line (start 1 -0.6) (end 1 0.6) (layer "F.Fab") (width 0.1) (tstamp 00c49d27-efb9-4dd6-8249-b9a616c164bf))
(fp_line (start 1 0.6) (end -1 0.6) (layer "F.Fab") (width 0.1) (tstamp 7ab5b201-0d7e-480e-8bae-9dcdd77ada1f))
(fp_line (start -1 0.6) (end -1 -0.6) (layer "F.Fab") (width 0.1) (tstamp c5eafb95-734e-4765-8fab-db00909dd4a3))
(fp_line (start -1 -0.6) (end 1 -0.6) (layer "F.Fab") (width 0.1) (tstamp c926c94d-720f-425c-bc45-4fca10017779))
(pad "1" smd roundrect locked (at -1.025 0 180) (size 1.15 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2173913043)
(net 1 "Net-(C1-Pad2)") (tstamp 66187ff4-b877-49b3-a1ae-3d9d7e6e4924))
(pad "2" smd roundrect locked (at 1.025 0 180) (size 1.15 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2173913043)
(net 6 "GND") (tstamp 7de12d6f-6db3-474e-921d-d843ea6c2e03))
(model "${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(footprint "rockola_kicad_footprints:Stomp_IVGO_P2.00mm" (layer "F.Cu")
(tedit 5F477F2B) (tstamp 31415d68-898e-43c9-b6a7-a1717138c494)
(at 113.919 90.043)
(descr "Through hole straight pin header, 1x04, 2.00mm pitch, single row")
(tags "Through hole pin header THT 1x04 2.00mm single row")
(property "Sheet file" "/mnt/Library/Electronics/src/aceitera/aceitera.kicad_sch")
(property "Sheet name" "")
(path "/ca40b0ec-2b4b-4340-9d7a-b2b5c528ec87")
(attr through_hole)
(fp_text reference "J1" (at 3.429 -2.159 180) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 98425819-85bc-42e6-aa7f-1adf4a1e6776)
)
(fp_text value "Conn_01x04_Female" (at 3.175 2.159) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 2efeff7d-624f-4643-9184-499cfc190053)
)
(fp_text user "IN" (at -0.1016 -1.4224 unlocked) (layer "B.SilkS")
(effects (font (size 0.8 0.8) (thickness 0.127)) (justify mirror))
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