diff --git a/src/pool.rs b/src/pool.rs
index 03c19dd92c..71e06ade9b 100644
--- a/src/pool.rs
+++ b/src/pool.rs
@@ -5,7 +5,7 @@
 //! This module/API is only available on these compilation targets:
 //!
 //! - ARM architectures which instruction set include the LDREX, CLREX and STREX instructions, e.g.
-//! `thumbv7m-none-eabi` but not `thumbv6m-none-eabi`
+//!   `thumbv7m-none-eabi` but not `thumbv6m-none-eabi`
 //! - 32-bit x86, e.g. `i686-unknown-linux-gnu`
 //!
 //! # Benchmarks
@@ -37,8 +37,8 @@
 //! ```
 //!
 //! - measurement method: the cycle counter (CYCCNT) register was sampled each time a breakpoint
-//! (`bkpt`) was hit. the difference between the "after" and the "before" value of CYCCNT yields the
-//! execution time in clock cycles.
+//!   (`bkpt`) was hit. the difference between the "after" and the "before" value of CYCCNT yields the
+//!   execution time in clock cycles.
 //!
 //! | API                          | clock cycles |
 //! |------------------------------|--------------|