Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Rust 1.45+ generates suboptimal control flow for ARMv7 atomic compare exchange #123113

Open
ds84182 opened this issue Mar 26, 2024 · 2 comments
Open
Labels
A-codegen Area: Code generation A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. C-optimization Category: An issue highlighting optimization opportunities or PRs implementing such I-heavy Issue: Problems and improvements with respect to binary size of generated code. I-slow Issue: Problems and improvements with respect to performance of generated code. O-Arm Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state P-low Low priority regression-from-stable-to-stable Performance or correctness regression from one stable version to another. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.

Comments

@ds84182
Copy link

ds84182 commented Mar 26, 2024

Code

I tried this code:

https://rust.godbolt.org/z/vP88v5GGc

I expected to see this happen:

A tight loop.

Instead, this happened:

In Rust 1.45 and later, LLVM generates a switch + unconditional branch to a conditional branch. This happens in opt-level=z, s, 1, 2, 3.

In some versions generates a dead branch, e.g.

mov r2, #0
cmp r2, #0
bne ... # If this branch is taken, hell has frozen over.

Version it worked on

It most recently worked on: 1.44

Version with regression

rustc --version --verbose:

rustc 1.79.0-nightly (0824b300e 2024-03-24)
binary: rustc
commit-hash: 0824b300eb0dae5d9ed59719d3f2732016683d66
commit-date: 2024-03-24
host: x86_64-unknown-linux-gnu
release: 1.79.0-nightly
LLVM version: 18.1.2

@rustbot modify labels: +regression-from-stable-to-stable -regression-untriaged

@ds84182 ds84182 added C-bug Category: This is a bug. regression-untriaged Untriaged performance or correctness regression. labels Mar 26, 2024
@rustbot rustbot added I-prioritize Issue: Indicates that prioritization has been requested for this issue. needs-triage This issue may need triage. Remove it if it has been sufficiently triaged. regression-from-stable-to-stable Performance or correctness regression from one stable version to another. and removed regression-untriaged Untriaged performance or correctness regression. labels Mar 26, 2024
@workingjubilee workingjubilee added I-slow Issue: Problems and improvements with respect to performance of generated code. I-heavy Issue: Problems and improvements with respect to binary size of generated code. C-optimization Category: An issue highlighting optimization opportunities or PRs implementing such A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. A-codegen Area: Code generation T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. O-Arm Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state and removed C-bug Category: This is a bug. needs-triage This issue may need triage. Remove it if it has been sufficiently triaged. labels Mar 27, 2024
@apiraino
Copy link
Contributor

apiraino commented Mar 27, 2024 via email

@rustbot rustbot added P-low Low priority and removed I-prioritize Issue: Indicates that prioritization has been requested for this issue. labels Mar 27, 2024
@cuviper
Copy link
Member

cuviper commented Mar 29, 2024

FWIW, Rust 1.45 corresponds to the LLVM 10 upgrade: #67759

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
A-codegen Area: Code generation A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. C-optimization Category: An issue highlighting optimization opportunities or PRs implementing such I-heavy Issue: Problems and improvements with respect to binary size of generated code. I-slow Issue: Problems and improvements with respect to performance of generated code. O-Arm Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state P-low Low priority regression-from-stable-to-stable Performance or correctness regression from one stable version to another. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
Projects
None yet
Development

No branches or pull requests

5 participants