ECE 571
DDR3 Controller Design and Verification
Roy Kravitz
All Primary Source codes are in Simulation folder. Please Review these codes.
Re-direct to Simulation folder. -> Makefile --> make all (For Full Compilation and Running the test)
- Teja - Architecture and RTL Design
- Tejas - Emulation and Verification
- Suraj - RTL Design and Verification
- Rahul - RTL Design and Verification