diff --git a/afro_pr0.inc b/afro_pr0.inc index bf2c245..8b14e1c 100644 --- a/afro_pr0.inc +++ b/afro_pr0.inc @@ -18,6 +18,7 @@ .equ MOTOR_ADVANCE = 15 .equ CHECK_HARDWARE = 1 .equ ENABLE_ALL = 1 +.equ HIGH_SIDE_PWM = 1 ;********************* ; PORT B definitions * diff --git a/afro_pr1.inc b/afro_pr1.inc index febe886..b00f086 100644 --- a/afro_pr1.inc +++ b/afro_pr1.inc @@ -17,6 +17,7 @@ .equ DEAD_HIGH_NS = 900 .equ MOTOR_ADVANCE = 15 .equ CHECK_HARDWARE = 1 +.equ HIGH_SIDE_PWM = 1 ;********************* ; PORT B definitions * diff --git a/mkblctrl1.inc b/mkblctrl1.inc index 31ae9b4..a30a913 100644 --- a/mkblctrl1.inc +++ b/mkblctrl1.inc @@ -3,12 +3,12 @@ ;* 2012-12-02 * ;***************************************** -; P and N are actually reversed here to do high side PWM to work around -; the sense divider being too weak for phase voltages higher than 10V. -; Also, the 100nf filtering capacitors shift the timing so much that -; there is no point for further waiting in software. We also need to add -; a delay before checking the comparator during starting to avoid being -; fooled by the same lag. +; High side PWM mode is required here to work around the sense divider +; being too weak for phase voltages higher than 10V. Also, the 100nf +; filtering capacitors shift the timing so much that there is no point +; for further waiting in software. We also need to add a delay before +; checking the comparator during starting to avoid being fooled by the +; same lag. .equ F_CPU = 16000000 .equ USE_INT0 = 0 @@ -28,17 +28,17 @@ .equ adr1 = 6 ;i address pad adr1 (1-2) ;.equ = 5 (sck) ;.equ = 4 (miso) -.equ AnFET = 3 ;o (mosi) -.equ BnFET = 2 ;o -.equ CnFET = 1 ;o +.equ ApFET = 3 ;o (mosi) +.equ BpFET = 2 ;o +.equ CpFET = 1 ;o .equ rcp_in = 0 ;i r/c pulse input .equ INIT_PB = (1< cbi PWM_X_PORT, PWM_X (drain through ext pull-down) +; XnFET_off -> sbi PWM_X_PORT, PWM_X (pull-up pin with ext pull-down) +; XpFET_on -> sbi PWM_X_DDR, PWM_X (drive-up pin) +; XpFET_off -> cbi PWM_X_DDR, PWM_X (pull-up pin with ext pull-down) +; +; COMP_PWM on these is done in hardware rather than software, so we can +; just toggle the PORT value after PWM_FOCUS sets DDR (output mode). +; This results in the following macro arrangement: +; +; TRI CPWM HIGH_SIDE_PWM : PWM ON PWM OFF XnFET_port +; 0 0 0 : XnFET_on XnFET_off as set +; 0 0 1 : XpFET_on XpFET_off as set +; 0 1 0 : XnFET_on XnFET_off as set +; 0 1 1 : XpFET_on XpFET_off as set +; 1 0 0 : XnFET_on XnFET_off PWM_X_PORT +; 1 0 1 : XpFET_on XpFET_off PWM_X_DDR +; 1 1 0 : XnFET_on XnFET_off PWM_X_PORT +; 1 1 1 : XnFET_off XnFET_on PWM_X_PORT + .macro PWM_A_on - .if defined(AnFET) - AnFET_on - .elif COMP_PWM - sbi PWM_A_PORT, PWM_A + .if !defined(AnFET) && COMP_PWM && HIGH_SIDE_PWM + AnFET_off + .elif HIGH_SIDE_PWM + ApFET_on .else - sbi PWM_A_DDR, PWM_A + AnFET_on .endif .endmacro .macro PWM_A_off - .if defined(AnFET) - AnFET_off - .elif COMP_PWM - cbi PWM_A_PORT, PWM_A + .if !defined(AnFET) && COMP_PWM && HIGH_SIDE_PWM + AnFET_on + .elif HIGH_SIDE_PWM + ApFET_off .else - cbi PWM_A_DDR, PWM_A + AnFET_off .endif .endmacro .macro PWM_B_on - .if defined(BnFET) - BnFET_on - .elif COMP_PWM - sbi PWM_B_PORT, PWM_B + .if !defined(BnFET) && COMP_PWM && HIGH_SIDE_PWM + BnFET_off + .elif HIGH_SIDE_PWM + BpFET_on .else - sbi PWM_B_DDR, PWM_B + BnFET_on .endif .endmacro .macro PWM_B_off - .if defined(BnFET) - BnFET_off - .elif COMP_PWM - cbi PWM_B_PORT, PWM_B + .if !defined(BnFET) && COMP_PWM && HIGH_SIDE_PWM + BnFET_on + .elif HIGH_SIDE_PWM + BpFET_off .else - cbi PWM_B_DDR, PWM_B + BnFET_off .endif .endmacro .macro PWM_C_on - .if defined(CnFET) - CnFET_on - .elif COMP_PWM - sbi PWM_C_PORT, PWM_C + .if !defined(CnFET) && COMP_PWM && HIGH_SIDE_PWM + CnFET_off + .elif HIGH_SIDE_PWM + CpFET_on .else - sbi PWM_C_DDR, PWM_C + CnFET_on .endif .endmacro .macro PWM_C_off - .if defined(CnFET) - CnFET_off - .elif COMP_PWM - cbi PWM_C_PORT, PWM_C + .if !defined(CnFET) && COMP_PWM && HIGH_SIDE_PWM + CnFET_on + .elif HIGH_SIDE_PWM + CpFET_off .else - cbi PWM_C_DDR, PWM_C + CnFET_off .endif .endmacro +.if HIGH_SIDE_PWM + .macro PWM_ALL_off + all_pFETs_off @0 + .endmacro +.else + .macro PWM_ALL_off + all_nFETs_off @0 + .endmacro +.endif + +;-- Complementary PWM macros --------------------------------------------- + +.if CPWM_SOFT + .macro PWM_COMP_A_on + .if HIGH_SIDE_PWM + AnFET_on + .else + ApFET_on + .endif + .endmacro + + .macro PWM_COMP_A_off + .if HIGH_SIDE_PWM + AnFET_off + .else + ApFET_off + .endif + .endmacro + + .macro PWM_COMP_B_on + .if HIGH_SIDE_PWM + BnFET_on + .else + BpFET_on + .endif + .endmacro + + .macro PWM_COMP_B_off + .if HIGH_SIDE_PWM + BnFET_off + .else + BpFET_off + .endif + .endmacro + + .macro PWM_COMP_C_on + .if HIGH_SIDE_PWM + CnFET_on + .else + CpFET_on + .endif + .endmacro + + .macro PWM_COMP_C_off + .if HIGH_SIDE_PWM + CnFET_off + .else + CpFET_off + .endif + .endmacro +.endif + ;-- RC pulse setup and edge handling macros ------------------------------ .if USE_ICP @@ -1250,11 +1363,11 @@ pwm_again: pwm_on: .if CPWM_SOFT sbrc flags2, A_FET - ApFET_off + PWM_COMP_A_off sbrc flags2, B_FET - BpFET_off + PWM_COMP_B_off sbrc flags2, C_FET - CpFET_off + PWM_COMP_C_off .if EXTRA_DEAD_TIME_HIGH > MAX_BUSY_WAIT_CYCLES ; Reschedule to interrupt once the dead time has passed .if high(EXTRA_DEAD_TIME_HIGH) @@ -1317,11 +1430,11 @@ pwm_off: cycle_delay EXTRA_DEAD_TIME_LOW - 2 .equ CPWM_OVERHEAD_LOW = 9 + EXTRA_DEAD_TIME_LOW sbrc flags2, A_FET - ApFET_on + PWM_COMP_A_on sbrc flags2, B_FET - BpFET_on + PWM_COMP_B_on sbrc flags2, C_FET - CpFET_on + PWM_COMP_C_on .endif reti ; 4 cycles @@ -3271,9 +3384,9 @@ start_from_running: cbr flags2, ALL_FETS sbr flags2, (1<