diff --git a/arch/arm64/src/imx9/Kconfig b/arch/arm64/src/imx9/Kconfig
index b57faa5aff52a..15cd5976a71d6 100644
--- a/arch/arm64/src/imx9/Kconfig
+++ b/arch/arm64/src/imx9/Kconfig
@@ -1117,6 +1117,13 @@ config IMX9_FLEXCAN1_DATA_SAMPLEP
 	depends on NET_CAN_CANFD
 	default 75
 
+config IMX9_FLEXCAN1_SRXDIS
+	bool "CAN1 Self reception disable"
+	default n
+	---help---
+		Configure this y if you want that CAN1 doesn't receive the
+		frames which it sent itself
+
 endmenu # IMX9_FLEXCAN1
 
 menu "FLEXCAN2 Configuration"
@@ -1152,6 +1159,13 @@ config IMX9_FLEXCAN2_DATA_SAMPLEP
 	depends on NET_CAN_CANFD
 	default 75
 
+config IMX9_FLEXCAN2_SRXDIS
+	bool "CAN2 Self reception disable"
+	default n
+	---help---
+		Configure this y if you want that CAN2 doesn't receive the
+		frames which it sent itself
+
 endmenu # IMX9_FLEXCAN2
 
 endmenu # iMX Peripheral Selection
diff --git a/arch/arm64/src/imx9/imx9_flexcan.c b/arch/arm64/src/imx9/imx9_flexcan.c
index 24de6f5d8d406..34e05b6de75f3 100644
--- a/arch/arm64/src/imx9/imx9_flexcan.c
+++ b/arch/arm64/src/imx9/imx9_flexcan.c
@@ -164,6 +164,7 @@ struct imx9_driver_s
   const bool canfd_capable;
   const uint32_t *txdesc;             /* A pointer to the list of TX descriptor */
   const uint32_t *rxdesc;             /* A pointer to the list of RX descriptors */
+  const bool srxdis;                  /* Self reception disable */
 
   uint32_t clk_freq;                  /* Peripheral clock frequency */
   bool bifup;                         /* true:ifup false:ifdown */
@@ -223,6 +224,10 @@ static struct imx9_driver_s g_flexcan1 =
 
     .txdesc = g_tx_pool_can1,
     .rxdesc = g_rx_pool_can1,
+
+#  if defined(CONFIG_IMX9_FLEXCAN1_SRXDIS)
+    .srxdis = true,
+#  endif
   };
 #endif
 
@@ -264,6 +269,10 @@ static struct imx9_driver_s g_flexcan2 =
 
     .txdesc = g_tx_pool_can2,
     .rxdesc = g_rx_pool_can2,
+
+#  if defined(CONFIG_IMX9_FLEXCAN2_SRXDIS)
+    .srxdis = true,
+#  endif
   };
 #endif
 
@@ -1778,11 +1787,16 @@ static int imx9_initialize(struct imx9_driver_s *priv)
   /* Configure MCR */
 
   modifyreg32(priv->base + IMX9_CAN_MCR_OFFSET, CAN_MCR_MAXMB_MASK,
-              CAN_MCR_SLFWAK | CAN_MCR_WRNEN | CAN_MCR_SRXDIS |
-              CAN_MCR_WAKSRC | CAN_MCR_IRMQ | CAN_MCR_LPRIOEN | CAN_MCR_AEN |
+              CAN_MCR_SLFWAK | CAN_MCR_WRNEN | CAN_MCR_WAKSRC |
+              CAN_MCR_IRMQ | CAN_MCR_LPRIOEN | CAN_MCR_AEN |
               (((TOTALMBCOUNT - 1) << CAN_MCR_MAXMB_SHIFT) &
                CAN_MCR_MAXMB_MASK));
 
+  if (priv->srxdis)
+    {
+      modifyreg32(priv->base + IMX9_CAN_MCR_OFFSET, 0, CAN_MCR_SRXDIS);
+    }
+
   if (!priv->canfd_capable)
     {
       modifyreg32(priv->base + IMX9_CAN_CTRL1_OFFSET,