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RF24.cpp
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RF24.cpp
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/*
Copyright (C) 2011 J. Coliz <[email protected]>
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License
version 2 as published by the Free Software Foundation.
*/
#include "nRF24L01.h"
#include "RF24_config.h"
#include "RF24.h"
/****************************************************************************/
void RF24::csn(bool mode)
{
#if defined(RF24_TINY)
if (ce_pin != csn_pin) {
digitalWrite(csn_pin, mode);
}
else {
if (mode == HIGH) {
PORTB |= (1<<PINB2); // SCK->CSN HIGH
delayMicroseconds(RF24_CSN_SETTLE_HIGH_DELAY); // allow csn to settle.
}
else {
PORTB &= ~(1<<PINB2); // SCK->CSN LOW
delayMicroseconds(RF24_CSN_SETTLE_LOW_DELAY); // allow csn to settle
}
}
// Return, CSN toggle complete
return;
#elif defined(ARDUINO) && !defined(RF24_SPI_TRANSACTIONS)
// Minimum ideal SPI bus speed is 2x data rate
// If we assume 2Mbs data rate and 16Mhz clock, a
// divider of 4 is the minimum we want.
// CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz
#if !defined(SOFTSPI)
_SPI.setBitOrder(MSBFIRST);
_SPI.setDataMode(SPI_MODE0);
#if !defined(F_CPU) || F_CPU < 20000000
_SPI.setClockDivider(SPI_CLOCK_DIV2);
#elif F_CPU < 40000000
_SPI.setClockDivider(SPI_CLOCK_DIV4);
#elif F_CPU < 80000000
_SPI.setClockDivider(SPI_CLOCK_DIV8);
#elif F_CPU < 160000000
_SPI.setClockDivider(SPI_CLOCK_DIV16);
#elif F_CPU < 320000000
_SPI.setClockDivider(SPI_CLOCK_DIV32);
#elif F_CPU < 640000000
_SPI.setClockDivider(SPI_CLOCK_DIV64);
#elif F_CPU < 1280000000
_SPI.setClockDivider(SPI_CLOCK_DIV128);
#else
#error "Unsupported CPU frequency. Please set correct SPI divider."
#endif
#endif
#elif defined(RF24_RPi)
if(!mode)
_SPI.chipSelect(csn_pin);
#endif // defined(RF24_RPi)
#if !defined(RF24_LINUX)
digitalWrite(csn_pin, mode);
delayMicroseconds(csDelay);
#endif // !defined(RF24_LINUX)
}
/****************************************************************************/
void RF24::ce(bool level)
{
//Allow for 3-pin use on ATTiny
if (ce_pin != csn_pin) {
digitalWrite(ce_pin, level);
}
}
/****************************************************************************/
inline void RF24::beginTransaction()
{
#if defined(RF24_SPI_TRANSACTIONS)
_SPI.beginTransaction(SPISettings(spi_speed, MSBFIRST, SPI_MODE0));
#endif // defined(RF24_SPI_TRANSACTIONS)
csn(LOW);
}
/****************************************************************************/
inline void RF24::endTransaction()
{
csn(HIGH);
#if defined(RF24_SPI_TRANSACTIONS)
_SPI.endTransaction();
#endif // defined(RF24_SPI_TRANSACTIONS)
}
/****************************************************************************/
void RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len)
{
#if defined(RF24_LINUX)
beginTransaction(); //configures the spi settings for RPi, locks mutex and setting csn low
uint8_t * prx = spi_rxbuff;
uint8_t * ptx = spi_txbuff;
uint8_t size = len + 1; // Add register value to transmit buffer
*ptx++ = (R_REGISTER | reg);
while (len--){ *ptx++ = RF24_NOP; } // Dummy operation, just for reading
_SPI.transfernb((char *)spi_txbuff, (char *)spi_rxbuff, size);
status = *prx++; // status is 1st byte of receive buffer
// decrement before to skip status byte
while ( --size ){ *buf++ = *prx++; }
endTransaction(); //unlocks mutex and setting csn high
#else // !defined(RF24_LINUX)
beginTransaction();
status = _SPI.transfer(R_REGISTER | reg);
while (len--) {
*buf++ = _SPI.transfer(0xFF);
}
endTransaction();
#endif // !defined(RF24_LINUX)
}
/****************************************************************************/
uint8_t RF24::read_register(uint8_t reg)
{
uint8_t result;
#if defined(RF24_LINUX)
beginTransaction();
uint8_t * prx = spi_rxbuff;
uint8_t * ptx = spi_txbuff;
*ptx++ = (R_REGISTER | reg);
*ptx++ = RF24_NOP ; // Dummy operation, just for reading
_SPI.transfernb((char *)spi_txbuff, (char *)spi_rxbuff, 2);
status = *prx; // status is 1st byte of receive buffer
result = *++prx; // result is 2nd byte of receive buffer
endTransaction();
#else // !defined(RF24_LINUX)
beginTransaction();
status = _SPI.transfer(R_REGISTER | reg);
result = _SPI.transfer(0xff);
endTransaction();
#endif // !defined(RF24_LINUX)
return result;
}
/****************************************************************************/
void RF24::write_register(uint8_t reg, const uint8_t* buf, uint8_t len)
{
#if defined(RF24_LINUX)
beginTransaction();
uint8_t * prx = spi_rxbuff;
uint8_t * ptx = spi_txbuff;
uint8_t size = len + 1; // Add register value to transmit buffer
*ptx++ = ( W_REGISTER | ( REGISTER_MASK & reg ) );
while ( len-- )
*ptx++ = *buf++;
_SPI.transfernb((char *)spi_txbuff, (char *)spi_rxbuff, size);
status = *prx; // status is 1st byte of receive buffer
endTransaction();
#else // !defined(RF24_LINUX)
beginTransaction();
status = _SPI.transfer(W_REGISTER | reg);
while (len--) {
_SPI.transfer(*buf++);
}
endTransaction();
#endif // !defined(RF24_LINUX)
}
/****************************************************************************/
void RF24::write_register(uint8_t reg, uint8_t value, bool is_cmd_only)
{
if (is_cmd_only) {
if (reg != RF24_NOP) { // don't print the get_status() operation
IF_SERIAL_DEBUG(printf_P(PSTR("write_register(%02x)\r\n"), reg));
}
beginTransaction();
status = _SPI.transfer(W_REGISTER | reg);
endTransaction();
}
else {
IF_SERIAL_DEBUG(printf_P(PSTR("write_register(%02x,%02x)\r\n"), reg, value));
#if defined(RF24_LINUX)
beginTransaction();
uint8_t * prx = spi_rxbuff;
uint8_t * ptx = spi_txbuff;
*ptx++ = (W_REGISTER | reg);
*ptx = value;
_SPI.transfernb((char *)spi_txbuff, (char *)spi_rxbuff, 2);
status = *prx++; // status is 1st byte of receive buffer
endTransaction();
#else // !defined(RF24_LINUX)
beginTransaction();
status = _SPI.transfer(W_REGISTER | reg);
_SPI.transfer(value);
endTransaction();
#endif // !defined(RF24_LINUX)
}
}
/****************************************************************************/
void RF24::write_payload(const void* buf, uint8_t data_len, const uint8_t writeType)
{
const uint8_t* current = reinterpret_cast<const uint8_t*>(buf);
uint8_t blank_len = !data_len ? 1 : 0;
if (!dynamic_payloads_enabled) {
data_len = rf24_min(data_len, payload_size);
blank_len = payload_size - data_len;
}
else {
data_len = rf24_min(data_len, 32);
}
//printf("[Writing %u bytes %u blanks]",data_len,blank_len);
IF_SERIAL_DEBUG(printf("[Writing %u bytes %u blanks]\n", data_len, blank_len); );
#if defined(RF24_LINUX)
beginTransaction();
uint8_t * prx = spi_rxbuff;
uint8_t * ptx = spi_txbuff;
uint8_t size;
size = data_len + blank_len + 1 ; // Add register value to transmit buffer
*ptx++ = writeType;
while ( data_len-- )
*ptx++ = *current++;
while ( blank_len-- )
*ptx++ = 0;
_SPI.transfernb((char *)spi_txbuff, (char *)spi_rxbuff, size);
status = *prx; // status is 1st byte of receive buffer
endTransaction();
#else // !defined(RF24_LINUX)
beginTransaction();
status = _SPI.transfer(writeType);
while (data_len--) {
_SPI.transfer(*current++);
}
while (blank_len--) {
_SPI.transfer(0);
}
endTransaction();
#endif // !defined(RF24_LINUX)
}
/****************************************************************************/
void RF24::read_payload(void* buf, uint8_t data_len)
{
uint8_t* current = reinterpret_cast<uint8_t*>(buf);
uint8_t blank_len = 0;
if (!dynamic_payloads_enabled) {
data_len = rf24_min(data_len, payload_size);
blank_len = payload_size - data_len;
}
else {
data_len = rf24_min(data_len, 32);
}
//printf("[Reading %u bytes %u blanks]",data_len,blank_len);
IF_SERIAL_DEBUG(printf("[Reading %u bytes %u blanks]\n", data_len, blank_len); );
#if defined(RF24_LINUX)
beginTransaction();
uint8_t * prx = spi_rxbuff;
uint8_t * ptx = spi_txbuff;
uint8_t size;
size = data_len + blank_len + 1; // Add register value to transmit buffer
*ptx++ = R_RX_PAYLOAD;
while(--size)
*ptx++ = RF24_NOP;
size = data_len + blank_len + 1; // Size has been lost during while, re affect
_SPI.transfernb((char *)spi_txbuff, (char *)spi_rxbuff, size);
status = *prx++; // 1st byte is status
if (data_len > 0) {
while ( --data_len ) // Decrement before to skip 1st status byte
*current++ = *prx++;
*current = *prx;
}
endTransaction();
#else // !defined(RF24_LINUX)
beginTransaction();
status = _SPI.transfer(R_RX_PAYLOAD);
while (data_len--) {
*current++ = _SPI.transfer(0xFF);
}
while (blank_len--) {
_SPI.transfer(0xff);
}
endTransaction();
#endif // !defined(RF24_LINUX)
}
/****************************************************************************/
uint8_t RF24::flush_rx(void)
{
write_register(FLUSH_RX, RF24_NOP, true);
return status;
}
/****************************************************************************/
uint8_t RF24::flush_tx(void)
{
write_register(FLUSH_TX, RF24_NOP, true);
return status;
}
/****************************************************************************/
uint8_t RF24::get_status(void)
{
write_register(RF24_NOP, RF24_NOP, true);
return status;
}
/****************************************************************************/
#if !defined(MINIMAL)
void RF24::print_status(uint8_t _status)
{
printf_P(PSTR("STATUS\t\t= 0x%02x RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\r\n"), _status, (_status & _BV(RX_DR)) ? 1 : 0,
(_status & _BV(TX_DS)) ? 1 : 0, (_status & _BV(MAX_RT)) ? 1 : 0, ((_status >> RX_P_NO) & 0x07), (_status & _BV(TX_FULL)) ? 1 : 0);
}
/****************************************************************************/
void RF24::print_observe_tx(uint8_t value)
{
printf_P(PSTR("OBSERVE_TX=%02x: POLS_CNT=%x ARC_CNT=%x\r\n"), value, (value >> PLOS_CNT) & 0x0F, (value >> ARC_CNT) & 0x0F);
}
/****************************************************************************/
void RF24::print_byte_register(const char* name, uint8_t reg, uint8_t qty)
{
//char extra_tab = strlen_P(name) < 8 ? '\t' : 0;
//printf_P(PSTR(PRIPSTR"\t%c ="),name,extra_tab);
#if defined(RF24_LINUX)
printf("%s\t=", name);
#else // !defined(RF24_LINUX)
printf_P(PSTR(PRIPSTR"\t="),name);
#endif // !defined(RF24_LINUX)
while (qty--) {
printf_P(PSTR(" 0x%02x"), read_register(reg++));
}
printf_P(PSTR("\r\n"));
}
/****************************************************************************/
void RF24::print_address_register(const char* name, uint8_t reg, uint8_t qty)
{
#if defined(RF24_LINUX)
printf("%s\t=", name);
#else // !defined(RF24_LINUX)
printf_P(PSTR(PRIPSTR"\t="), name);
#endif // !defined(RF24_LINUX)
while (qty--) {
uint8_t buffer[addr_width];
read_register(reg++ & REGISTER_MASK, buffer, sizeof(buffer));
printf_P(PSTR(" 0x"));
uint8_t* bufptr = buffer + sizeof(buffer);
while (--bufptr >= buffer) {
printf_P(PSTR("%02x"), *bufptr);
}
}
printf_P(PSTR("\r\n"));
}
#endif
/****************************************************************************/
RF24::RF24(uint16_t _cepin, uint16_t _cspin, uint32_t _spi_speed)
:ce_pin(_cepin), csn_pin(_cspin),spi_speed(_spi_speed), payload_size(32), dynamic_payloads_enabled(true), addr_width(5), _is_p_variant(false),
csDelay(5)
{
pipe0_reading_address[0] = 0;
if(spi_speed <= 35000){ //Handle old BCM2835 speed constants, default to RF24_SPI_SPEED
spi_speed = RF24_SPI_SPEED;
}
}
/****************************************************************************/
void RF24::setChannel(uint8_t channel)
{
const uint8_t max_channel = 125;
write_register(RF_CH, rf24_min(channel, max_channel));
}
uint8_t RF24::getChannel()
{
return read_register(RF_CH);
}
/****************************************************************************/
void RF24::setPayloadSize(uint8_t size)
{
// payload size must be in range [1, 32]
payload_size = rf24_max(1, rf24_min(32, size));
// write static payload size setting for all pipes
for (uint8_t i = 0; i < 6; ++i)
write_register(RX_PW_P0 + i, payload_size);
}
/****************************************************************************/
uint8_t RF24::getPayloadSize(void)
{
return payload_size;
}
/****************************************************************************/
#if !defined(MINIMAL)
static const PROGMEM char rf24_datarate_e_str_0[] = "= 1 MBPS";
static const PROGMEM char rf24_datarate_e_str_1[] = "= 2 MBPS";
static const PROGMEM char rf24_datarate_e_str_2[] = "= 250 KBPS";
static const PROGMEM char * const rf24_datarate_e_str_P[] = {
rf24_datarate_e_str_0,
rf24_datarate_e_str_1,
rf24_datarate_e_str_2,
};
static const PROGMEM char rf24_model_e_str_0[] = "nRF24L01";
static const PROGMEM char rf24_model_e_str_1[] = "nRF24L01+";
static const PROGMEM char * const rf24_model_e_str_P[] = {
rf24_model_e_str_0,
rf24_model_e_str_1,
};
static const PROGMEM char rf24_crclength_e_str_0[] = "= Disabled";
static const PROGMEM char rf24_crclength_e_str_1[] = "= 8 bits";
static const PROGMEM char rf24_crclength_e_str_2[] = "= 16 bits" ;
static const PROGMEM char * const rf24_crclength_e_str_P[] = {
rf24_crclength_e_str_0,
rf24_crclength_e_str_1,
rf24_crclength_e_str_2,
};
static const PROGMEM char rf24_pa_dbm_e_str_0[] = "= PA_MIN";
static const PROGMEM char rf24_pa_dbm_e_str_1[] = "= PA_LOW";
static const PROGMEM char rf24_pa_dbm_e_str_2[] = "= PA_HIGH";
static const PROGMEM char rf24_pa_dbm_e_str_3[] = "= PA_MAX";
static const PROGMEM char * const rf24_pa_dbm_e_str_P[] = {
rf24_pa_dbm_e_str_0,
rf24_pa_dbm_e_str_1,
rf24_pa_dbm_e_str_2,
rf24_pa_dbm_e_str_3,
};
#if defined(RF24_LINUX)
static const char rf24_csn_e_str_0[] = "CE0 (PI Hardware Driven)";
static const char rf24_csn_e_str_1[] = "CE1 (PI Hardware Driven)";
static const char rf24_csn_e_str_2[] = "CE2 (PI Hardware Driven)";
static const char rf24_csn_e_str_3[] = "Custom GPIO Software Driven";
static const char * const rf24_csn_e_str_P[] = {
rf24_csn_e_str_0,
rf24_csn_e_str_1,
rf24_csn_e_str_2,
rf24_csn_e_str_3,
};
#endif // defined(RF24_LINUX)
static const PROGMEM char rf24_feature_e_str_on[] = "= Enabled";
static const PROGMEM char rf24_feature_e_str_allowed[] = "= Allowed";
static const PROGMEM char rf24_feature_e_str_open[] = " open ";
static const PROGMEM char rf24_feature_e_str_closed[] = "closed";
static const PROGMEM char * const rf24_feature_e_str_P[] = {
rf24_crclength_e_str_0,
rf24_feature_e_str_on,
rf24_feature_e_str_allowed,
rf24_feature_e_str_closed,
rf24_feature_e_str_open
};
void RF24::printDetails(void)
{
#if defined(RF24_LINUX)
printf("================ SPI Configuration ================\n" );
uint8_t bus_ce = csn_pin % 10;
uint8_t bus_numb = (csn_pin - bus_ce) / 10;
printf("CSN Pin\t\t= /dev/spidev%d.%d\n", bus_numb, bus_ce);
printf("CE Pin\t\t= Custom GPIO%d\n", ce_pin);
#endif
printf_P(PSTR("SPI Speedz\t= %d Mhz\n"),(uint8_t)(spi_speed/1000000)); //Print the SPI speed on non-Linux devices
#if defined(RF24_LINUX)
printf("================ NRF Configuration ================\n");
#endif // defined(RF24_LINUX)
print_status(get_status());
print_address_register(PSTR("RX_ADDR_P0-1"), RX_ADDR_P0, 2);
print_byte_register(PSTR("RX_ADDR_P2-5"), RX_ADDR_P2, 4);
print_address_register(PSTR("TX_ADDR\t"), TX_ADDR);
print_byte_register(PSTR("RX_PW_P0-6"), RX_PW_P0, 6);
print_byte_register(PSTR("EN_AA\t"), EN_AA);
print_byte_register(PSTR("EN_RXADDR"), EN_RXADDR);
print_byte_register(PSTR("RF_CH\t"), RF_CH);
print_byte_register(PSTR("RF_SETUP"), RF_SETUP);
print_byte_register(PSTR("CONFIG\t"), NRF_CONFIG);
print_byte_register(PSTR("DYNPD/FEATURE"), DYNPD, 2);
printf_P(PSTR("Data Rate\t"
PRIPSTR
"\r\n"),(char*)pgm_read_ptr(&rf24_datarate_e_str_P[getDataRate()]));
printf_P(PSTR("Model\t\t= "
PRIPSTR
"\r\n"),(char*)pgm_read_ptr(&rf24_model_e_str_P[isPVariant()]));
printf_P(PSTR("CRC Length\t"
PRIPSTR
"\r\n"),(char*)pgm_read_ptr(&rf24_crclength_e_str_P[getCRCLength()]));
printf_P(PSTR("PA Power\t"
PRIPSTR
"\r\n"),(char*)pgm_read_ptr(&rf24_pa_dbm_e_str_P[getPALevel()]));
printf_P(PSTR("ARC\t\t= %d\r\n"), getARC());
}
void RF24::printPrettyDetails(void) {
#if defined(RF24_LINUX)
printf("================ SPI Configuration ================\n");
uint8_t bus_ce = csn_pin % 10;
uint8_t bus_numb = (csn_pin - bus_ce) / 10;
printf("CSN Pin\t\t\t= /dev/spidev%d.%d\n", bus_numb, bus_ce);
printf("CE Pin\t\t\t= Custom GPIO%d\n", ce_pin);
#endif
printf_P(PSTR("SPI Frequency\t\t= %d Mhz\n"), (uint8_t)(spi_speed / 1000000)); //Print the SPI speed on non-Linux devices
#if defined(RF24_LINUX)
printf("================ NRF Configuration ================\n");
#endif // defined(RF24_LINUX)
uint8_t channel = getChannel();
uint16_t frequency = (uint16_t)channel + 2400;
printf_P(PSTR("Channel\t\t\t= %u (~ %u MHz)\r\n"), channel, frequency);
printf_P(PSTR("RF Data Rate\t\t"
PRIPSTR
"\r\n"), (char*)pgm_read_ptr(&rf24_datarate_e_str_P[getDataRate()]));
printf_P(PSTR("RF Power Amplifier\t"
PRIPSTR
"\r\n"), (char*)pgm_read_ptr(&rf24_pa_dbm_e_str_P[getPALevel()]));
printf_P(PSTR("RF Low Noise Amplifier\t"
PRIPSTR
"\r\n"), (char*)pgm_read_ptr(&rf24_feature_e_str_P[(bool)(read_register(RF_SETUP) & 1) * 1]));
printf_P(PSTR("CRC Length\t\t"
PRIPSTR
"\r\n"), (char*)pgm_read_ptr(&rf24_crclength_e_str_P[getCRCLength()]));
printf_P(PSTR("Address Length\t\t= %d bytes\r\n"), (read_register(SETUP_AW) & 3) + 2);
printf_P(PSTR("Static Payload Length\t= %d bytes\r\n"), getPayloadSize());
uint8_t setupRetry = read_register(SETUP_RETR);
printf_P(PSTR("Auto Retry Delay\t= %d microseconds\r\n"), (uint16_t)(setupRetry >> ARD) * 250 + 250);
printf_P(PSTR("Auto Retry Attempts\t= %d maximum\r\n"), setupRetry & 0x0F);
uint8_t observeTx = read_register(OBSERVE_TX);
printf_P(PSTR("Packets lost on\n current channel\t= %d\r\n"), observeTx >> 4);
printf_P(PSTR("Retry attempts made for\n last transmission\t= %d\r\n"), observeTx & 0x0F);
uint8_t features = read_register(FEATURE);
printf_P(PSTR("Multicast\t\t"
PRIPSTR
"\r\n"), (char*)pgm_read_ptr(&rf24_feature_e_str_P[(bool)(features & _BV(EN_DYN_ACK)) * 2]));
printf_P(PSTR("Custom ACK Payload\t"
PRIPSTR
"\r\n"), (char*)pgm_read_ptr(&rf24_feature_e_str_P[(bool)(features & _BV(EN_ACK_PAY)) * 1]));
uint8_t dynPl = read_register(DYNPD);
printf_P(PSTR("Dynamic Payloads\t"
PRIPSTR
"\r\n"), (char*)pgm_read_ptr(&rf24_feature_e_str_P[(dynPl && (features &_BV(EN_DPL))) * 1]));
uint8_t autoAck = read_register(EN_AA);
if (autoAck == 0x3F || autoAck == 0) {
// all pipes have the same configuration about auto-ack feature
printf_P(PSTR("Auto Acknowledgment\t"
PRIPSTR
"\r\n"), (char*)pgm_read_ptr(&rf24_feature_e_str_P[(bool)(autoAck) * 1]));
} else {
// representation per pipe
printf_P(PSTR("Auto Acknowledgment\t= 0b%c%c%c%c%c%c\r\n"),
(char)((bool)(autoAck & _BV(ENAA_P5)) + 48),
(char)((bool)(autoAck & _BV(ENAA_P4)) + 48),
(char)((bool)(autoAck & _BV(ENAA_P3)) + 48),
(char)((bool)(autoAck & _BV(ENAA_P2)) + 48),
(char)((bool)(autoAck & _BV(ENAA_P1)) + 48),
(char)((bool)(autoAck & _BV(ENAA_P0)) + 48));
}
config_reg = read_register(NRF_CONFIG);
printf_P(PSTR("Primary Mode\t\t= %cX\r\n"), config_reg & _BV(PRIM_RX) ? 'R' : 'T');
print_address_register(PSTR("TX address\t"), TX_ADDR);
uint8_t openPipes = read_register(EN_RXADDR);
for (uint8_t i = 0; i < 6; ++i) {
bool isOpen = openPipes & _BV(i);
printf_P(PSTR("pipe %u ("
PRIPSTR
") bound"), i, (char*)pgm_read_ptr(&rf24_feature_e_str_P[isOpen + 3]));
if (i < 2) {
print_address_register(PSTR(""), RX_ADDR_P0 + i);
}
else {
print_byte_register(PSTR(""), RX_ADDR_P0 + i);
}
}
}
#endif // !defined(MINIMAL)
/****************************************************************************/
bool RF24::begin(void)
{
#if defined(RF24_LINUX)
#if defined(MRAA)
GPIO();
gpio.begin(ce_pin, csn_pin);
#endif
#if defined(RF24_RPi)
switch(csn_pin){ //Ensure valid hardware CS pin
case 0: break;
case 1: break;
// Allow BCM2835 enums for RPi
case 8: csn_pin = 0; break;
case 7: csn_pin = 1; break;
case 18: csn_pin = 10; break; //to make it work on SPI1
case 17: csn_pin = 11; break;
case 16: csn_pin = 12; break;
default: csn_pin = 0; break;
}
#endif // RF24_RPi
_SPI.begin(csn_pin,spi_speed);
pinMode(ce_pin,OUTPUT);
ce(LOW);
delay(100);
#elif defined(LITTLEWIRE)
pinMode(csn_pin,OUTPUT);
_SPI.begin();
csn(HIGH);
#elif defined(XMEGA_D3)
if (ce_pin != csn_pin) {
pinMode(ce_pin,OUTPUT);
};
_SPI.begin(csn_pin);
ce(LOW);
csn(HIGH);
delay(200);
#else
// Initialize pins
if (ce_pin != csn_pin) {
pinMode(ce_pin, OUTPUT);
pinMode(csn_pin, OUTPUT);
}
_SPI.begin();
ce(LOW);
csn(HIGH);
#if defined(__ARDUINO_X86__)
delay(100);
#endif
#endif //Linux
// Must allow the radio time to settle else configuration bits will not necessarily stick.
// This is actually only required following power up but some settling time also appears to
// be required after resets too. For full coverage, we'll always assume the worst.
// Enabling 16b CRC is by far the most obvious case if the wrong timing is used - or skipped.
// Technically we require 4.5ms + 14us as a worst case. We'll just call it 5ms for good measure.
// WARNING: Delay is based on P-variant whereby non-P *may* require different timing.
delay(5);
// Set 1500uS (minimum for 32B payload in ESB@250KBPS) timeouts, to make testing a little easier
// WARNING: If this is ever lowered, either 250KBS mode with AA is broken or maximum packet
// sizes must never be used. See datasheet for a more complete explanation.
setRetries(5, 15);
// Then set the data rate to the slowest (and most reliable) speed supported by all
// hardware.
setDataRate(RF24_1MBPS);
// detect if is a plus variant & use old toggle features command accordingly
uint8_t before_toggle = read_register(FEATURE);
toggle_features();
uint8_t after_toggle = read_register(FEATURE);
_is_p_variant = before_toggle == after_toggle;
if (after_toggle){
if (_is_p_variant){
// module did not experience power-on-reset (#401)
toggle_features();
}
// allow use of multicast parameter and dynamic payloads by default
write_register(FEATURE, 0);
}
ack_payloads_enabled = false; // ack payloads disabled by default
write_register(DYNPD, 0); // disable dynamic payloads by default (for all pipes)
dynamic_payloads_enabled = false;
write_register(EN_AA, 0x3F); // enable auto-ack on all pipes
write_register(EN_RXADDR, 0); // close all RX pipes
setPayloadSize(32); // set static payload size to 32 (max) bytes by default
setAddressWidth(5); // set default address length to (max) 5 bytes
// Set up default configuration. Callers can always change it later.
// This channel should be universally safe and not bleed over into adjacent
// spectrum.
setChannel(76);
// Reset current status
// Notice reset and flush is the last thing we do
write_register(NRF_STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT));
// Flush buffers
flush_rx();
flush_tx();
// Clear CONFIG register:
// Reflect all IRQ events on IRQ pin
// Enable PTX
// Power Up
// 16-bit CRC (CRC required by auto-ack)
// Do not write CE high so radio will remain in standby I mode
// PTX should use only 22uA of power
write_register(NRF_CONFIG, (_BV(EN_CRC) | _BV(CRCO)) );
config_reg = read_register(NRF_CONFIG);
powerUp();
// if config is not set correctly then there was a bad response from module
return config_reg == (_BV(EN_CRC) | _BV(CRCO) | _BV(PWR_UP)) ? true : false;
}
/****************************************************************************/
bool RF24::isChipConnected()
{
uint8_t setup = read_register(SETUP_AW);
if (setup >= 1 && setup <= 3) {
return true;
}
return false;
}
/****************************************************************************/
void RF24::startListening(void)
{
#if !defined(RF24_TINY) && !defined(LITTLEWIRE)
powerUp();
#endif
config_reg |= _BV(PRIM_RX);
write_register(NRF_CONFIG, config_reg);
write_register(NRF_STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT));
ce(HIGH);
// Restore the pipe0 address, if exists
if (pipe0_reading_address[0] > 0) {
write_register(RX_ADDR_P0, pipe0_reading_address, addr_width);
} else {
closeReadingPipe(0);
}
}
/****************************************************************************/
static const PROGMEM uint8_t child_pipe_enable[] = {ERX_P0, ERX_P1, ERX_P2,
ERX_P3, ERX_P4, ERX_P5};
void RF24::stopListening(void)
{
ce(LOW);
//delayMicroseconds(100);
delayMicroseconds(txDelay);
if (ack_payloads_enabled){
flush_tx();
}
config_reg &= ~_BV(PRIM_RX);
write_register(NRF_CONFIG, config_reg);
#if defined(RF24_TINY) || defined(LITTLEWIRE)
// for 3 pins solution TX mode is only left with additonal powerDown/powerUp cycle
if (ce_pin == csn_pin) {
powerDown();
powerUp();
}
#endif
write_register(EN_RXADDR, read_register(EN_RXADDR) | _BV(pgm_read_byte(&child_pipe_enable[0]))); // Enable RX on pipe0
}
/****************************************************************************/
void RF24::powerDown(void)
{
ce(LOW); // Guarantee CE is low on powerDown
config_reg &= ~_BV(PWR_UP);
write_register(NRF_CONFIG,config_reg);
}
/****************************************************************************/
//Power up now. Radio will not power down unless instructed by MCU for config changes etc.
void RF24::powerUp(void)
{
// if not powered up then power up and wait for the radio to initialize
if (!(config_reg & _BV(PWR_UP))) {
config_reg |= _BV(PWR_UP);
write_register(NRF_CONFIG, config_reg);
// For nRF24L01+ to go from power down mode to TX or RX mode it must first pass through stand-by mode.
// There must be a delay of Tpd2stby (see Table 16.) after the nRF24L01+ leaves power down mode before
// the CEis set high. - Tpd2stby can be up to 5ms per the 1.0 datasheet
delayMicroseconds(RF24_POWERUP_DELAY);
}
}
/******************************************************************/
#if defined(FAILURE_HANDLING) || defined(RF24_LINUX)
void RF24::errNotify()
{
#if defined(SERIAL_DEBUG) || defined(RF24_LINUX)
printf_P(PSTR("RF24 HARDWARE FAIL: Radio not responding, verify pin connections, wiring, etc.\r\n"));
#endif
#if defined(FAILURE_HANDLING)
failureDetected = 1;
#else
delay(5000);
#endif
}
#endif
/******************************************************************/
//Similar to the previous write, clears the interrupt flags
bool RF24::write(const void* buf, uint8_t len, const bool multicast)
{
//Start Writing
startFastWrite(buf, len, multicast);
//Wait until complete or failed
#if defined(FAILURE_HANDLING) || defined(RF24_LINUX)
uint32_t timer = millis();
#endif // defined(FAILURE_HANDLING) || defined(RF24_LINUX)
while (!(get_status() & (_BV(TX_DS) | _BV(MAX_RT)))) {
#if defined(FAILURE_HANDLING) || defined(RF24_LINUX)
if (millis() - timer > 95) {
errNotify();
#if defined(FAILURE_HANDLING)
return 0;
#else
delay(100);
#endif
}
#endif
}
ce(LOW);
write_register(NRF_STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT));
//Max retries exceeded
if (status & _BV(MAX_RT)) {
flush_tx(); // Only going to be 1 packet in the FIFO at a time using this method, so just flush
return 0;
}
//TX OK 1 or 0
return 1;
}
bool RF24::write(const void* buf, uint8_t len)
{
return write(buf, len, 0);
}
/****************************************************************************/
//For general use, the interrupt flags are not important to clear
bool RF24::writeBlocking(const void* buf, uint8_t len, uint32_t timeout)
{
//Block until the FIFO is NOT full.
//Keep track of the MAX retries and set auto-retry if seeing failures
//This way the FIFO will fill up and allow blocking until packets go through
//The radio will auto-clear everything in the FIFO as long as CE remains high
uint32_t timer = millis(); // Get the time that the payload transmission started
while ((get_status() & (_BV(TX_FULL)))) { // Blocking only if FIFO is full. This will loop and block until TX is successful or timeout
if (status & _BV(MAX_RT)) { // If MAX Retries have been reached
reUseTX(); // Set re-transmit and clear the MAX_RT interrupt flag
if (millis() - timer > timeout) {
return 0; // If this payload has exceeded the user-defined timeout, exit and return 0
}
}
#if defined(FAILURE_HANDLING) || defined(RF24_LINUX)
if (millis() - timer > (timeout + 95)) {
errNotify();
#if defined(FAILURE_HANDLING)
return 0;
#endif
}
#endif
}
//Start Writing
startFastWrite(buf, len, 0); // Write the payload if a buffer is clear
return 1; // Return 1 to indicate successful transmission
}
/****************************************************************************/
void RF24::reUseTX()
{
write_register(NRF_STATUS, _BV(MAX_RT)); //Clear max retry flag
write_register(REUSE_TX_PL, RF24_NOP, true);
ce(LOW); //Re-Transfer packet
ce(HIGH);
}
/****************************************************************************/
bool RF24::writeFast(const void* buf, uint8_t len, const bool multicast)
{
//Block until the FIFO is NOT full.
//Keep track of the MAX retries and set auto-retry if seeing failures
//Return 0 so the user can control the retrys and set a timer or failure counter if required
//The radio will auto-clear everything in the FIFO as long as CE remains high
#if defined(FAILURE_HANDLING) || defined(RF24_LINUX)
uint32_t timer = millis();
#endif
//Blocking only if FIFO is full. This will loop and block until TX is successful or fail
while ((get_status() & (_BV(TX_FULL)))) {
if (status & _BV(MAX_RT)) {
return 0; //Return 0. The previous payload has not been retransmitted
// From the user perspective, if you get a 0, just keep trying to send the same payload
}