RAM4K.hdl

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM4K.hdl

/**
 * Memory of 4K registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM4K {
    IN in[16], load, address[12];
    OUT out[16];

    PARTS:
    // Put your code here:
    DMux8Way(in=load, sel=address[0..2],
                      a=loada,
                      b=loadb,
                      c=loadc,
                      d=loadd,
                      e=loade,
                      f=loadf,
                      g=loadg,
                      h=loadh);

    RAM512(in=in, load=loada, address=address[3..11], out=outa);
    RAM512(in=in, load=loadb, address=address[3..11], out=outb);
    RAM512(in=in, load=loadc, address=address[3..11], out=outc);
    RAM512(in=in, load=loadd, address=address[3..11], out=outd);
    RAM512(in=in, load=loade, address=address[3..11], out=oute);
    RAM512(in=in, load=loadf, address=address[3..11], out=outf);
    RAM512(in=in, load=loadg, address=address[3..11], out=outg);
    RAM512(in=in, load=loadh, address=address[3..11], out=outh);

    Mux8Way16(sel=address[0..2], a=outa,
                                 b=outb,
                                 c=outc,
                                 d=outd,
                                 e=oute,
                                 f=outf,
                                 g=outg,
                                 h=outh,
                                 out=out);
}