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verilog simulator #13

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ivanratkovic opened this issue Mar 3, 2017 · 1 comment
Open

verilog simulator #13

ivanratkovic opened this issue Mar 3, 2017 · 1 comment

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@ivanratkovic
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It would be good to make Verilog testing independent from commercial tools - Synopsys VCS. A potential solution would be to use verilator instead.

@ivanratkovic ivanratkovic changed the title veriog simulator verilog simulator Mar 3, 2017
@jhauser-ucberkeley
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This issue will be addressed in the first complete release, sometime in 2018.

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