Add PIO switch to WW3 to avoid build errors

.gitmodules

@@ -4,8 +4,10 @@
   branch = develop
 [submodule "WW3"]
   path = WW3
-  url = https://github.com/NOAA-EMC/WW3
-  branch = dev/ufs-weather-model
+  url = https://github.com/jessicameixner-noaa/WW3
+  branch = bug/addPIOswitch
+  #url = https://github.com/NOAA-EMC/WW3
+  #branch = dev/ufs-weather-model
 [submodule "stochastic_physics"]
   path = stochastic_physics
   url = https://github.com/NOAA-PSL/stochastic_physics

tests/test_changes.list

@@ -1,189 +0,0 @@
-cpld_control_p8_mixedmode intel
-cpld_control_gfsv17 intel
-cpld_control_gfsv17_iau intel
-cpld_restart_gfsv17 intel
-cpld_mpi_gfsv17 intel
-cpld_control_sfs intel
-cpld_debug_gfsv17 intel
-cpld_control_p8 intel
-cpld_control_p8.v2.sfc intel
-cpld_restart_p8 intel
-cpld_control_qr_p8 intel
-cpld_restart_qr_p8 intel
-cpld_2threads_p8 intel
-cpld_decomp_p8 intel
-cpld_mpi_p8 intel
-cpld_control_ciceC_p8 intel
-cpld_control_c192_p8 intel
-cpld_restart_c192_p8 intel
-cpld_bmark_p8 intel
-cpld_restart_bmark_p8 intel
-cpld_s2sa_p8 intel
-cpld_control_noaero_p8 intel
-cpld_control_nowave_noaero_p8 intel
-cpld_debug_p8 intel
-cpld_debug_noaero_p8 intel
-cpld_control_noaero_p8_agrid intel
-cpld_control_c48 intel
-cpld_warmstart_c48 intel
-cpld_restart_c48 intel
-cpld_control_p8_faster intel
-cpld_control_pdlib_p8 intel
-cpld_restart_pdlib_p8 intel
-cpld_mpi_pdlib_p8 intel
-cpld_debug_pdlib_p8 intel
-control_CubedSphereGrid intel
-control_CubedSphereGrid_parallel intel
-control_latlon intel
-control_wrtGauss_netcdf_parallel intel
-control_c48 intel
-control_c192 intel
-control_c384 intel
-control_p8 intel
-control_p8.v2.sfc intel
-control_p8_ugwpv1 intel
-control_restart_p8 intel
-control_noqr_p8 intel
-control_restart_noqr_p8 intel
-control_decomp_p8 intel
-control_2threads_p8 intel
-control_p8_lndp intel
-control_p8_rrtmgp intel
-control_p8_mynn intel
-merra2_thompson intel
-regional_control intel
-regional_restart intel
-regional_decomp intel
-regional_2threads intel
-regional_noquilt intel
-regional_netcdf_parallel intel
-regional_2dwrtdecomp intel
-rap_control intel
-regional_spp_sppt_shum_skeb intel
-rap_decomp intel
-rap_2threads intel
-rap_restart intel
-rap_sfcdiff intel
-rap_sfcdiff_decomp intel
-rap_sfcdiff_restart intel
-hrrr_control intel
-hrrr_control_decomp intel
-hrrr_control_2threads intel
-hrrr_control_restart intel
-rrfs_v1beta intel
-control_wam intel
-control_p8_faster intel
-regional_control_faster intel
-control_CubedSphereGrid_debug intel
-control_wrtGauss_netcdf_parallel_debug intel
-control_diag_debug intel
-control_debug_p8 intel
-regional_debug intel
-rap_control_debug intel
-hrrr_control_debug intel
-hrrr_gf_debug intel
-hrrr_c3_debug intel
-rap_unified_drag_suite_debug intel
-rap_diag_debug intel
-rap_cires_ugwp_debug intel
-rap_unified_ugwp_debug intel
-rap_lndp_debug intel
-rap_progcld_thompson_debug intel
-rap_noah_debug intel
-rap_sfcdiff_debug intel
-rap_noah_sfcdiff_cires_ugwp_debug intel
-rrfs_v1beta_debug intel
-rap_clm_lake_debug intel
-rap_flake_debug intel
-gnv1_c96_no_nest_debug intel
-control_wam_debug intel
-regional_spp_sppt_shum_skeb_dyn32_phy32 intel
-rap_control_dyn32_phy32 intel
-hrrr_control_dyn32_phy32 intel
-rap_2threads_dyn32_phy32 intel
-hrrr_control_2threads_dyn32_phy32 intel
-hrrr_control_decomp_dyn32_phy32 intel
-rap_restart_dyn32_phy32 intel
-hrrr_control_restart_dyn32_phy32 intel
-conus13km_control intel
-conus13km_2threads intel
-conus13km_restart_mismatch intel
-rap_control_dyn64_phy32 intel
-rap_control_debug_dyn32_phy32 intel
-hrrr_control_debug_dyn32_phy32 intel
-conus13km_debug intel
-conus13km_debug_qr intel
-conus13km_debug_2threads intel
-conus13km_radar_tten_debug intel
-rap_control_dyn64_phy32_debug intel
-hafs_regional_atm_thompson_gfdlsf intel
-gnv1_nested intel
-atm_ds2s_docn_pcice intel
-atm_ds2s_docn_dice intel
-control_p8_atmlnd_sbs intel
-control_p8_atmlnd intel
-control_restart_p8_atmlnd intel
-control_p8_atmlnd_debug intel
-atmwav_control_noaero_p8 intel
-atmaero_control_p8 intel
-atmaero_control_p8_rad intel
-atmaero_control_p8_rad_micro intel
-control_c48 gnu
-control_p8 gnu
-control_p8_ugwpv1 gnu
-rap_control gnu
-rap_decomp gnu
-rap_2threads gnu
-rap_restart gnu
-rap_sfcdiff gnu
-rap_sfcdiff_decomp gnu
-rap_sfcdiff_restart gnu
-hrrr_control gnu
-hrrr_control_noqr gnu
-hrrr_control_2threads gnu
-hrrr_control_decomp gnu
-hrrr_control_restart gnu
-hrrr_control_restart_noqr gnu
-rrfs_v1beta gnu
-control_diag_debug gnu
-regional_debug gnu
-rap_control_debug gnu
-hrrr_control_debug gnu
-hrrr_gf_debug gnu
-hrrr_c3_debug gnu
-rap_diag_debug gnu
-rap_noah_sfcdiff_cires_ugwp_debug gnu
-rap_progcld_thompson_debug gnu
-rrfs_v1beta_debug gnu
-control_debug_p8 gnu
-rap_flake_debug gnu
-rap_clm_lake_debug gnu
-gnv1_c96_no_nest_debug gnu
-rap_control_dyn32_phy32 gnu
-hrrr_control_dyn32_phy32 gnu
-rap_2threads_dyn32_phy32 gnu
-hrrr_control_2threads_dyn32_phy32 gnu
-hrrr_control_decomp_dyn32_phy32 gnu
-rap_restart_dyn32_phy32 gnu
-hrrr_control_restart_dyn32_phy32 gnu
-conus13km_control gnu
-conus13km_2threads gnu
-conus13km_restart_mismatch gnu
-rap_control_dyn64_phy32 gnu
-rap_control_debug_dyn32_phy32 gnu
-hrrr_control_debug_dyn32_phy32 gnu
-conus13km_debug gnu
-conus13km_debug_qr gnu
-conus13km_debug_2threads gnu
-conus13km_radar_tten_debug gnu
-rap_control_dyn64_phy32_debug gnu
-cpld_control_nowave_noaero_p8 gnu
-cpld_control_pdlib_p8 gnu
-cpld_regional_atm_fbh intel
-control_c48_lnd_iau intel
-cpld_control_gfsv17 intelllvm
-cpld_debug_gfsv17 intelllvm
-cpld_control_sfs intelllvm
-cpld_control_p8 intelllvm
-rap_control_dyn32_phy32 intelllvm
-rap_control_dyn64_phy32 intelllvm