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the latency histogram in the output file only contains read latency? #29
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Write latency is not all that relevant and hard to define. From a system level, as soon as a memory controller accepts a write transaction, it is "done" (since the CPU no longer cares what happens to it). If you count a write as done when the CAS-W issues to the actual bank, that's not really all that useful either. Writes basically just slow down reads and so the effect of the writes is seen in the read latency. |
Thanks for your reply! Yeah, read latency is more meaningful. the result is in pJ. |
So you want to compute this on a per-transaction granularity? Are you interested in open page or closed page mode? Your formula looks OK to me but it doesn't include the precharge and refresh components. Also, your result is not in joules, it's actually in amps (you need to include voltage somewhere to get to joules). DRAMSim2 accumulates the current values and multiplies by voltage later. |
Many thanks for your remind! Then I think the equation below can get the energy consumed by ACT and PRECHARGE operations. |
I devied the who energy into four parts: |
Hello, I have some doubts regarding actual simulation. |
hi,
Recently, I spent some time to analysis the sourcecode. I found that the latency histogram in the output file only contains read latency. Why not take write transactions into account?
thanks ,:)
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