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Arduino_ClockAndEEPROM_2layers.dsn
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Arduino_ClockAndEEPROM_2layers.dsn
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(outline (path signal 50 -4750 2950 4750 2950))
(outline (path signal 50 -4750 -2950 4750 -2950))
(outline (path signal 150 -2750 2755 -2750 2550))
(outline (path signal 150 2750 2755 2750 2455))
(outline (path signal 150 2750 -2755 2750 -2455))
(outline (path signal 150 -2750 -2755 -2750 -2455))
(outline (path signal 150 -2750 2755 2750 2755))
(outline (path signal 150 -2750 -2755 2750 -2755))
(outline (path signal 150 -2750 2550 -4500 2550))
(pin Rect[T]Pad_1700x650_um 1 -3650 1905)
(pin Rect[T]Pad_1700x650_um 2 -3650 635)
(pin Rect[T]Pad_1700x650_um 3 -3650 -635)
(pin Rect[T]Pad_1700x650_um 4 -3650 -1905)
(pin Rect[T]Pad_1700x650_um 5 3650 -1905)
(pin Rect[T]Pad_1700x650_um 6 3650 -635)
(pin Rect[T]Pad_1700x650_um 7 3650 635)
(pin Rect[T]Pad_1700x650_um 8 3650 1905)
)
(image "Package_SO:SOIJ-8_5.3x5.3mm_P1.27mm::1"
(outline (path signal 150 -2750 2550 -4500 2550))
(outline (path signal 150 -2750 -2755 2750 -2755))
(outline (path signal 150 -2750 2755 2750 2755))
(outline (path signal 150 -2750 -2755 -2750 -2455))
(outline (path signal 150 2750 -2755 2750 -2455))
(outline (path signal 150 2750 2755 2750 2455))
(outline (path signal 150 -2750 2755 -2750 2550))
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(outline (path signal 50 -4750 2950 4750 2950))
(outline (path signal 50 4750 2950 4750 -2950))
(outline (path signal 50 -4750 2950 -4750 -2950))
(outline (path signal 150 -2650 1650 -1650 2650))
(outline (path signal 150 -2650 -2650 -2650 1650))
(outline (path signal 150 2650 -2650 -2650 -2650))
(outline (path signal 150 2650 2650 2650 -2650))
(outline (path signal 150 -1650 2650 2650 2650))
(pin Rect[T]Pad_1700x650_um 8 3650 1905)
(pin Rect[T]Pad_1700x650_um 7 3650 635)
(pin Rect[T]Pad_1700x650_um 6 3650 -635)
(pin Rect[T]Pad_1700x650_um 5 3650 -1905)
(pin Rect[T]Pad_1700x650_um 4 -3650 -1905)
(pin Rect[T]Pad_1700x650_um 3 -3650 -635)
(pin Rect[T]Pad_1700x650_um 2 -3650 635)
(pin Rect[T]Pad_1700x650_um 1 -3650 1905)
)
(image "Package_SO:SO-8_5.3x6.2mm_P1.27mm"
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(outline (path signal 150 2650 3100 2650 -3100))
(outline (path signal 150 2650 -3100 -2650 -3100))
(outline (path signal 150 -2650 -3100 -2650 2100))
(outline (path signal 150 -2650 2100 -1650 3100))
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(outline (path signal 50 -4830 3350 4830 3350))
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(outline (path signal 150 2750 -3205 2750 -2455))
(outline (path signal 150 -2750 -3205 -2750 -2455))
(outline (path signal 150 -2750 3205 2750 3205))
(outline (path signal 150 -2750 -3205 2750 -3205))
(outline (path signal 150 -2750 2550 -4500 2550))
(pin Rect[T]Pad_1750x550_um 1 -3700 1905)
(pin Rect[T]Pad_1750x550_um 2 -3700 635)
(pin Rect[T]Pad_1750x550_um 3 -3700 -635)
(pin Rect[T]Pad_1750x550_um 4 -3700 -1905)
(pin Rect[T]Pad_1750x550_um 5 3700 -1905)
(pin Rect[T]Pad_1750x550_um 6 3700 -635)
(pin Rect[T]Pad_1750x550_um 7 3700 635)
(pin Rect[T]Pad_1750x550_um 8 3700 1905)
)
(image "Package_QFP:TQFP-32_7x7mm_P0.8mm"
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(outline (path signal 150 3500 3500 3500 -3500))
(outline (path signal 150 3500 -3500 -3500 -3500))
(outline (path signal 150 -3500 -3500 -3500 2500))
(outline (path signal 150 -3500 2500 -2500 3500))
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(outline (path signal 50 5300 5300 5300 -5300))
(outline (path signal 50 -5300 5300 5300 5300))
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(outline (path signal 150 3625 -3625 3625 -3300))
(outline (path signal 150 -3625 -3625 -3625 -3300))
(outline (path signal 150 -3625 3625 -3300 3625))
(outline (path signal 150 -3625 -3625 -3300 -3625))
(outline (path signal 150 3625 -3625 3300 -3625))
(outline (path signal 150 3625 3625 3300 3625))
(outline (path signal 150 -3625 3400 -5050 3400))
(pin Rect[T]Pad_1600x550_um 1 -4250 2800)
(pin Rect[T]Pad_1600x550_um 2 -4250 2000)
(pin Rect[T]Pad_1600x550_um 3 -4250 1200)
(pin Rect[T]Pad_1600x550_um 4 -4250 400)
(pin Rect[T]Pad_1600x550_um 5 -4250 -400)
(pin Rect[T]Pad_1600x550_um 6 -4250 -1200)
(pin Rect[T]Pad_1600x550_um 7 -4250 -2000)
(pin Rect[T]Pad_1600x550_um 8 -4250 -2800)
(pin Rect[T]Pad_1600x550_um (rotate 90) 9 -2800 -4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 10 -2000 -4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 11 -1200 -4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 12 -400 -4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 13 400 -4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 14 1200 -4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 15 2000 -4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 16 2800 -4250)
(pin Rect[T]Pad_1600x550_um 17 4250 -2800)
(pin Rect[T]Pad_1600x550_um 18 4250 -2000)
(pin Rect[T]Pad_1600x550_um 19 4250 -1200)
(pin Rect[T]Pad_1600x550_um 20 4250 -400)
(pin Rect[T]Pad_1600x550_um 21 4250 400)
(pin Rect[T]Pad_1600x550_um 22 4250 1200)
(pin Rect[T]Pad_1600x550_um 23 4250 2000)
(pin Rect[T]Pad_1600x550_um 24 4250 2800)
(pin Rect[T]Pad_1600x550_um (rotate 90) 25 2800 4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 26 2000 4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 27 1200 4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 28 400 4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 29 -400 4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 30 -1200 4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 31 -2000 4250)
(pin Rect[T]Pad_1600x550_um (rotate 90) 32 -2800 4250)
)
(image "Crystal:Crystal_SMD_MicroCrystal_CC7V-T1A-2Pin_3.2x1.5mm"
(outline (path signal 100 -1600 750 -1600 -750))
(outline (path signal 100 -1600 -750 1600 -750))
(outline (path signal 100 1600 -750 1600 750))
(outline (path signal 100 1600 750 -1600 750))
(outline (path signal 100 -1600 -250 -1100 -750))
(outline (path signal 120 -550 950 550 950))
(outline (path signal 120 -550 -950 550 -950))
(outline (path signal 120 -1950 900 -1950 -900))
(outline (path signal 50 -2000 1200 -2000 -1200))
(outline (path signal 50 -2000 -1200 2000 -1200))
(outline (path signal 50 2000 -1200 2000 1200))
(outline (path signal 50 2000 1200 -2000 1200))
(pin Rect[T]Pad_1000x1800_um 1 -1250 0)
(pin Rect[T]Pad_1000x1800_um 2 1250 0)
)
(image "Crystal:Crystal_SMD_5032-2Pin_5.0x3.2mm_HandSoldering"
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(outline (path signal 100 -2500 1400 -2300 1600))
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(outline (path signal 186.667 93.333 0 46.667 -80.829 -46.666 -80.829 -93.333 0
-46.667 80.829 46.666 80.829 93.333 0))
(pin Rect[T]Pad_3500x2400_um 1 -2600 0)
(pin Rect[T]Pad_3500x2400_um 2 2600 0)
)
(padstack Oval[A]Pad_1700x1700_um
(shape (path F.Cu 1700 0 0 0 0))
(shape (path B.Cu 1700 0 0 0 0))
(attach off)
)
(padstack RoundRect[T]Pad_1150x1400_250.95_um
(shape (polygon F.Cu 0 368.578 697.139 410.831 685.817 450.476 667.33 486.309 642.24
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-410.831 685.817 -368.578 697.139 -325.001 700.951 325.001 700.951
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(attach off)
)
(padstack RoundRect[T]Pad_1525x4000_250.95_um
(shape (polygon F.Cu 0 556.078 1997.14 598.331 1985.82 637.976 1967.33 673.809 1942.24
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(attach off)
)
(padstack Rect[T]Pad_3500x2400_um
(shape (rect F.Cu -1750 -1200 1750 1200))
(attach off)
)
(padstack Rect[T]Pad_1000x1800_um
(shape (rect F.Cu -500 -900 500 900))
(attach off)
)
(padstack Rect[T]Pad_1600x550_um
(shape (rect F.Cu -800 -275 800 275))
(attach off)
)
(padstack Rect[T]Pad_1700x650_um
(shape (rect F.Cu -850 -325 850 325))
(attach off)
)
(padstack Rect[A]Pad_1700x1700_um
(shape (rect F.Cu -850 -850 850 850))
(shape (rect B.Cu -850 -850 850 850))
(attach off)
)
(padstack Rect[T]Pad_1750x550_um
(shape (rect F.Cu -875 -275 875 275))
(attach off)
)
(padstack "Via[0-1]_800:400_um"
(shape (circle F.Cu 800))
(shape (circle B.Cu 800))
(attach off)
)
(padstack "Via[0-1]_1000:600_um"
(shape (circle F.Cu 1000))
(shape (circle B.Cu 1000))
(attach off)
)
)
(network
(net /Vcc
(pins BT1-1 C3-1 J1-2 J2-9 J3-2 J4-2 R2-2 U1-3 U1-8 U2-8 U2-3 U3-3 U3-8 U4-4
U4-6 U4-18 U4-20)
)
(net GNDPWR
(pins BT1-2 C1-2 C2-1 C3-2 J1-1 J2-8 J3-6 J4-1 R1-2 U1-4 U1-7 U2-7 U2-4 U3-4
U4-3 U4-5 U4-21)
)
(net "Net-(C1-Pad1)"
(pins C1-1 U4-7 Y2-1)
)
(net "Net-(C2-Pad2)"
(pins C2-2 U4-8 Y2-2)
)
(net "Net-(D1-Pad1)"
(pins D1-1 R1-1)
)
(net /SCK
(pins D1-2 J3-3 J4-4 U1-6 U2-6 U3-6 U4-17)
)
(net /RX
(pins J1-3 U4-30)
)
(net /TX
(pins J1-4 U4-31)
)
(net /D2
(pins J2-1 U4-32)
)
(net /D3
(pins J2-2 U4-1)
)
(net /D4
(pins J2-3 U4-2)
)
(net /D5
(pins J2-4 U4-9)
)
(net /D6
(pins J2-5 U4-10)
)
(net /D7
(pins J2-6 U4-11)
)
(net /D8
(pins J2-7 U4-12)
)
(net /MISO
(pins J3-1 U4-16)
)
(net /MOSI
(pins J3-4 U4-15)
)
(net /RESET
(pins J3-5 R2-1 U4-29)
)
(net /SDA
(pins J4-3 U1-5 U2-5 U3-5 U4-27)
)
(net /ADDS1
(pins U1-1 U2-1 U4-23)
)
(net /ADDS2
(pins U1-2 U2-2 U4-24)
)
(net "Net-(U3-Pad1)"
(pins U3-1 Y1-1)
)
(net "Net-(U3-Pad2)"
(pins U3-2 Y1-2)
)
(net "Net-(U3-Pad7)"
(pins U3-7)
)
(net "Net-(U4-Pad13)"
(pins U4-13)
)
(net "Net-(U4-Pad14)"
(pins U4-14)
)
(net "Net-(U4-Pad19)"
(pins U4-19)
)
(net "Net-(U4-Pad22)"
(pins U4-22)
)
(net "Net-(U4-Pad25)"
(pins U4-25)
)
(net "Net-(U4-Pad26)"
(pins U4-26)
)
(net "Net-(U4-Pad28)"
(pins U4-28)
)
(class kicad_default "" /ADDS1 /ADDS2 /D2 /D3 /D4 /D5 /D6 /D7 /D8 /MISO
/MOSI /RESET /RX /SCK /SDA /TX "Net-(C1-Pad1)" "Net-(C2-Pad2)" "Net-(D1-Pad1)"
"Net-(U3-Pad1)" "Net-(U3-Pad2)" "Net-(U3-Pad7)" "Net-(U4-Pad13)" "Net-(U4-Pad14)"
"Net-(U4-Pad19)" "Net-(U4-Pad22)" "Net-(U4-Pad25)" "Net-(U4-Pad26)"
"Net-(U4-Pad28)"
(circuit
(use_via Via[0-1]_800:400_um)
)
(rule
(width 250)
(clearance 200.1)
)
)
(class Power /Vcc GNDPWR
(circuit
(use_via Via[0-1]_1000:600_um)
)
(rule
(width 300)
(clearance 200.1)
)
)
)
(wiring
)
)