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v5.01 master branch goes into a boot loop on all tested hardwares #210
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version of gcc used: |
master appears to compile fine with arm-none-eabi-gcc 4.3.9 20150529 revision 227977 a specific arm compiler version should probably be specified in the readme if newer versions break the project. |
This is the version of gcc that I have been using:
I have seen that other people had problems with later gcc versions, but I haven't looked into it myself yet. It would be great if you have time to look into what the problem is. I will have a look eventually, but at the moment I really don't have time. |
I may be able to look into it. |
I also tried several arm-none-eabi-gcc versions from the developer.arm.com website in the past and the last working one for me that is available there for download was this one: All version afterwards beginning with the "GNU Arm Embedded Toolchain: 8-2018-q4-major December 20, 2018" were not working anymore. After compiling and flashing the firmware the VESC was in a rebooting loop that was noticeable when looking at the LEDs. |
Now that the makefile handles installing a version of gcc that is known to work, this issue is "fixed". Does it make sense to close this issue? or is it something we still want to track? |
I'm not sure that this is an issue anymore, it seems to work with some of the later compilers I tested. I think it could have been from the time before the stack check that some threads had too little stack. However, even if many different compilers work, I think it is best to stick to the same one as that is what the code is developed and tested on and there are small differences between compiler versions. Can someone give a later compiler a try and see if it works? If it does I think we can close this one. |
I tested toolchain gcc-arm-none-eabi-10.3-2021.10 and compilation and vesc functionality works fine now. It would be nice if the toolchain was updated because coretex-debug vscode extension now has a hard requirement on gdb version >= 9 |
So does anyone know the root cause of this issue? |
No. At some point it was fixed though. I suspect something triggered a hard fault or didn't reset the watchdog. One could do a binary "search" of git commits if you really wanted to find out what commit affects this. Are you running into this? |
With the current master branch, all code I try to compile, for both hw 6.0 (hw v1) and hw 4.1, goes into a boot loop.
This occurs even when code is uploaded to an stm32f4discovery.
Wiping all memory on the stm32, then uploading using openocd. both with and without the bootloader produces the same result.
stepping through with gdb, the code gets to the end of main and into the end loop section:
Then resets before running any other thread as far as I can tell.
After the reset, In RCC_CSR the IWDGRSTF bit (Independent watchdog reset flag) was set to 1.
The whole RCC_CSR register value was 0x24000003
So it appears the watchdog is timing out and resetting the cpu.
I have tried compiling in wsl, and with a brand new ubuntu 20.04 install, with the following installed:
I have also tried downloading the gcc compiler binaries from arm and using those to the same effect.
Is your compiling setup different than this? what version of gcc are you using?
I will be doing a regression to find out just what version I can still compile in a working state.
at the least, I can compile v3.58 in a working state, but later versions are also likely ok.
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