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microkernels.bzl
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"""
Microkernel filenames lists.
Auto-generated file. Do not edit!
Generator: tools/update-microkernels.py
"""
ALL_ARMSIMD32_MICROKERNEL_SRCS = [
"src/qs8-qc8w-gemm/gen/qs8-qc8w-gemm-1x1c4-minmax-fp32-armsimd32.c",
"src/qs8-qc8w-gemm/gen/qs8-qc8w-gemm-1x2c4-minmax-fp32-armsimd32.c",
"src/qs8-qc8w-gemm/gen/qs8-qc8w-gemm-2x1c4-minmax-fp32-armsimd32.c",
"src/qs8-qc8w-gemm/gen/qs8-qc8w-gemm-2x2c4-minmax-fp32-armsimd32.c",
"src/qs8-qc8w-igemm/gen/qs8-qc8w-igemm-1x1c4-minmax-fp32-armsimd32.c",
"src/qs8-qc8w-igemm/gen/qs8-qc8w-igemm-1x2c4-minmax-fp32-armsimd32.c",
"src/qs8-qc8w-igemm/gen/qs8-qc8w-igemm-2x1c4-minmax-fp32-armsimd32.c",
"src/qs8-qc8w-igemm/gen/qs8-qc8w-igemm-2x2c4-minmax-fp32-armsimd32.c",
"src/qs8-vcvt/gen/qs8-vcvt-armsimd32-u4.c",
"src/qs8-vcvt/gen/qs8-vcvt-armsimd32-u8.c",
"src/qs8-vlrelu/gen/qs8-vlrelu-armsimd32-u4.c",
"src/qs8-vlrelu/gen/qs8-vlrelu-armsimd32-u8.c",
"src/qu8-gemm/gen/qu8-gemm-1x1c4-minmax-fp32-armsimd32.c",
"src/qu8-gemm/gen/qu8-gemm-1x2c4-minmax-fp32-armsimd32.c",
"src/qu8-gemm/gen/qu8-gemm-2x1c4-minmax-fp32-armsimd32.c",
"src/qu8-gemm/gen/qu8-gemm-2x2c4-minmax-fp32-armsimd32.c",
"src/qu8-igemm/gen/qu8-igemm-1x1c4-minmax-fp32-armsimd32.c",
"src/qu8-igemm/gen/qu8-igemm-1x2c4-minmax-fp32-armsimd32.c",
"src/qu8-igemm/gen/qu8-igemm-2x1c4-minmax-fp32-armsimd32.c",
"src/qu8-igemm/gen/qu8-igemm-2x2c4-minmax-fp32-armsimd32.c",
"src/qu8-vcvt/gen/qu8-vcvt-armsimd32-u4.c",
"src/qu8-vcvt/gen/qu8-vcvt-armsimd32-u8.c",
"src/qu8-vlrelu/gen/qu8-vlrelu-armsimd32-u4.c",
"src/qu8-vlrelu/gen/qu8-vlrelu-armsimd32-u8.c",
]
ALL_AVX_MICROKERNEL_SRCS = [
"src/f16-f32-vcvt/gen/f16-f32-vcvt-avx-int16-u8.c",
"src/f16-f32-vcvt/gen/f16-f32-vcvt-avx-int16-u16.c",
"src/f16-f32-vcvt/gen/f16-f32-vcvt-avx-int16-u24.c",
"src/f16-f32-vcvt/gen/f16-f32-vcvt-avx-int16-u32.c",
"src/f16-f32-vcvt/gen/f16-f32-vcvt-avx-int32-u8.c",
"src/f16-f32-vcvt/gen/f16-f32-vcvt-avx-int32-u16.c",
"src/f16-f32-vcvt/gen/f16-f32-vcvt-avx-int32-u24.c",
"src/f16-f32-vcvt/gen/f16-f32-vcvt-avx-int32-u32.c",
"src/f32-dwconv/gen/f32-dwconv-3p8c-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-3p8c-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-3p16c-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-3p16c-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-4p8c-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-4p8c-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-4p16c-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-4p16c-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-5f5m5l8c8s4r-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-5f5m5l8c8s4r-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-5f5m5l16c8s4r-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-5f5m5l16c8s4r-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-6f6m7l8c8s4r-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-6f6m7l8c8s4r-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-6f6m7l16c8s4r-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-6f6m7l16c8s4r-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-8f8m9l8c8s4r-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-8f8m9l8c8s4r-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-8f8m9l16c8s4r-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-8f8m9l16c8s4r-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-9p8c-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-9p8c-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-9p16c-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-9p16c-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-25p8c-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-25p8c-minmax-avx.c",
"src/f32-dwconv/gen/f32-dwconv-25p16c-minmax-avx-acc2.c",
"src/f32-dwconv/gen/f32-dwconv-25p16c-minmax-avx.c",
"src/f32-f16-vcvt/gen/f32-f16-vcvt-avx-u8.c",
"src/f32-f16-vcvt/gen/f32-f16-vcvt-avx-u16.c",
"src/f32-f16-vcvt/gen/f32-f16-vcvt-avx-u24.c",
"src/f32-f16-vcvt/gen/f32-f16-vcvt-avx-u32.c",
"src/f32-gemm/gen/f32-gemm-1x8-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-1x16-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-3x16-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-4x8-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-4x16-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-5x8-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-5x16-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-6x8-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-6x16-minmax-avx-broadcast.c",
"src/f32-gemm/gen/f32-gemm-7x8-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-1x8-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-1x16-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-3x16-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-4x8-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-4x16-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-5x8-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-5x16-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-6x8-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-6x16-minmax-avx-broadcast.c",
"src/f32-gemminc/gen/f32-gemminc-7x8-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-1x8-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-1x16-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-3x16-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-4x8-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-4x16-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-5x8-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-5x16-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-6x8-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-6x16-minmax-avx-broadcast.c",
"src/f32-igemm/gen/f32-igemm-7x8-minmax-avx-broadcast.c",
"src/f32-prelu/gen/f32-prelu-avx-2x8.c",
"src/f32-prelu/gen/f32-prelu-avx-2x16.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-1x16-minmax-avx-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-2x16-minmax-avx-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-3x16-minmax-avx-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-4x16-minmax-avx-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-5x16-minmax-avx-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-6x16-minmax-avx-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-7x16-minmax-avx-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-8x16-minmax-avx-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-1x16-minmax-avx-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-2x16-minmax-avx-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-3x16-minmax-avx-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-4x16-minmax-avx-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-5x16-minmax-avx-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-6x16-minmax-avx-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-7x16-minmax-avx-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-8x16-minmax-avx-broadcast.c",
"src/f32-qs8-vcvt/gen/f32-qs8-vcvt-avx-u8.c",
"src/f32-qs8-vcvt/gen/f32-qs8-vcvt-avx-u16.c",
"src/f32-qs8-vcvt/gen/f32-qs8-vcvt-avx-u24.c",
"src/f32-qs8-vcvt/gen/f32-qs8-vcvt-avx-u32.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u8.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u16.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u24.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx-u32.c",
"src/f32-rminmax/gen/f32-rmax-avx-u8.c",
"src/f32-rminmax/gen/f32-rmax-avx-u16-acc2.c",
"src/f32-rminmax/gen/f32-rmax-avx-u24-acc3.c",
"src/f32-rminmax/gen/f32-rmax-avx-u32-acc2.c",
"src/f32-rminmax/gen/f32-rmax-avx-u32-acc4.c",
"src/f32-rminmax/gen/f32-rmin-avx-u8.c",
"src/f32-rminmax/gen/f32-rmin-avx-u16-acc2.c",
"src/f32-rminmax/gen/f32-rmin-avx-u24-acc3.c",
"src/f32-rminmax/gen/f32-rmin-avx-u32-acc2.c",
"src/f32-rminmax/gen/f32-rmin-avx-u32-acc4.c",
"src/f32-rminmax/gen/f32-rminmax-avx-u8.c",
"src/f32-rminmax/gen/f32-rminmax-avx-u16-acc2.c",
"src/f32-rminmax/gen/f32-rminmax-avx-u24-acc3.c",
"src/f32-rminmax/gen/f32-rminmax-avx-u32-acc2.c",
"src/f32-rminmax/gen/f32-rminmax-avx-u32-acc4.c",
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"src/x64-transposec/gen/x64-transposec-4x4-reuse-switch-avx.c",
]
ALL_AVX2_MICROKERNEL_SRCS = [
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-1x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-1x16-minmax-avx2-broadcast.c",
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-3x16-minmax-avx2-broadcast.c",
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-4x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-4x16-minmax-avx2-broadcast.c",
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-5x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-5x16-minmax-avx2-broadcast.c",
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-6x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-gemm/gen/f16-f32acc-gemm-7x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-1x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-1x16-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-3x16-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-4x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-4x16-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-5x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-5x16-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-6x8-minmax-avx2-broadcast.c",
"src/f16-f32acc-igemm/gen/f16-f32acc-igemm-7x8-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-1x8-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-1x16-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-3x16-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-4x8-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-4x16-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-5x8-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-5x16-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-6x8-minmax-avx2-broadcast.c",
"src/f16-gemm/gen/f16-gemm-7x8-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-1x8-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-1x16-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-3x16-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-4x8-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-4x16-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-5x8-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-5x16-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-6x8-minmax-avx2-broadcast.c",
"src/f16-igemm/gen/f16-igemm-7x8-minmax-avx2-broadcast.c",
"src/f16-pavgpool/f16-pavgpool-9p8x-minmax-avx2-c8.c",
"src/f16-pavgpool/f16-pavgpool-9x-minmax-avx2-c8.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u32-acc2.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u32-acc4.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u32.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u40-acc2.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u40-acc5.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u40.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u48-acc2.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u48-acc3.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u48.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u64-acc2.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u64-acc4.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u64.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u72-acc3.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u72.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u80-acc2.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u80-acc5.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u80.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u96-acc2.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u96-acc3.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u96-acc6.c",
"src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-u96.c",
"src/f16-velu/gen/f16-velu-avx2-rr1-p3-u8.c",
"src/f16-velu/gen/f16-velu-avx2-rr1-p3-u16.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-div-u8.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-div-u16.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-div-u24.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-div-u32.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-div-u40.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-div-u48.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-div-u56.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-div-u64.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-rcp-u8.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-rcp-u16.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-rcp-u24.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-rcp-u32.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-rcp-u40.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-rcp-u48.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-rcp-u56.c",
"src/f16-vsigmoid/gen/f16-vsigmoid-avx2-rr1-p2-rcp-u64.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u8.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u16.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u24.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u32.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u40.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u48.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u56.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u64.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u72.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-div-u80.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u8.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u16.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u24.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u32.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u40.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u48.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u56.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u64.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u72.c",
"src/f16-vtanh/gen/f16-vtanh-avx2-expm1minus-rr1-p3h2ts-rcp-u80.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-1x16-minmax-avx2-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-2x16-minmax-avx2-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-3x16-minmax-avx2-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-4x16-minmax-avx2-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-5x16-minmax-avx2-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-6x16-minmax-avx2-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-7x16-minmax-avx2-broadcast.c",
"src/f32-qc4w-gemm/gen/f32-qc4w-gemm-8x16-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-1x8-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-1x16-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-1x16s4-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-2x16-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-2x16s4-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-3x16-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-3x16s4-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-4x8-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-4x16-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-4x16s4-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-5x8-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-5x16-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-5x16s4-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-6x8-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-6x16-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-6x16s4-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-7x8-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-7x16-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-8x8-minmax-avx2-broadcast.c",
"src/f32-qc8w-gemm/gen/f32-qc8w-gemm-8x16-minmax-avx2-broadcast.c",
"src/f32-qs8-vcvt/gen/f32-qs8-vcvt-avx2-u16.c",
"src/f32-qs8-vcvt/gen/f32-qs8-vcvt-avx2-u32.c",
"src/f32-qs8-vcvt/gen/f32-qs8-vcvt-avx2-u48.c",
"src/f32-qs8-vcvt/gen/f32-qs8-vcvt-avx2-u64.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx2-u16.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx2-u32.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx2-u48.c",
"src/f32-qu8-vcvt/gen/f32-qu8-vcvt-avx2-u64.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u64-acc2.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u64-acc4.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u64.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u72-acc3.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u72.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u80-acc2.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u80-acc5.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u80.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u96-acc2.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u96-acc3.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u96-acc6.c",
"src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx2-p5-u96.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u64-acc2.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u64-acc4.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u64.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u72-acc3.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u72.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u80-acc2.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u80-acc5.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u80.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u96-acc2.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u96-acc3.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u96-acc6.c",
"src/f32-raddextexp/gen/f32-raddextexp-avx2-p5-u96.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u64-acc2.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u64-acc4.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u64.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u72-acc3.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u72.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u80-acc2.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u80-acc5.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u80.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u96-acc2.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u96-acc3.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u96-acc6.c",
"src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx2-rr1-p5-u96.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u8.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u16.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u24.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u32.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u40.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u48.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u56.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u64.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u72.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut4-p4-perm-u80.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u8.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u16.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u24.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u32.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u40.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u48.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u56.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u64.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u72.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut8-p4-perm-u80.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut16-p3-gather-u8.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut16-p3-gather-u16.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut16-p3-gather-u24.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut16-p3-gather-u32.c",
"src/f32-velu/gen/f32-velu-avx2-rr1-lut16-p3-gather-u40.c",
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