diff --git a/Cfg/Template/os_app_hooks.c b/Cfg/Template/os_app_hooks.c index 5beff5c..4b09e40 100644 --- a/Cfg/Template/os_app_hooks.c +++ b/Cfg/Template/os_app_hooks.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * APPLICATION HOOKS * * Filename : os_app_hooks.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Cfg/Template/os_app_hooks.h b/Cfg/Template/os_app_hooks.h index 5558bcc..0e7d50a 100644 --- a/Cfg/Template/os_app_hooks.h +++ b/Cfg/Template/os_app_hooks.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * APPLICATION HOOKS * * Filename : os_app_hooks.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Cfg/Template/os_cfg.h b/Cfg/Template/os_cfg.h index ff33ca6..f5e1308 100644 --- a/Cfg/Template/os_cfg.h +++ b/Cfg/Template/os_cfg.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * CONFIGURATION FILE * * Filename : os_cfg.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -36,6 +36,7 @@ #define OS_CFG_DYN_TICK_EN 0u /* Enable (1) or Disable (0) the Dynamic Tick */ #define OS_CFG_INVALID_OS_CALLS_CHK_EN 1u /* Enable (1) or Disable (0) checks for invalid kernel calls */ #define OS_CFG_OBJ_TYPE_CHK_EN 1u /* Enable (1) or Disable (0) object type checking */ +#define OS_CFG_OBJ_CREATED_CHK_EN 1u /* Enable (1) or Disable (0) object created checks */ #define OS_CFG_TS_EN 0u /* Enable (1) or Disable (0) time stamping */ #define OS_CFG_PRIO_MAX 64u /* Defines the maximum number of task priorities (see OS_PRIO data type) */ diff --git a/Cfg/Template/os_cfg_app.h b/Cfg/Template/os_cfg_app.h index 09d8c50..c64f470 100644 --- a/Cfg/Template/os_cfg_app.h +++ b/Cfg/Template/os_cfg_app.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * OS CONFIGURATION (APPLICATION SPECIFICS) * * Filename : os_cfg_app.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/ARC/EM6/MetaWare/os_cpu.h b/Ports/ARC/EM6/MetaWare/os_cpu.h index acfe2be..75db88b 100644 --- a/Ports/ARC/EM6/MetaWare/os_cpu.h +++ b/Ports/ARC/EM6/MetaWare/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Synopsys ARC EM6 Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Synopsys ARC EM6 * Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check diff --git a/Ports/ARC/EM6/MetaWare/os_cpu_a.s b/Ports/ARC/EM6/MetaWare/os_cpu_a.s index 308e8e3..048a3a5 100644 --- a/Ports/ARC/EM6/MetaWare/os_cpu_a.s +++ b/Ports/ARC/EM6/MetaWare/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Synopsys ARC EM6 Port ; ; File : os_cpu_a.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Synopsys ARC EM6 ; Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check diff --git a/Ports/ARC/EM6/MetaWare/os_cpu_c.c b/Ports/ARC/EM6/MetaWare/os_cpu_c.c index 33ada1e..3126d7b 100644 --- a/Ports/ARC/EM6/MetaWare/os_cpu_c.c +++ b/Ports/ARC/EM6/MetaWare/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Synopsys ARC EM6 Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Synopsys ARC EM6 * Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check diff --git a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h index e6438e7..892da84 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-A Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s index 4527565..631970b 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s +++ b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d16.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s index f2a5f66..69bfca6 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s +++ b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d32.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s index 93df41f..b133f41 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s +++ b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-none.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h index 8067bcf..3f8a2bd 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-A Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm index 0297251..617366f 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d16.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm index 86c83d0..7fa016f 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d32.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm index a9144c2..d2c27ef 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-none.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h index b103a13..56d5eee 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-A Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S index 0a56045..45f3104 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S +++ b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-A Port @ @ File : os_cpu_a_vfp-d16.S -@ Version : V3.08.00 +@ Version : V3.08.01 @******************************************************************************************************** @ For : ARM7 or ARM9 @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S index 81259c3..0764b01 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S +++ b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-A Port @ @ File : os_cpu_a_vfp-d32.S -@ Version : V3.08.00 +@ Version : V3.08.01 @******************************************************************************************************** @ For : ARM7 or ARM9 @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S index c0b2226..6b03878 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S +++ b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-A Port @ @ File : os_cpu_a_vfp-none.S -@ Version : V3.08.00 +@ Version : V3.08.01 @******************************************************************************************************** @ For : ARM7 or ARM9 @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h index e05e161..7658168 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ARMv7-A Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm index 592037c..48ca691 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d16.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm index 3f19863..5288977 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d32.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm index beb630b..3ea9394 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-none.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c b/Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c index 94564c1..db2e50d 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c +++ b/Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-A Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb @@ -429,4 +429,3 @@ void OSTimeTickHook (void) #ifdef __cplusplus } #endif - diff --git a/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h b/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h index 0738958..9b6164c 100644 --- a/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv8-A Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv8-A Cortex-A * Mode : ARM64 diff --git a/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S b/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S index d41f047..28431dd 100644 --- a/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S +++ b/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv8-A Port * * File : os_cpu_a.S -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv8-A Cortex-A * Mode : ARM64 @@ -507,4 +507,3 @@ OS_CPU_SIMDGet: #endif RET - diff --git a/Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c b/Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c index b81d32c..5fd8e17 100644 --- a/Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c +++ b/Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv8-A Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv8-A Cortex-A * Mode : ARM64 @@ -431,4 +431,3 @@ void OSTimeTickHook (void) #ifdef __cplusplus } #endif - diff --git a/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h b/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h index 5b657bd..cb4a690 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv6-M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv6-M Cortex-M0 or Cortex-M0+ * Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s b/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s index 2ec25cc..0fbf90d 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s +++ b/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv6-M Port ; ; File : os_cpu_a.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv6-M Cortex-M0 or Cortex-M0+ ; Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h b/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h index d6b26c8..e142b45 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv6-M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv6-M Cortex-M0 or Cortex-M0+ * Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s b/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s index 140eb72..c13f932 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s +++ b/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv6-M Port @ @ File : os_cpu_a.s -@ Version : V3.08.00 +@ Version : V3.08.01 @******************************************************************************************************** @ For : ARMv6-M Cortex-M0 or Cortex-M0+ @ Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h b/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h index 3ced39b..34a303a 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv6-M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv6-M Cortex-M0 or Cortex-M0+ * Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm b/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm index 95bd9c7..54fbc60 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm +++ b/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv6-M Port ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv6-M Cortex-M0 or Cortex-M0+ ; Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c b/Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c index 29f733a..d4bf802 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c +++ b/Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv6-M Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv6-M Cortex-M0 or Cortex-M0+ * Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h b/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h index f49cff5..c85da50 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 * * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA @@ -157,11 +157,6 @@ void OS_CPU_SysTickInitFreq(CPU_INT32U cpu_freq); void OS_CPU_SysTickHandler (void); void OS_CPU_PendSVHandler (void); -#if (OS_CPU_ARM_FP_EN > 0u) -void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr); -void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr); -#endif - /* ********************************************************************************************************* diff --git a/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm b/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm index 1f92660..90f4797 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm +++ b/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-M Port ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-M Cortex-M ; Mode : Thumb-2 ISA @@ -50,11 +50,6 @@ EXPORT OSIntCtxSw EXPORT OS_CPU_PendSVHandler - IF {FPU} != "SoftVFP" - EXPORT OS_CPU_FP_Reg_Push - EXPORT OS_CPU_FP_Reg_Pop - ENDIF - ;******************************************************************************************************** ; EQUATES @@ -76,55 +71,6 @@ NVIC_PENDSVSET EQU 0x10000000 ; Value to trigg AREA CODE, CODE, READONLY -;******************************************************************************************************** -; FLOATING POINT REGISTERS PUSH -; void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr) -; -; Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit. -; -; 2) Pseudo-code is: -; a) Push remaining FPU regs S16-S31 on process stack; -; b) Update OSTCBCurPtr->StkPtr; -;******************************************************************************************************** - - IF {FPU} != "SoftVFP" - -OS_CPU_FP_Reg_Push - MRS R1, PSP ; PSP is process stack pointer - CBZ R1, OS_CPU_FP_nosave ; Skip FP register save the first time - - VSTMDB R0!, {S16-S31} - LDR R1, =OSTCBCurPtr - LDR R2, [R1] - STR R0, [R2] -OS_CPU_FP_nosave - BX LR - - ENDIF - - -;******************************************************************************************************** -; FLOATING POINT REGISTERS POP -; void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr) -; -; Note(s) : 1) This function restores S16-S31 of the Floating Point Unit. -; -; 2) Pseudo-code is: -; a) Restore regs S16-S31 of new process stack; -; b) Update OSTCBHighRdyPtr->StkPtr pointer of new proces stack; -;******************************************************************************************************** - - IF {FPU} != "SoftVFP" - -OS_CPU_FP_Reg_Pop - VLDMIA R0!, {S16-S31} - LDR R1, =OSTCBHighRdyPtr - LDR R2, [R1] - STR R0, [R2] - BX LR - - ENDIF - ;******************************************************************************************************** ; START MULTITASKING @@ -177,6 +123,7 @@ OSStartHighRdy MRS R0, CONTROL ORR R0, R0, #2 + BIC R0, R0, #4 ; Clear FPCA bit to indicate FPU is not in use MSR CONTROL, R0 ISB ; Sync instruction stream @@ -265,6 +212,13 @@ OS_CPU_PendSVHandler CPSIE I MRS R0, PSP ; PSP is process stack pointer + IF {FPU} != "SoftVFP" + ; Push high vfp registers if the task is using the FPU context + TST R14, #0x10 + IT EQ + VSTMDBEQ R0!, {S16-S31} + ENDIF + STMFD R0!, {R4-R11, R14} ; Save remaining regs r4-11, R14 on process stack MOV32 R5, OSTCBCurPtr ; OSTCBCurPtr->StkPtr = SP; @@ -287,10 +241,22 @@ OS_CPU_PendSVHandler ORR LR, R4, #0x04 ; Ensure exception return uses process stack LDR R0, [R2] ; R0 is new process SP; SP = OSTCBHighRdyPtr->StkPtr; LDMFD R0!, {R4-R11, R14} ; Restore r4-11, R14 from new process stack + + IF {FPU} != "SoftVFP" + ; Pop the high vfp registers if the next task is using the FPU context + TST R14, #0x10 + IT EQ + VLDMIAEQ R0!, {S16-S31} + ENDIF + MSR PSP, R0 ; Load PSP with new process SP MOV32 R2, #0 ; Restore BASEPRI priority level to 0 + CPSID I ; Cortex-M7 errata notice. See Note #5 MSR BASEPRI, R2 + DSB + ISB + CPSIE I BX LR ; Exception return will restore remaining context ALIGN ; Removes warning[A1581W]: added of padding at
diff --git a/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h b/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h index 1b09231..d55cc24 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA @@ -157,11 +157,6 @@ void OS_CPU_SysTickInitFreq(CPU_INT32U cpu_freq); void OS_CPU_SysTickHandler (void); void OS_CPU_PendSVHandler (void); -#if (OS_CPU_ARM_FP_EN > 0u) -void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr); -void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr); -#endif - /* ********************************************************************************************************* diff --git a/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm b/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm index 5529756..4f65ad6 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm +++ b/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-M Port ; ; File : os_cpu_s.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-M Cortex-M ; Mode : Thumb-2 ISA @@ -59,11 +59,6 @@ OS_KA_BASEPRI_BoundaryAddr: .word OS_KA_BASEPRI_Boundary .global OSIntCtxSw .global OS_CPU_PendSVHandler - .if __TI_VFP_SUPPORT__ - .global OS_CPU_FP_Reg_Push - .global OS_CPU_FP_Reg_Pop - .endif - ;******************************************************************************************************** ; EQUATES @@ -84,59 +79,6 @@ NVIC_PENDSVSET: .word 0x10000000 ; Value to trigg .thumb -;******************************************************************************************************** -; FLOATING POINT REGISTERS PUSH -; void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr) -; -; Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit. -; -; 2) Pseudo-code is: -; a) Push remaining FPU regs S16-S31 on process stack; -; b) Update OSTCBCurPtr->StkPtr; -;******************************************************************************************************** - - .if __TI_VFP_SUPPORT__ - .asmfunc -OS_CPU_FP_Reg_Push: - MRS R1, PSP ; PSP is process stack pointer - CBZ R1, OS_CPU_FP_nosave ; Skip FP register save the first time - - VSTMDB R0!, {S16-S31} - LDR R1, OSTCBCurPtrAddr - LDR R2, [R1] - STR R0, [R2] - .endasmfunc - - .asmfunc -OS_CPU_FP_nosave: - BX LR - .endasmfunc - .endif - - -;******************************************************************************************************** -; FLOATING POINT REGISTERS POP -; void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr) -; -; Note(s) : 1) This function restores S16-S31 of the Floating Point Unit. -; -; 2) Pseudo-code is: -; a) Restore regs S16-S31 of new process stack; -; b) Update OSTCBHighRdyPtr->StkPtr pointer of new proces stack; -;******************************************************************************************************** - - .if __TI_VFP_SUPPORT__ - .asmfunc -OS_CPU_FP_Reg_Pop: - VLDMIA R0!, {S16-S31} - LDR R1, OSTCBHighRdyPtrAddr - LDR R2, [R1] - STR R0, [R2] - BX LR - .endasmfunc - .endif - - ;******************************************************************************************************** ; START MULTITASKING ; void OSStartHighRdy(void) @@ -189,6 +131,7 @@ OSStartHighRdy: MRS R0, CONTROL ORR R0, R0, #2 + BIC R0, R0, #4 ; Clear FPCA bit to indicate FPU is not in use MSR CONTROL, R0 ISB ; Sync instruction stream @@ -281,6 +224,13 @@ OS_CPU_PendSVHandler: CPSIE I MRS R0, PSP ; PSP is process stack pointer + .if __TI_VFP_SUPPORT__ + ; Push high vfp registers if the task is using the FPU context + TST R14, #0x10 + IT EQ + VSTMDBEQ R0!, {S16-S31} + .endif + STMFD R0!, {R4-R11, R14} ; Save remaining regs r4-11, R14 on process stack LDR R5, OSTCBCurPtrAddr ; OSTCBCurPtr->StkPtr = SP; @@ -303,10 +253,22 @@ OS_CPU_PendSVHandler: ORR LR, R4, #0x04 ; Ensure exception return uses process stack LDR R0, [R2] ; R0 is new process SP; SP = OSTCBHighRdyPtr->StkPtr; LDMFD R0!, {R4-R11, R14} ; Restore r4-11, R14 from new process stack + + .if __TI_VFP_SUPPORT__ + ; Pop the high vfp registers if the next task is using the FPU context + TST R14, #0x10 + IT EQ + VLDMIAEQ R0!, {S16-S31} + .endif + MSR PSP, R0 ; Load PSP with new process SP MOV R2, #0 ; Restore BASEPRI priority level to 0 + CPSID I ; Cortex-M7 errata notice. See Note #5 MSR BASEPRI, R2 + DSB + ISB + CPSIE I BX LR ; Exception return will restore remaining context .endasmfunc diff --git a/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h b/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h index 410328d..d0f2236 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA @@ -157,11 +157,6 @@ void OS_CPU_SysTickInitFreq(CPU_INT32U cpu_freq); void OS_CPU_SysTickHandler (void); void OS_CPU_PendSVHandler (void); -#if (OS_CPU_ARM_FP_EN > 0u) -void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr); -void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr); -#endif - /* ********************************************************************************************************* diff --git a/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S b/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S index 7a09616..e1d82c3 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S +++ b/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -16,6 +16,9 @@ @ @ ARMv7-M Port @ +@ File : os_cpu_a.asm +@ Version : V3.08.01 +@******************************************************************************************************** @ For : ARMv7-M Cortex-M @ Mode : Thumb-2 ISA @ Toolchain : GNU C Compiler @@ -46,10 +49,6 @@ .global OSIntCtxSw .global OS_CPU_PendSVHandler -#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) - .global OS_CPU_FP_Reg_Push - .global OS_CPU_FP_Reg_Pop -#endif @******************************************************************************************************** @@ -72,56 +71,6 @@ .syntax unified -@******************************************************************************************************** -@ FLOATING POINT REGISTERS PUSH -@ void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr) -@ -@ Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit. -@ -@ 2) Pseudo-code is: -@ a) Push remaining FPU regs S16-S31 on process stack; -@ b) Update OSTCBCurPtr->StkPtr; -@******************************************************************************************************** - -#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) - -.thumb_func -OS_CPU_FP_Reg_Push: - MRS R1, PSP @ PSP is process stack pointer - CBZ R1, OS_CPU_FP_nosave @ Skip FP register save the first time - - VSTMDB R0!, {S16-S31} - LDR R1, =OSTCBCurPtr - LDR R2, [R1] - STR R0, [R2] -OS_CPU_FP_nosave: - BX LR -#endif - - -@******************************************************************************************************** -@ FLOATING POINT REGISTERS POP -@ void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr) -@ -@ Note(s) : 1) This function restores S16-S31 of the Floating Point Unit. -@ -@ 2) Pseudo-code is: -@ a) Restore regs S16-S31 of new process stack; -@ b) Update OSTCBHighRdyPtr->StkPtr pointer of new proces stack; -@******************************************************************************************************** - -#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) - -.thumb_func -OS_CPU_FP_Reg_Pop: - VLDMIA R0!, {S16-S31} - LDR R1, =OSTCBHighRdyPtr - LDR R2, [R1] - STR R0, [R2] - BX LR -#endif - - @******************************************************************************************************** @ START MULTITASKING @ void OSStartHighRdy(void) @@ -182,6 +131,7 @@ OSStartHighRdy: MRS R0, CONTROL ORR R0, R0, #2 + BIC R0, R0, #4 @ Clear FPCA bit to indicate FPU is not in use MSR CONTROL, R0 ISB @ Sync instruction stream @@ -273,6 +223,13 @@ OS_CPU_PendSVHandler: CPSIE I MRS R0, PSP @ PSP is process stack pointer +#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) + @ Push high vfp registers if the task is using the FPU context + TST R14, #0x10 + IT EQ + VSTMDBEQ R0!, {S16-S31} +#endif + STMFD R0!, {R4-R11, R14} @ Save remaining regs r4-11, R14 on process stack MOVW R5, #:lower16:OSTCBCurPtr @ OSTCBCurPtr->StkPtr = SP; @@ -299,10 +256,22 @@ OS_CPU_PendSVHandler: ORR LR, R4, #0x04 @ Ensure exception return uses process stack LDR R0, [R2] @ R0 is new process SP; SP = OSTCBHighRdyPtr->StkPtr; LDMFD R0!, {R4-R11, R14} @ Restore r4-11, R14 from new process stack + +#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) + @ Pop the high vfp registers if the next task is using the FPU context + TST R14, #0x10 + IT EQ + VLDMIAEQ R0!, {S16-S31} +#endif + MSR PSP, R0 @ Load PSP with new process SP MOV R2, #0 @ Restore BASEPRI priority level to 0 + CPSID I @ Cortex-M7 errata notice. See Note #5 MSR BASEPRI, R2 + DSB + ISB + CPSIE I BX LR @ Exception return will restore remaining context .end diff --git a/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h b/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h index a3ec20a..d59cc8a 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA @@ -157,11 +157,6 @@ void OS_CPU_SysTickInitFreq(CPU_INT32U cpu_freq); void OS_CPU_SysTickHandler (void); void OS_CPU_PendSVHandler (void); -#if (OS_CPU_ARM_FP_EN > 0u) -void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr); -void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr); -#endif - /* ********************************************************************************************************* diff --git a/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm b/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm index 6acd650..c0eaad7 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm +++ b/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-M Port ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-M Cortex-M ; Mode : Thumb-2 ISA @@ -50,11 +50,6 @@ PUBLIC OSIntCtxSw PUBLIC OS_CPU_PendSVHandler -#ifdef __ARMVFP__ - PUBLIC OS_CPU_FP_Reg_Push - PUBLIC OS_CPU_FP_Reg_Pop -#endif - ;******************************************************************************************************** ; EQUATES @@ -74,51 +69,6 @@ NVIC_PENDSVSET EQU 0x10000000 ; Value to trigg THUMB -;******************************************************************************************************** -; FLOATING POINT REGISTERS PUSH -; void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr) -; -; Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit. -; -; 2) Pseudo-code is: -; a) Push remaining FPU regs S16-S31 on process stack; -; b) Update OSTCBCurPtr->StkPtr; -;******************************************************************************************************** - -#ifdef __ARMVFP__ -OS_CPU_FP_Reg_Push - MRS R1, PSP ; PSP is process stack pointer - CBZ R1, OS_CPU_FP_nosave ; Skip FP register save the first time - - VSTMDB R0!, {S16-S31} - LDR R1, =OSTCBCurPtr - LDR R2, [R1] - STR R0, [R2] -OS_CPU_FP_nosave - BX LR -#endif - - -;******************************************************************************************************** -; FLOATING POINT REGISTERS POP -; void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr) -; -; Note(s) : 1) This function restores S16-S31 of the Floating Point Unit. -; -; 2) Pseudo-code is: -; a) Restore regs S16-S31 of new process stack; -; b) Update OSTCBHighRdyPtr->StkPtr pointer of new proces stack; -;******************************************************************************************************** - -#ifdef __ARMVFP__ -OS_CPU_FP_Reg_Pop - VLDMIA R0!, {S16-S31} - LDR R1, =OSTCBHighRdyPtr - LDR R2, [R1] - STR R0, [R2] - BX LR -#endif - ;******************************************************************************************************** ; START MULTITASKING @@ -171,6 +121,7 @@ OSStartHighRdy MRS R0, CONTROL ORR R0, R0, #2 + BIC R0, R0, #4 ; Clear FPCA bit to indicate FPU is not in use MSR CONTROL, R0 ISB ; Sync instruction stream @@ -259,6 +210,13 @@ OS_CPU_PendSVHandler CPSIE I MRS R0, PSP ; PSP is process stack pointer +#ifdef __ARMVFP__ + ; Push high vfp registers if the task is using the FPU context + TST R14, #0x10 + IT EQ + VSTMDBEQ R0!, {S16-S31} +#endif + STMFD R0!, {R4-R11, R14} ; Save remaining regs r4-11, R14 on process stack MOV32 R5, OSTCBCurPtr ; OSTCBCurPtr->StkPtr = SP; @@ -281,10 +239,22 @@ OS_CPU_PendSVHandler ORR LR, R4, #0x04 ; Ensure exception return uses process stack LDR R0, [R2] ; R0 is new process SP; SP = OSTCBHighRdyPtr->StkPtr; LDMFD R0!, {R4-R11, R14} ; Restore r4-11, R14 from new process stack + +#ifdef __ARMVFP__ + ; Pop the high vfp registers if the next task is using the FPU context + TST R14, #0x10 + IT EQ + VLDMIAEQ R0!, {S16-S31} +#endif + MSR PSP, R0 ; Load PSP with new process SP MOV32 R2, #0 ; Restore BASEPRI priority level to 0 + CPSID I ; Cortex-M7 errata notice. See Note #5 MSR BASEPRI, R2 + DSB + ISB + CPSIE I BX LR ; Exception return will restore remaining context END diff --git a/Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c b/Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c index 2a0ec6b..ceab816 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c +++ b/Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA @@ -451,27 +451,6 @@ CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task, /* Align the stack to 8-bytes. */ p_stk = (CPU_STK *)((CPU_STK)(p_stk) & 0xFFFFFFF8u); /* Registers stacked as if auto-saved on exception */ -#if (OS_CPU_ARM_FP_EN > 0u) /* FPU auto-saved registers. */ - --p_stk; - *(--p_stk) = (CPU_STK)0x02000000u; /* FPSCR */ - /* Initialize S0-S15 floating point registers */ - *(--p_stk) = (CPU_STK)0x41700000u; /* S15 */ - *(--p_stk) = (CPU_STK)0x41600000u; /* S14 */ - *(--p_stk) = (CPU_STK)0x41500000u; /* S13 */ - *(--p_stk) = (CPU_STK)0x41400000u; /* S12 */ - *(--p_stk) = (CPU_STK)0x41300000u; /* S11 */ - *(--p_stk) = (CPU_STK)0x41200000u; /* S10 */ - *(--p_stk) = (CPU_STK)0x41100000u; /* S9 */ - *(--p_stk) = (CPU_STK)0x41000000u; /* S8 */ - *(--p_stk) = (CPU_STK)0x40E00000u; /* S7 */ - *(--p_stk) = (CPU_STK)0x40C00000u; /* S6 */ - *(--p_stk) = (CPU_STK)0x40A00000u; /* S5 */ - *(--p_stk) = (CPU_STK)0x40800000u; /* S4 */ - *(--p_stk) = (CPU_STK)0x40400000u; /* S3 */ - *(--p_stk) = (CPU_STK)0x40000000u; /* S2 */ - *(--p_stk) = (CPU_STK)0x3F800000u; /* S1 */ - *(--p_stk) = (CPU_STK)0x00000000u; /* S0 */ -#endif *(--p_stk) = (CPU_STK)0x01000000u; /* xPSR */ *(--p_stk) = (CPU_STK)p_task; /* Entry Point */ *(--p_stk) = (CPU_STK)OS_TaskReturn; /* R14 (LR) */ @@ -480,12 +459,7 @@ CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task, *(--p_stk) = (CPU_STK)0x02020202u; /* R2 */ *(--p_stk) = (CPU_STK)p_stk_limit; /* R1 */ *(--p_stk) = (CPU_STK)p_arg; /* R0 : argument */ - -#if (OS_CPU_ARM_FP_EN > 0u) - *(--p_stk) = (CPU_STK)0xFFFFFFEDuL; /* R14: EXEC_RETURN; See Note 5 */ -#else *(--p_stk) = (CPU_STK)0xFFFFFFFDuL; /* R14: EXEC_RETURN; See Note 5 */ -#endif /* Remaining registers saved on process stack */ *(--p_stk) = (CPU_STK)0x11111111uL; /* R11 */ *(--p_stk) = (CPU_STK)0x10101010uL; /* R10 */ @@ -496,26 +470,6 @@ CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task, *(--p_stk) = (CPU_STK)0x05050505uL; /* R5 */ *(--p_stk) = (CPU_STK)0x04040404uL; /* R4 */ -#if (OS_CPU_ARM_FP_EN > 0u) - /* Initialize S16-S31 floating point registers */ - *(--p_stk) = (CPU_STK)0x41F80000u; /* S31 */ - *(--p_stk) = (CPU_STK)0x41F00000u; /* S30 */ - *(--p_stk) = (CPU_STK)0x41E80000u; /* S29 */ - *(--p_stk) = (CPU_STK)0x41E00000u; /* S28 */ - *(--p_stk) = (CPU_STK)0x41D80000u; /* S27 */ - *(--p_stk) = (CPU_STK)0x41D00000u; /* S26 */ - *(--p_stk) = (CPU_STK)0x41C80000u; /* S25 */ - *(--p_stk) = (CPU_STK)0x41C00000u; /* S24 */ - *(--p_stk) = (CPU_STK)0x41B80000u; /* S23 */ - *(--p_stk) = (CPU_STK)0x41B00000u; /* S22 */ - *(--p_stk) = (CPU_STK)0x41A80000u; /* S21 */ - *(--p_stk) = (CPU_STK)0x41A00000u; /* S20 */ - *(--p_stk) = (CPU_STK)0x41980000u; /* S19 */ - *(--p_stk) = (CPU_STK)0x41900000u; /* S18 */ - *(--p_stk) = (CPU_STK)0x41880000u; /* S17 */ - *(--p_stk) = (CPU_STK)0x41800000u; /* S16 */ -#endif - return (p_stk); } @@ -548,10 +502,6 @@ void OSTaskSwHook (void) CPU_BOOLEAN stk_status; #endif -#if (OS_CPU_ARM_FP_EN > 0u) - OS_CPU_FP_Reg_Push(OSTCBCurPtr->StkPtr); /* Push the FP registers of the current task. */ -#endif - #if OS_CFG_APP_HOOKS_EN > 0u if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) { (*OS_AppTaskSwHookPtr)(); @@ -592,10 +542,6 @@ void OSTaskSwHook (void) OSRedzoneHitHook(OSTCBCurPtr); } #endif - -#if (OS_CPU_ARM_FP_EN > 0u) - OS_CPU_FP_Reg_Pop(OSTCBHighRdyPtr->StkPtr); /* Pop the FP registers of the highest ready task. */ -#endif } diff --git a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h index 4fd3331..a009765 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h +++ b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-R Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s index c0b9f6a..c205303 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s +++ b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-d16.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s index 38528c2..1a10d8f 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s +++ b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-none.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h index ce67cd5..76107bf 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h +++ b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-R Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm index 7fc9c2e..5f3e249 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm +++ b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-d16.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm index 39e07e6..d202a6a 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm +++ b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-none.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h index 675e3e3..83cc47d 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-R Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S index daf0806..91b5fc2 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S +++ b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-R Port @ @ File : os_cpu_a_vfp-d16.S -@ Version : V3.08.00 +@ Version : V3.08.01 @******************************************************************************************************** @ For : ARMv7-R Cortex-R @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S index 98d46de..f26e31c 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S +++ b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-R Port @ @ File : os_cpu_a_vfp-none.S -@ Version : V3.08.00 +@ Version : V3.08.01 @******************************************************************************************************** @ For : ARMv7-R Cortex-R @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h index 4f1f6c7..5521327 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h +++ b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-R Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm index 7507b9b..35bad0c 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm +++ b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-d16.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm index b18303f..fd8791f 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm +++ b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-none.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c b/Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c index 93ab5e5..664501a 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c +++ b/Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ARMv7-R Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb @@ -428,4 +428,3 @@ void OSTimeTickHook (void) #ifdef __cplusplus } #endif - diff --git a/Ports/ARM/Generic/IAR/os_cpu.h b/Ports/ARM/Generic/IAR/os_cpu.h index 6ef7fe7..852afa6 100644 --- a/Ports/ARM/Generic/IAR/os_cpu.h +++ b/Ports/ARM/Generic/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ARM Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_cpu_a.asm b/Ports/ARM/Generic/IAR/os_cpu_a.asm index 29c69aa..6460e86 100644 --- a/Ports/ARM/Generic/IAR/os_cpu_a.asm +++ b/Ports/ARM/Generic/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Generic ARM Port ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_cpu_c.c b/Ports/ARM/Generic/IAR/os_cpu_c.c index fc58599..3850603 100644 --- a/Ports/ARM/Generic/IAR/os_cpu_c.c +++ b/Ports/ARM/Generic/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ARM Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm b/Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm index 52ceeae..a8a1efa 100644 --- a/Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm +++ b/Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; VFP SUPPORT ; ; File : os_cpu_fpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_dcc.c b/Ports/ARM/Generic/IAR/os_dcc.c index 597e11a..0f653e7 100644 --- a/Ports/ARM/Generic/IAR/os_dcc.c +++ b/Ports/ARM/Generic/IAR/os_dcc.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * DCC Communication * * File : os_dcc.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/RealView/os_cpu.h b/Ports/ARM/Generic/RealView/os_cpu.h index 1275809..4533b72 100644 --- a/Ports/ARM/Generic/RealView/os_cpu.h +++ b/Ports/ARM/Generic/RealView/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ARM Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/RealView/os_cpu_a.s b/Ports/ARM/Generic/RealView/os_cpu_a.s index a532aea..2761511 100644 --- a/Ports/ARM/Generic/RealView/os_cpu_a.s +++ b/Ports/ARM/Generic/RealView/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Generic ARM Port ; ; File : os_cpu_a.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/RealView/os_cpu_c.c b/Ports/ARM/Generic/RealView/os_cpu_c.c index 7a50588..3a185df 100644 --- a/Ports/ARM/Generic/RealView/os_cpu_c.c +++ b/Ports/ARM/Generic/RealView/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ARM Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/RealView/os_dcc.c b/Ports/ARM/Generic/RealView/os_dcc.c index d8329f0..3f56155 100644 --- a/Ports/ARM/Generic/RealView/os_dcc.c +++ b/Ports/ARM/Generic/RealView/os_dcc.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * DCC Communication * * File : os_dcc.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/AVR/ATxmega128/IAR/os_cpu.h b/Ports/AVR/ATxmega128/IAR/os_cpu.h index 3c02b8d..9bfd16f 100644 --- a/Ports/AVR/ATxmega128/IAR/os_cpu.h +++ b/Ports/AVR/ATxmega128/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR Xmega Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/AVR/ATxmega128/IAR/os_cpu_a.s90 b/Ports/AVR/ATxmega128/IAR/os_cpu_a.s90 index 39c1fcb..c781e93 100644 --- a/Ports/AVR/ATxmega128/IAR/os_cpu_a.s90 +++ b/Ports/AVR/ATxmega128/IAR/os_cpu_a.s90 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ATMEL AVR Xmega Port ; ; File : os_cpu_a.s90 -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ;******************************************************************************************************** diff --git a/Ports/AVR/ATxmega128/IAR/os_cpu_c.c b/Ports/AVR/ATxmega128/IAR/os_cpu_c.c index 33b41c5..96cf1de 100644 --- a/Ports/AVR/ATxmega128/IAR/os_cpu_c.c +++ b/Ports/AVR/ATxmega128/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR Xmega Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR/ATxmega128/IAR/os_cpu_i.s90 b/Ports/AVR/ATxmega128/IAR/os_cpu_i.s90 index 08c5495..205cb7e 100644 --- a/Ports/AVR/ATxmega128/IAR/os_cpu_i.s90 +++ b/Ports/AVR/ATxmega128/IAR/os_cpu_i.s90 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ATMEL AVR Xmega Port ; ; File : os_cpu_i.s90 -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** diff --git a/Ports/AVR32/AP7000/IAR/os_cpu.h b/Ports/AVR32/AP7000/IAR/os_cpu.h index b710cb9..2983090 100644 --- a/Ports/AVR32/AP7000/IAR/os_cpu.h +++ b/Ports/AVR32/AP7000/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ATMEL AVR32 AP7000 Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/AP7000/IAR/os_cpu_a.asm b/Ports/AVR32/AP7000/IAR/os_cpu_a.asm index c11f2b5..89f0c5a 100644 --- a/Ports/AVR32/AP7000/IAR/os_cpu_a.asm +++ b/Ports/AVR32/AP7000/IAR/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ATMEL AVR32 AP7000 Port * * File : os_cpu_a.asm -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/AP7000/IAR/os_cpu_c.c b/Ports/AVR32/AP7000/IAR/os_cpu_c.c index faac32f..fc59704 100644 --- a/Ports/AVR32/AP7000/IAR/os_cpu_c.c +++ b/Ports/AVR32/AP7000/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ATMEL AVR32 AP7000 Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/AtmelStudio6/os_cpu.h b/Ports/AVR32/UC3/AtmelStudio6/os_cpu.h index 11ccb71..8ef3508 100644 --- a/Ports/AVR32/UC3/AtmelStudio6/os_cpu.h +++ b/Ports/AVR32/UC3/AtmelStudio6/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : Atmel Studios ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S b/Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S index 7d4eca4..f9af2c9 100644 --- a/Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S +++ b/Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu_a.S -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : Atmel Studios ********************************************************************************************************* @@ -318,4 +318,3 @@ OSFastIntISRHandler: * CPU ASSEMBLY PORT FILE END ********************************************************************************************************* */ - diff --git a/Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c b/Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c index e24e4fc..ab2d8e4 100644 --- a/Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c +++ b/Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : Atmel Studios ********************************************************************************************************* @@ -429,4 +429,3 @@ void OSStartHighRdy (void) #ifdef __cplusplus } #endif - diff --git a/Ports/AVR32/UC3/IAR/os_cpu.h b/Ports/AVR32/UC3/IAR/os_cpu.h index 28139ea..72fe5af 100644 --- a/Ports/AVR32/UC3/IAR/os_cpu.h +++ b/Ports/AVR32/UC3/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/IAR/os_cpu_a.asm b/Ports/AVR32/UC3/IAR/os_cpu_a.asm index 356b470..e90f092 100644 --- a/Ports/AVR32/UC3/IAR/os_cpu_a.asm +++ b/Ports/AVR32/UC3/IAR/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu_a.asm -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/IAR/os_cpu_c.c b/Ports/AVR32/UC3/IAR/os_cpu_c.c index 6d0a4c7..dc83a7e 100644 --- a/Ports/AVR32/UC3/IAR/os_cpu_c.c +++ b/Ports/AVR32/UC3/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* @@ -429,4 +429,3 @@ void OSStartHighRdy (void) #ifdef __cplusplus } #endif - diff --git a/Ports/Blackfin/VDSP++/os_cpu.h b/Ports/Blackfin/VDSP++/os_cpu.h index 71dd863..046b8e4 100644 --- a/Ports/Blackfin/VDSP++/os_cpu.h +++ b/Ports/Blackfin/VDSP++/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -25,7 +25,7 @@ * development team * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -176,4 +176,3 @@ void OS_CPU_RegisterHandler(INT8U ivg, FNCT_PTR fn, BOOLEAN nesting); /* #endif /* _LANGUAGE_C */ #endif /* OS_CPU_H */ - diff --git a/Ports/Blackfin/VDSP++/os_cpu_a.asm b/Ports/Blackfin/VDSP++/os_cpu_a.asm index a6fdf24..d603a7b 100644 --- a/Ports/Blackfin/VDSP++/os_cpu_a.asm +++ b/Ports/Blackfin/VDSP++/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -25,7 +25,7 @@ * development team * * File : os_cpu_a.asm -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Blackfin/VDSP++/os_cpu_c.c b/Ports/Blackfin/VDSP++/os_cpu_c.c index bede690..533705c 100644 --- a/Ports/Blackfin/VDSP++/os_cpu_c.c +++ b/Ports/Blackfin/VDSP++/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -25,7 +25,7 @@ * development team * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/C28x/Generic/CCS/os_cpu.h b/Ports/C28x/Generic/CCS/os_cpu.h index c98957d..041faac 100644 --- a/Ports/C28x/Generic/CCS/os_cpu.h +++ b/Ports/C28x/Generic/CCS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * TI C28x Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : TI C28x * Mode : C28 Object mode diff --git a/Ports/C28x/Generic/CCS/os_cpu_a.asm b/Ports/C28x/Generic/CCS/os_cpu_a.asm index 4358153..a906664 100644 --- a/Ports/C28x/Generic/CCS/os_cpu_a.asm +++ b/Ports/C28x/Generic/CCS/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; TI C28x Port ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : TI C28x ; Mode : C28 Object mode diff --git a/Ports/C28x/Generic/CCS/os_cpu_c.c b/Ports/C28x/Generic/CCS/os_cpu_c.c index 06a9b52..92e4280 100644 --- a/Ports/C28x/Generic/CCS/os_cpu_c.c +++ b/Ports/C28x/Generic/CCS/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * TI C28x Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : TI C28x * Mode : C28 Object mode diff --git a/Ports/C28x/Generic/CCS/os_cpu_i.asm b/Ports/C28x/Generic/CCS/os_cpu_i.asm index 2cb8e44..f201569 100644 --- a/Ports/C28x/Generic/CCS/os_cpu_i.asm +++ b/Ports/C28x/Generic/CCS/os_cpu_i.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; TI C28x Port ; ; File : os_cpu_i.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : TI C28x ; Mode : C28 Object mode @@ -105,4 +105,3 @@ OS_CTX_RESTORE .macro ; Restore registers part 2. POP AR1H:AR0H ; AR1H:AR0H .endm - diff --git a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h index c150294..2896cae 100644 --- a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h +++ b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic Coldfire with EMAC Port for CodeWarrior Compiler * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm index 04db350..5c938b1 100644 --- a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm +++ b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm @@ -3,7 +3,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -20,7 +20,7 @@ ; Generic Coldfire with EMAC Port for CodeWarrior Compiler ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of ; the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to @@ -285,4 +285,3 @@ _OS_My_ISR_Handler: RTS .end - diff --git a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c index c5a090b..cfdc454 100644 --- a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c +++ b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic Coldfire with EMAC Port for CodeWarrior Compiler * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm index 1f0ade6..1a5cc9e 100644 --- a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm +++ b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm @@ -3,7 +3,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -20,7 +20,7 @@ ; Generic Coldfire with EMAC Port for CodeWarrior Compiler ; ; File : os_cpu_i.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** */ diff --git a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h index eb2845a..61661f5 100644 --- a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h +++ b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* @@ -113,4 +113,3 @@ void OSInitVBR(void); #endif #endif - diff --git a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm index 3acc34a..2a3f597 100644 --- a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm +++ b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_a.asm -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of * the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to diff --git a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c index 7586483..5e218b7 100644 --- a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c +++ b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/CodeWarrior/os_cpu.h b/Ports/Coldfire/Generic/CodeWarrior/os_cpu.h index ffa7b21..df09909 100644 --- a/Ports/Coldfire/Generic/CodeWarrior/os_cpu.h +++ b/Ports/Coldfire/Generic/CodeWarrior/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm index 9b8af64..79240fb 100644 --- a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm +++ b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_a.asm -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of * the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to @@ -264,4 +264,3 @@ _OS_My_ISR_Handler: RTS .end - diff --git a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c index f943f53..b2bfdbb 100644 --- a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c +++ b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm index 39ea11d..92489e6 100644 --- a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm +++ b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_i.asm -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/IAR/os_cpu.h b/Ports/Coldfire/Generic/IAR/os_cpu.h index 7525de1..e3ec8e9 100644 --- a/Ports/Coldfire/Generic/IAR/os_cpu.h +++ b/Ports/Coldfire/Generic/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR EWCF ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/IAR/os_cpu_a.asm b/Ports/Coldfire/Generic/IAR/os_cpu_a.asm index 7129176..b3855d4 100644 --- a/Ports/Coldfire/Generic/IAR/os_cpu_a.asm +++ b/Ports/Coldfire/Generic/IAR/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_a.asm -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of * the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to @@ -263,4 +263,3 @@ OS_My_ISR_Handler: RTS END - diff --git a/Ports/Coldfire/Generic/IAR/os_cpu_c.c b/Ports/Coldfire/Generic/IAR/os_cpu_c.c index e1fd9d3..c4545cf 100644 --- a/Ports/Coldfire/Generic/IAR/os_cpu_c.c +++ b/Ports/Coldfire/Generic/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : IAR EWCF ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/IAR/os_cpu_i.asm b/Ports/Coldfire/Generic/IAR/os_cpu_i.asm index cce3be7..114cad5 100644 --- a/Ports/Coldfire/Generic/IAR/os_cpu_i.asm +++ b/Ports/Coldfire/Generic/IAR/os_cpu_i.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_i.asm -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/EnSilica/eSi-3250/EDS/os_cpu.h b/Ports/EnSilica/eSi-3250/EDS/os_cpu.h index 1fdcc52..3cdd92e 100644 --- a/Ports/EnSilica/eSi-3250/EDS/os_cpu.h +++ b/Ports/EnSilica/eSi-3250/EDS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * EnSilica eSi-3250 Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : EnSilica eSi-3250 * Mode : Little-Endian, 32 registers diff --git a/Ports/EnSilica/eSi-3250/EDS/os_cpu_a.S b/Ports/EnSilica/eSi-3250/EDS/os_cpu_a.S index a4eec31..1c7140f 100644 --- a/Ports/EnSilica/eSi-3250/EDS/os_cpu_a.S +++ b/Ports/EnSilica/eSi-3250/EDS/os_cpu_a.S @@ -2,7 +2,7 @@ # uC/OS-III # The Real-Time Kernel # -# Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +# Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com # # SPDX-License-Identifier: APACHE-2.0 # @@ -17,7 +17,7 @@ # EnSilica eSi-32nn Port # # File : os_cpu_a.S -# Version : V3.08.00 +# Version : V3.08.01 #******************************************************************************************************** # For : EnSilica eSi-32nn # Mode : Little-Endian, 8, 16 or 32 registers diff --git a/Ports/EnSilica/eSi-3250/EDS/os_cpu_c.c b/Ports/EnSilica/eSi-3250/EDS/os_cpu_c.c index 9083eed..eb2aee5 100644 --- a/Ports/EnSilica/eSi-3250/EDS/os_cpu_c.c +++ b/Ports/EnSilica/eSi-3250/EDS/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * EnSilica eSi-32nn Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : EnSilica eSi-32nn * Mode : Little-Endian, 8, 16 or 32 registers diff --git a/Ports/HCS12/Paged/CodeWarrior/os_cpu.h b/Ports/HCS12/Paged/CodeWarrior/os_cpu.h index 3015ce5..7705ebf 100644 --- a/Ports/HCS12/Paged/CodeWarrior/os_cpu.h +++ b/Ports/HCS12/Paged/CodeWarrior/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Banked Memory Model * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/HCS12/Paged/CodeWarrior/os_cpu_a.s b/Ports/HCS12/Paged/CodeWarrior/os_cpu_a.s index ef4a0e2..ad9e1fb 100644 --- a/Ports/HCS12/Paged/CodeWarrior/os_cpu_a.s +++ b/Ports/HCS12/Paged/CodeWarrior/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Banked Memory Model ; ; File : os_cpu_a.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** NON_BANKED: section diff --git a/Ports/HCS12/Paged/CodeWarrior/os_cpu_c.c b/Ports/HCS12/Paged/CodeWarrior/os_cpu_c.c index a6cfbd4..017bad5 100644 --- a/Ports/HCS12/Paged/CodeWarrior/os_cpu_c.c +++ b/Ports/HCS12/Paged/CodeWarrior/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Banked Memory Model * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/M14K/CodeSourcery/os_cpu.h b/Ports/M14K/CodeSourcery/os_cpu.h index 443002f..bf40a96 100644 --- a/Ports/M14K/CodeSourcery/os_cpu.h +++ b/Ports/M14K/CodeSourcery/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MicroMips * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/M14K/CodeSourcery/os_cpu_a.S b/Ports/M14K/CodeSourcery/os_cpu_a.S index f6b5de5..a448d7c 100644 --- a/Ports/M14K/CodeSourcery/os_cpu_a.S +++ b/Ports/M14K/CodeSourcery/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MicroMips * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -822,9 +822,3 @@ EnableInterruptSource: nop .end EnableInterruptSource - - - - - - diff --git a/Ports/M14K/CodeSourcery/os_cpu_c.c b/Ports/M14K/CodeSourcery/os_cpu_c.c index 9a99d9e..4810f6f 100644 --- a/Ports/M14K/CodeSourcery/os_cpu_c.c +++ b/Ports/M14K/CodeSourcery/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MicroMips * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -375,4 +375,3 @@ void OSTimeTickHook (void) #ifdef __cplusplus } #endif - diff --git a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu.h b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu.h index 353fac1..3c681c6 100644 --- a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu.h +++ b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -22,7 +22,7 @@ * MPLAB * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_a.S b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_a.S index ff16142..6f9ec2c 100644 --- a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_a.S +++ b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -22,7 +22,7 @@ * MPLAB * * File : os_cpu_a.S -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_c.c b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_c.c index 5d6ed9d..0132034 100644 --- a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_c.c +++ b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -22,7 +22,7 @@ * MPLAB * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu.h b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu.h index f9ba72e..1be1518 100644 --- a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu.h +++ b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MSP430x5xx * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Compiler : IAR System Embedded Workbench for TI MSP430 V5.20 ********************************************************************************************************* diff --git a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_a.s43 b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_a.s43 index 9cb8f96..3277c40 100644 --- a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_a.s43 +++ b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_a.s43 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; MSP430x5xx ; ; File : os_cpu.h -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** #include diff --git a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_c.c b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_c.c index e785a1a..950682a 100644 --- a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_c.c +++ b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MSP430x5xx * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Compiler : IAR System Embedded Workbench for TI MSP430 V5.20 ********************************************************************************************************* @@ -348,4 +348,3 @@ void OSTimeTickHook (void) #ifdef __cplusplus } #endif - diff --git a/Ports/MicroBlaze/GNU/os_cpu.h b/Ports/MicroBlaze/GNU/os_cpu.h index bba08b0..b86ea7c 100644 --- a/Ports/MicroBlaze/GNU/os_cpu.h +++ b/Ports/MicroBlaze/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -90,4 +90,3 @@ void OS_CPU_ISR (void); /* See OS_CPU_A.S #endif #endif - diff --git a/Ports/MicroBlaze/GNU/os_cpu_a.S b/Ports/MicroBlaze/GNU/os_cpu_a.S index 9e842a7..38c698c 100644 --- a/Ports/MicroBlaze/GNU/os_cpu_a.S +++ b/Ports/MicroBlaze/GNU/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu_a.S -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/MicroBlaze/GNU/os_cpu_c.c b/Ports/MicroBlaze/GNU/os_cpu_c.c index 91b8633..a23c78b 100644 --- a/Ports/MicroBlaze/GNU/os_cpu_c.c +++ b/Ports/MicroBlaze/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Microchip/PIC24FJ128/C30/os_cpu.h b/Ports/Microchip/PIC24FJ128/C30/os_cpu.h index f5940ef..42b2638 100644 --- a/Ports/Microchip/PIC24FJ128/C30/os_cpu.h +++ b/Ports/Microchip/PIC24FJ128/C30/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * PIC24 MPLab Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Microchip/PIC24FJ128/C30/os_cpu_a.S b/Ports/Microchip/PIC24FJ128/C30/os_cpu_a.S index b32882e..62ca2a6 100644 --- a/Ports/Microchip/PIC24FJ128/C30/os_cpu_a.S +++ b/Ports/Microchip/PIC24FJ128/C30/os_cpu_a.S @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; PIC24 MPLab Port ; ; File : os_cpu_a.S -: Version : V3.08.00 +: Version : V3.08.01 ;******************************************************************************************************** @@ -143,4 +143,3 @@ _OSIntCtxSw: OS_REGS_RESTORE ; Restore all of this tasks registers from the stack retfie ; Return from interrupt - diff --git a/Ports/Microchip/PIC24FJ128/C30/os_cpu_c.c b/Ports/Microchip/PIC24FJ128/C30/os_cpu_c.c index 98d863c..1976cd2 100644 --- a/Ports/Microchip/PIC24FJ128/C30/os_cpu_c.c +++ b/Ports/Microchip/PIC24FJ128/C30/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * PIC24 MPLab Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Microchip/PIC24FJ128/C30/os_cpu_util_a.s b/Ports/Microchip/PIC24FJ128/C30/os_cpu_util_a.s index 4f70fde..faf8e8c 100644 --- a/Ports/Microchip/PIC24FJ128/C30/os_cpu_util_a.s +++ b/Ports/Microchip/PIC24FJ128/C30/os_cpu_util_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; PIC24 MPLab Port ; ; File : os_cpu_util_a.s -: Version : V3.08.00 +: Version : V3.08.01 ;******************************************************************************************************** ; diff --git a/Ports/NiosII/GNU/os_cpu.h b/Ports/NiosII/GNU/os_cpu.h new file mode 100644 index 0000000..d29e25f --- /dev/null +++ b/Ports/NiosII/GNU/os_cpu.h @@ -0,0 +1,111 @@ +/* +********************************************************************************************************* +* uC/OS-III +* The Real-Time Kernel +* +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* +* SPDX-License-Identifier: APACHE-2.0 +* +* This software is subject to an open source license and is distributed by +* Silicon Laboratories Inc. pursuant to the terms of the Apache License, +* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. +* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* Altera NiosII Port +* +* File : os_cpu_c.h +* Version : V3.08.01 +********************************************************************************************************* +* For : Altera NiosII +* Toolchain : GNU - Altera NiosII +********************************************************************************************************* +*/ + +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2003-5 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +* Altera does not recommend, suggest or require that this reference design * +* file be used in conjunction or combination with any other product. * +******************************************************************************/ + +#ifndef __OS_CPU_H__ +#define __OS_CPU_H__ + +#ifdef OS_CPU_GLOBALS +#define OS_CPU_EXT +#else +#define OS_CPU_EXT extern +#endif + +#ifdef __cplusplus +extern "C" { +#endif + + +/* +********************************************************************************************************* +* PROTOTYPES +********************************************************************************************************* +*/ + +/* These functions are located in the "os_cpu_a.S" file */ +void OSCtxSw (void); +void OSIntCtxSw (void); +void OSStartHighRdy(void); +void OSStartTsk (void); + + +/* +********************************************************************************************************* +* MACROS +********************************************************************************************************* +*/ + +#define OS_TASK_SW() OSCtxSw() + +#if (CPU_CFG_TS_TMR_EN > 0u) +#define OS_TS_GET() CPU_TS_TmrRd() +#else +#define OS_TS_GET() (CPU_TS)0 +#endif + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#ifdef __cplusplus +} +#endif + +#endif /* __OS_CPU_H__ */ diff --git a/Ports/NiosII/GNU/os_cpu_a.S b/Ports/NiosII/GNU/os_cpu_a.S new file mode 100644 index 0000000..7acd26d --- /dev/null +++ b/Ports/NiosII/GNU/os_cpu_a.S @@ -0,0 +1,284 @@ +/* +********************************************************************************************************* +* uC/OS-III +* The Real-Time Kernel +* +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* +* SPDX-License-Identifier: APACHE-2.0 +* +* This software is subject to an open source license and is distributed by +* Silicon Laboratories Inc. pursuant to the terms of the Apache License, +* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. +* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* File : os_cpu_a.S +* Version : V3.08.01 +********************************************************************************************************* +*/ + +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2009 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +* Altera does not recommend, suggest or require that this reference design * +* file be used in conjunction or combination with any other product. * +******************************************************************************/ + +#include "os_cfg.h" + + .text + +/********************************************************************************************************* + * PERFORM A CONTEXT SWITCH + * void OSCtxSw(void) - from task level + * void OSIntCtxSw(void) - from interrupt level + * + * Note(s): 1) Upon entry, + * OSTCBCurPtr points to the OS_TCB of the task to suspend + * OSTCBHighRdyPtr points to the OS_TCB of the task to resume + * + *********************************************************************************************************/ + .global OSIntCtxSw + .global OSCtxSw + +OSIntCtxSw: +OSCtxSw: + + /* + * Save the remaining registers to the stack. + */ + + addi sp, sp, -44 + +#ifdef ALT_STACK_CHECK + + bltu sp, et, .Lstack_overflow + +#endif + +#if (OS_THREAD_SAFE_NEWLIB > 0u) + ldw r3, %gprel(_impure_ptr)(gp) /* load the pointer */ +#endif /* OS_THREAD_SAFE_NEWLIB */ + + ldw r4, %gprel(OSTCBCurPtr)(gp) + + stw ra, 0(sp) + stw fp, 4(sp) + stw r23, 8(sp) + stw r22, 12(sp) + stw r21, 16(sp) + stw r20, 20(sp) + stw r19, 24(sp) + stw r18, 28(sp) + stw r17, 32(sp) + stw r16, 36(sp) + +#if (OS_THREAD_SAFE_NEWLIB > 0u) + /* + * store the current value of _impure_ptr so it can be restored + * later; _impure_ptr is asigned on a per task basis. It is used + * by Newlib to achieve reentrancy. + */ + + stw r3, 40(sp) /* save the impure pointer */ +#endif /* OS_THREAD_SAFE_NEWLIB */ + + /* + * Save the current tasks stack pointer into the current tasks OS_TCB. + * i.e. OSTCBCurPtr->OSTCBStkPtr = sp; + */ + + stw sp, (r4) /* save the stack pointer (OSTCBStkPtr */ + /* is the first element in the OS_TCB */ + /* structure. */ + + /* + * Call the user definable OSTaskSWHook() + */ + + call OSTaskSwHook + +0: + +9: + + /* + * OSTCBCurPtr = OSTCBHighRdyPtr; + * OSPrioCur = OSPrioHighRdy; + */ + + ldw r4, %gprel(OSTCBHighRdyPtr)(gp) + ldb r5, %gprel(OSPrioHighRdy)(gp) + + stw r4, %gprel(OSTCBCurPtr)(gp) /* set the current task to be the new task */ + stb r5, %gprel(OSPrioCur)(gp) /* store the new task's priority as the current */ + /* task's priority */ + + /* + * Set the stack pointer to point to the new task's stack + */ + + ldw sp, (r4) /* the stack pointer is the first entry in the OS_TCB structure */ + +#if defined(ALT_STACK_CHECK) && (OS_TASK_CREATE_EXT_EN > 0) + + ldw et, 8(r4) /* load the new stack limit */ + +#endif + +#if (OS_THREAD_SAFE_NEWLIB > 0u) + /* + * restore the value of _impure_ptr ; _impure_ptr is asigned on a + * per task basis. It is used by Newlib to achieve reentrancy. + */ + + ldw r3, 40(sp) /* load the new impure pointer */ +#endif /* OS_THREAD_SAFE_NEWLIB */ + + /* + * Restore the saved registers for the new task. + */ + + ldw ra, 0(sp) + ldw fp, 4(sp) + ldw r23, 8(sp) + ldw r22, 12(sp) + ldw r21, 16(sp) + ldw r20, 20(sp) + ldw r19, 24(sp) + ldw r18, 28(sp) + ldw r17, 32(sp) + ldw r16, 36(sp) + +#if (OS_THREAD_SAFE_NEWLIB > 0u) + + stw r3, %gprel(_impure_ptr)(gp) /* update _impure_ptr */ + +#endif /* OS_THREAD_SAFE_NEWLIB */ + +#if defined(ALT_STACK_CHECK) && (OS_TASK_CREATE_EXT_EN > 0) + + stw et, %gprel(alt_stack_limit_value)(gp) + +#endif + + addi sp, sp, 44 + + /* + * resume execution of the new task. + */ + + ret + +#ifdef ALT_STACK_CHECK + +.Lstack_overflow: + break 3 + +#endif + +.set OSCtxSw_SWITCH_PC,0b-OSCtxSw + +/********************************************************************************************************* + * START THE HIGHEST PRIORITY TASK + * void OSStartHighRdy(void) + * + * Note(s): 1) Upon entry, + * OSTCBCurPtr points to the OS_TCB of the task to suspend + * OSTCBHighRdyPtr points to the OS_TCB of the task to resume + * + *********************************************************************************************************/ + .global OSStartHighRdy + +OSStartHighRdy: + + /* + * disable interrupts so that the scheduler doesn't run while + * we're initialising this task. + */ + rdctl r18, status + subi r17, zero, 2 /* r17 = 0xfffffffe */ + and r18, r18, r17 + wrctl status, r18 + + /* + * Call the user definable OSTaskSWHook() + */ + + call OSTaskSwHook + + /* + * set OSRunning = TRUE. + */ + + movi r18, 1 /* set r18 to the value 'TRUE' */ + stb r18, %gprel(OSRunning)(gp) /* save this to OSRunning */ + +#if defined(ALT_STACK_CHECK) && (OS_TASK_CREATE_EXT_EN == 0) + + mov et, zero /* Don't check stack limits */ + stw et, %gprel(alt_stack_limit_value)(gp) + +#endif + + /* + * start execution of the new task. + */ + + br 9b + +/********************************************************************************************************* + * CALL THE TASK INITILISATION FUNCTION + * void OSStartTsk(void) + *********************************************************************************************************/ + + .global OSStartTsk + +OSStartTsk: + /* This instruction is never executed. Its here to make the + * backtrace work right + */ + movi sp, 0 + + /* Enable interrupts */ + rdctl r2, status + ori r2, r2, 0x1 + wrctl status, r2 + + ldw r2, 4(sp) + ldw r4, 0(sp) + + addi sp, sp, 8 + + callr r2 + + nop diff --git a/Ports/NiosII/GNU/os_cpu_c.c b/Ports/NiosII/GNU/os_cpu_c.c new file mode 100644 index 0000000..f1b40ae --- /dev/null +++ b/Ports/NiosII/GNU/os_cpu_c.c @@ -0,0 +1,390 @@ +/* +********************************************************************************************************* +* uC/OS-III +* The Real-Time Kernel +* +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* +* SPDX-License-Identifier: APACHE-2.0 +* +* This software is subject to an open source license and is distributed by +* Silicon Laboratories Inc. pursuant to the terms of the Apache License, +* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. +* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* Altera NiosII Port +* +* File : os_cpu_c.c +* Version : V3.08.01 +********************************************************************************************************* +* For : Altera NiosII +* Toolchain : GNU - Altera NiosII +********************************************************************************************************* +*/ + +#include +#include + +#include + +#define OS_CPU_GLOBALS +#include "includes.h" /* Standard includes for uC/OS-III */ +#include "../../../Source/os.h" + +#include "system.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/* +************************************************************************************************************************ +* IDLE TASK HOOK +* +* Description: This function is called by the idle task. This hook has been added to allow you to do such things as +* STOP the CPU to conserve power. +* +* Arguments : none +* +* Note(s) : none +************************************************************************************************************************ +*/ + +void OSIdleTaskHook (void) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppIdleTaskHookPtr != (OS_APP_HOOK_VOID)0) { + (*OS_AppIdleTaskHookPtr)(); + } +#endif +} + +/* +************************************************************************************************************************ +* OS INITIALIZATION HOOK +* +* Description: This function is called by OSInit() at the beginning of OSInit(). +* +* Arguments : none +* +* Note(s) : none +************************************************************************************************************************ +*/ + +void OSInitHook (void) +{ +} + + +/* +************************************************************************************************************************ +* REDZONE HIT HOOK +* +* Description: This function is called when a task's stack overflowed. +* +* Arguments : p_tcb Pointer to the task control block of the offending task. NULL if ISR. +* +* Note(s) : None. +************************************************************************************************************************ +*/ +#if (OS_CFG_TASK_STK_REDZONE_EN > 0u) +void OSRedzoneHitHook (OS_TCB *p_tcb) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppRedzoneHitHookPtr != (OS_APP_HOOK_TCB)0) { + (*OS_AppRedzoneHitHookPtr)(p_tcb); + } else { + CPU_SW_EXCEPTION(;); + } +#else + (void)p_tcb; /* Prevent compiler warning */ + CPU_SW_EXCEPTION(;); +#endif +} +#endif + +/* +************************************************************************************************************************ +* STATISTIC TASK HOOK +* +* Description: This function is called every second by uC/OS-III's statistics task. This allows your application to add +* functionality to the statistics task. +* +* Arguments : none +* +* Note(s) : none +************************************************************************************************************************ +*/ + +void OSStatTaskHook (void) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppStatTaskHookPtr != (OS_APP_HOOK_VOID)0) { + (*OS_AppStatTaskHookPtr)(); + } +#endif +} + +/* +************************************************************************************************************************ +* TASK CREATION HOOK +* +* Description: This function is called when a task is created. +* +* Arguments : p_tcb is a pointer to the task control block of the task being created. +* +* Note(s) : none +************************************************************************************************************************ +*/ + +void OSTaskCreateHook (OS_TCB *p_tcb) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTaskCreateHookPtr != (OS_APP_HOOK_TCB)0) { + (*OS_AppTaskCreateHookPtr)(p_tcb); + } +#else + (void)p_tcb; /* Prevent compiler warning */ +#endif +} + +/* +************************************************************************************************************************ +* TASK DELETION HOOK +* +* Description: This function is called when a task is deleted. +* +* Arguments : p_tcb is a pointer to the task control block of the task being deleted. +* +* Note(s) : none +************************************************************************************************************************ +*/ + +void OSTaskDelHook (OS_TCB *p_tcb) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTaskDelHookPtr != (OS_APP_HOOK_TCB)0) { + (*OS_AppTaskDelHookPtr)(p_tcb); + } +#else + (void)p_tcb; /* Prevent compiler warning */ +#endif +} + +/* +************************************************************************************************************************ +* TASK RETURN HOOK +* +* Description: This function is called if a task accidentally returns. In other words, a task should either be an +* infinite loop or delete itself when done. +* +* Arguments : p_tcb is a pointer to the task control block of the task that is returning. +* +* Note(s) : none +************************************************************************************************************************ +*/ + +void OSTaskReturnHook (OS_TCB *p_tcb) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTaskReturnHookPtr != (OS_APP_HOOK_TCB)0) { + (*OS_AppTaskReturnHookPtr)(p_tcb); + } +#else + (void)p_tcb; +#endif +} + +/* +************************************************************************************************************************ +* INITIALIZE A TASK'S STACK +* +* Description: This function is called by OS_Task_Create() to initialize the stack frame of the task being created. This +* function is highly processor specific. +* +* Arguments : p_task is a pointer to the task entry point address. +* +* p_arg is a pointer to a user supplied data area that will be passed to the task when the task +* first executes. +* +* p_stk_limit is a pointer to the stack limit address. It is not used for this port. +* +* p_stk_base is a pointer to the base address of the stack. +* +* stk_size is the size of the stack in number of CPU_STK elements. +* +* opt specifies options that can be used to alter the behavior of OS_Task_StkInit(). +* (see OS.H for OS_TASK_OPT_xxx). +* +* Returns : Always returns the location of the new top-of-stack' once the processor registers have been placed on the +* stack in the proper order. +* +* Note(s) : 1) Interrupts are enabled when your task starts executing. +* 2) All tasks run in Thread mode, using process stack. +************************************************************************************************************************ +*/ + +CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task, + void *p_arg, + CPU_STK *p_stk_base, + CPU_STK *p_stk_limit, + CPU_STK_SIZE stk_size, + OS_OPT opt ) +{ + CPU_INT32U *frame_pointer; + CPU_INT32U *stk; + +#if (OS_THREAD_SAFE_NEWLIB > 0u) + struct _reent* local_impure_ptr; + + /* + * create and initialise the impure pointer used for Newlib thread local storage. + * This is only done if the C library is being used in a thread safe mode. Otherwise + * a single reent structure is used for all threads, which saves memory. + */ + + local_impure_ptr = (struct _reent*)((((CPU_INT32U)(p_stk_base + stk_size)) & ~0x3) - sizeof(struct _reent)); + + _REENT_INIT_PTR (local_impure_ptr); + + /* + * create a stack frame at the top of the stack (leaving space for the + * reentrant data structure). + */ + + frame_pointer = (CPU_INT32U*) local_impure_ptr; +#else + frame_pointer = (CPU_INT32U*) (((CPU_INT32U)(p_stk_base + stk_size)) & ~0x3); +#endif /* OS_THREAD_SAFE_NEWLIB */ + stk = frame_pointer - 13; + + /* Now fill the stack frame. */ + + stk[12] = (CPU_INT32U)p_task; /* task address (ra) */ + stk[11] = (CPU_INT32U)p_arg; /* first register argument (r4) */ + +#if (OS_THREAD_SAFE_NEWLIB > 0u) + stk[10] = (CPU_INT32U) local_impure_ptr; /* value of _impure_ptr for this thread */ +#endif /* OS_THREAD_SAFE_NEWLIB */ + stk[0] = ((CPU_INT32U)&OSStartTsk) + 4;/* exception return address (ea) */ + + /* The next three lines don't generate any code, they just put symbols into + * the debug information which will later be used to navigate the thread + * data structures + */ + __asm__ (".set OSTCBNext_OFFSET,%0" :: "i" (offsetof(OS_TCB, NextPtr))); + __asm__ (".set OSTCBPrio_OFFSET,%0" :: "i" (offsetof(OS_TCB, Prio))); + __asm__ (".set OSTCBStkPtr_OFFSET,%0" :: "i" (offsetof(OS_TCB, StkPtr))); + + return((CPU_STK *)stk); +} + +/* +************************************************************************************************************************ +* TASK SWITCH HOOK +* +* Description: This function is called when a task switch is performed. This allows you to perform other operations +* during a context switch. +* +* Arguments : none +* +* Note(s) : 1) Interrupts are disabled during this call. +* 2) It is assumed that the global pointer 'OSTCBHighRdyPtr' points to the TCB of the task that will be +* 'switched in' (i.e. the highest priority task) and, 'OSTCBCurPtr' points to the task being switched out +* (i.e. the preempted task). +************************************************************************************************************************ +*/ + +void OSTaskSwHook (void) +{ +#if OS_CFG_TASK_PROFILE_EN > 0u && defined(CPU_CFG_INT_DIS_MEAS_EN) + CPU_TS ts; +#endif +#ifdef CPU_CFG_INT_DIS_MEAS_EN + CPU_TS int_dis_time; +#endif +#if (OS_CFG_TASK_STK_REDZONE_EN > 0u) + CPU_BOOLEAN stk_status; +#endif + + +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) { + (*OS_AppTaskSwHookPtr)(); + } +#endif + +#if OS_CFG_TASK_PROFILE_EN > 0u && defined(CPU_CFG_INT_DIS_MEAS_EN) + ts = OS_TS_GET(); + if (OSTCBCurPtr != OSTCBHighRdyPtr) { + OSTCBCurPtr->CyclesDelta = ts - OSTCBCurPtr->CyclesStart; + OSTCBCurPtr->CyclesTotal += (OS_CYCLES)OSTCBCurPtr->CyclesDelta; + } + + OSTCBHighRdyPtr->CyclesStart = ts; +#endif + +#ifdef CPU_CFG_INT_DIS_MEAS_EN + int_dis_time = CPU_IntDisMeasMaxCurReset(); /* Keep track of per-task interrupt disable time */ + if (int_dis_time > OSTCBCurPtr->IntDisTimeMax) { + OSTCBCurPtr->IntDisTimeMax = int_dis_time; + } +#endif + +#if OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u + if (OSSchedLockTimeMaxCur > OSTCBCurPtr->SchedLockTimeMax) { /* Keep track of per-task scheduler lock time */ + OSTCBCurPtr->SchedLockTimeMax = OSSchedLockTimeMaxCur; + OSSchedLockTimeMaxCur = (CPU_TS)0; /* Reset the per-task value */ + } +#endif + +#if (OS_CFG_TASK_STK_REDZONE_EN > 0u) + /* Check if stack overflowed. */ + stk_status = OSTaskStkRedzoneChk((OS_TCB *)0u); + if (stk_status != OS_TRUE) { + OSRedzoneHitHook(OSTCBCurPtr); + } +#endif +} + +/* +************************************************************************************************************************ +* TICK HOOK +* +* Description: This function is called every tick. +* +* Arguments : none +* +* Note(s) : 1) This function is assumed to be called from the Tick ISR. +************************************************************************************************************************ +*/ + +#ifdef ALT_INICHE +extern void cticks_hook(void); +#endif + +void OSTimeTickHook (void) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + +#ifdef ALT_INICHE + /* Service the Interniche timer Don't use pointer its part of bsp */ + cticks_hook(); +#endif + + if (OS_AppTimeTickHookPtr != (OS_APP_HOOK_VOID)0) { + (*OS_AppTimeTickHookPtr)(); + } +#endif +} + + +#ifdef __cplusplus +} +#endif diff --git a/Ports/POSIX/GNU/os_cpu.h b/Ports/POSIX/GNU/os_cpu.h index 24dfb5d..de05c49 100644 --- a/Ports/POSIX/GNU/os_cpu.h +++ b/Ports/POSIX/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * POSIX GNU Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : POSIX * Toolchain : GNU diff --git a/Ports/POSIX/GNU/os_cpu_c.c b/Ports/POSIX/GNU/os_cpu_c.c index e8f825f..7358462 100644 --- a/Ports/POSIX/GNU/os_cpu_c.c +++ b/Ports/POSIX/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * POSIX GNU Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : POSIX * Toolchain : GNU diff --git a/Ports/PPC405/GNU/os_cpu.h b/Ports/PPC405/GNU/os_cpu.h index 12598ee..2395f7e 100644 --- a/Ports/PPC405/GNU/os_cpu.h +++ b/Ports/PPC405/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -88,4 +88,3 @@ void OSStartHighRdy(void); #endif #endif - diff --git a/Ports/PPC405/GNU/os_cpu_a.S b/Ports/PPC405/GNU/os_cpu_a.S index edc895e..02efcd5 100644 --- a/Ports/PPC405/GNU/os_cpu_a.S +++ b/Ports/PPC405/GNU/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu_a.S -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -963,4 +963,3 @@ OSStartHighRdy: addi 1, 1, STK_CTX_SIZE /* Adjust the stack pointer */ rfi /* Start the task */ - diff --git a/Ports/PPC405/GNU/os_cpu_c.c b/Ports/PPC405/GNU/os_cpu_c.c index f07bfd9..892e16e 100644 --- a/Ports/PPC405/GNU/os_cpu_c.c +++ b/Ports/PPC405/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu.h b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu.h index 626c30a..cb08cac 100644 --- a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu.h +++ b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU Toolchain * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.S b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.S index cf69f1b..daed6f8 100644 --- a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.S +++ b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.S @@ -2,7 +2,7 @@ # uC/OS-III # The Real-Time Kernel # -# Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +# Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com # # SPDX-License-Identifier: APACHE-2.0 # @@ -18,7 +18,7 @@ # GNU Toolchain # # File : os_cpu_a.S -# Version : V3.08.00 +# Version : V3.08.01 #******************************************************************************************************** .include "os_cpu_a.inc" diff --git a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.inc b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.inc index 9693aa7..4ded8c1 100644 --- a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.inc +++ b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.inc @@ -2,7 +2,7 @@ # uC/OS-III # The Real-Time Kernel # -# Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +# Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com # # SPDX-License-Identifier: APACHE-2.0 # @@ -20,7 +20,7 @@ # GNU Toolchain # # File : os_cpu_a.inc -# Version : V3.08.00 +# Version : V3.08.01 #******************************************************************************************************** #******************************************************************************************************** diff --git a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_c.c b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_c.c index 2d88eb2..482db30 100644 --- a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_c.c +++ b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU Toolchain * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -488,4 +488,3 @@ void OSTimeTickHook (void) #ifdef __cplusplus } #endif - diff --git a/Ports/RISC-V/RV32/GCC/os_cpu.h b/Ports/RISC-V/RV32/GCC/os_cpu.h index d345713..43bf6e8 100644 --- a/Ports/RISC-V/RV32/GCC/os_cpu.h +++ b/Ports/RISC-V/RV32/GCC/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * RISC-V PORT * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : RISC-V RV32 * Toolchain : GNU C Compiler diff --git a/Ports/RISC-V/RV32/GCC/os_cpu_a.S b/Ports/RISC-V/RV32/GCC/os_cpu_a.S index 624a3f3..ab66d9a 100644 --- a/Ports/RISC-V/RV32/GCC/os_cpu_a.S +++ b/Ports/RISC-V/RV32/GCC/os_cpu_a.S @@ -2,7 +2,7 @@ # uC/OS-III # The Real-Time Kernel # -# Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +# Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com # # SPDX-License-Identifier: APACHE-2.0 # @@ -18,7 +18,7 @@ # RISC-V PORT # # File : os_cpu_a.S -# Version : V3.08.00 +# Version : V3.08.01 #******************************************************************************************************** # For : RISC-V RV32 # Toolchain : GNU C Compiler diff --git a/Ports/RISC-V/RV32/GCC/os_cpu_c.c b/Ports/RISC-V/RV32/GCC/os_cpu_c.c index ba7ccf3..f9d83cd 100644 --- a/Ports/RISC-V/RV32/GCC/os_cpu_c.c +++ b/Ports/RISC-V/RV32/GCC/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * RISC-V PORT * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : RISC-V RV32 * Toolchain : GNU C Compiler @@ -448,7 +448,7 @@ void OSTimeTickHook (void) ********************************************************************************************************* * SYS TICK HANDLER * -* Description: Handle the system tick (SysTick) interrupt, which is used to generate the uC/OS-II tick +* Description: Handle the system tick (SysTick) interrupt, which is used to generate the uC/OS-III tick * interrupt. * * Arguments : None. @@ -464,12 +464,12 @@ void SysTick_Handler (void) CPU_CRITICAL_ENTER(); - OSIntEnter(); /* Tell uC/OS-II that we are starting an ISR */ + OSIntEnter(); /* Tell uC/OS-III that we are starting an ISR */ CPU_CRITICAL_EXIT(); - OSTimeTick(); /* Call uC/OS-II's OSTimeTick() */ + OSTimeTick(); /* Call uC/OS-III's OSTimeTick() */ - OSIntExit(); /* Tell uC/OS-II that we are leaving the ISR */ + OSIntExit(); /* Tell uC/OS-III that we are leaving the ISR */ } diff --git a/Ports/Renesas/78K0R/IAR/os_cpu.h b/Ports/Renesas/78K0R/IAR/os_cpu.h index 1de72bf..de9d1c7 100644 --- a/Ports/Renesas/78K0R/IAR/os_cpu.h +++ b/Ports/Renesas/78K0R/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * IAR C/C++ Compiler for NEC 78K0R 4.60A * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Renesas/78K0R/IAR/os_cpu_a.asm b/Ports/Renesas/78K0R/IAR/os_cpu_a.asm index aa34586..c02bfbb 100644 --- a/Ports/Renesas/78K0R/IAR/os_cpu_a.asm +++ b/Ports/Renesas/78K0R/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; IAR C/C++ Compiler for NEC 78K0R 4.60A ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ;******************************************************************************************************** @@ -192,4 +192,3 @@ OSTickISR1: RETI ; return from interrupt END - diff --git a/Ports/Renesas/78K0R/IAR/os_cpu_c.c b/Ports/Renesas/78K0R/IAR/os_cpu_c.c index 15f505b..9d0c25c 100644 --- a/Ports/Renesas/78K0R/IAR/os_cpu_c.c +++ b/Ports/Renesas/78K0R/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * IAR C/C++ Compiler for NEC 78K0R 4.60A * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Renesas/RL78/GNURL78/os_cpu.h b/Ports/Renesas/RL78/GNURL78/os_cpu.h index 2769874..6e14016 100644 --- a/Ports/Renesas/RL78/GNURL78/os_cpu.h +++ b/Ports/Renesas/RL78/GNURL78/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RL78 Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RL78 * Toolchain : E2Studios v2.x GNURL78 Compiler v1.x diff --git a/Ports/Renesas/RL78/GNURL78/os_cpu_a.asm b/Ports/Renesas/RL78/GNURL78/os_cpu_a.asm index 0047956..410cb38 100644 --- a/Ports/Renesas/RL78/GNURL78/os_cpu_a.asm +++ b/Ports/Renesas/RL78/GNURL78/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RL78 Port ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas RL78 ; Toolchain : e2studios V 1.1.1.5 for w/ KPIT GNURL78 V1.1.0.x @@ -217,4 +217,3 @@ _OSTickISR: .END - diff --git a/Ports/Renesas/RL78/GNURL78/os_cpu_a.inc b/Ports/Renesas/RL78/GNURL78/os_cpu_a.inc index fc270a6..cf3ebfd 100644 --- a/Ports/Renesas/RL78/GNURL78/os_cpu_a.inc +++ b/Ports/Renesas/RL78/GNURL78/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RL78 Port ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas RL78 ; Toolchain : e2studios V 1.1.1.5 for w/ KPIT GNURL78 V1.1.0.x @@ -150,4 +150,3 @@ branch: ;******************************************************************************************************** ; ASSEMBLY LANGUAGE MACROS FILE END ;******************************************************************************************************** - diff --git a/Ports/Renesas/RL78/GNURL78/os_cpu_c.c b/Ports/Renesas/RL78/GNURL78/os_cpu_c.c index 16cdb99..630ad7f 100644 --- a/Ports/Renesas/RL78/GNURL78/os_cpu_c.c +++ b/Ports/Renesas/RL78/GNURL78/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RL78 Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RL78 * Toolchain : E2Studios v2.x GNURL78 Compiler v1.x diff --git a/Ports/Renesas/RL78/IAR/os_cpu.h b/Ports/Renesas/RL78/IAR/os_cpu.h index c492655..fd23cb9 100644 --- a/Ports/Renesas/RL78/IAR/os_cpu.h +++ b/Ports/Renesas/RL78/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RL78 Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RL78 * Toolchain : IAR EWRL78 v1.2x and up diff --git a/Ports/Renesas/RL78/IAR/os_cpu_a.asm b/Ports/Renesas/RL78/IAR/os_cpu_a.asm index 54ba973..d415aa6 100644 --- a/Ports/Renesas/RL78/IAR/os_cpu_a.asm +++ b/Ports/Renesas/RL78/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RL78 Port ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas RL78 ; Toolchain : IAR EWRL78 v1.2x and up @@ -160,4 +160,3 @@ OSTickISR: OS_ISR_EXIT END - diff --git a/Ports/Renesas/RL78/IAR/os_cpu_a.inc b/Ports/Renesas/RL78/IAR/os_cpu_a.inc index 69eb281..3eef65b 100644 --- a/Ports/Renesas/RL78/IAR/os_cpu_a.inc +++ b/Ports/Renesas/RL78/IAR/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RL78 Port ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas RL78 ; Toolchain : IAR EWRL78 v1.2x and up @@ -147,4 +147,3 @@ OS_ISR_EXIT MACRO ;******************************************************************************************************** ; ASSEMBLY LANGUAGE MACROS FILE END ;******************************************************************************************************** - diff --git a/Ports/Renesas/RL78/IAR/os_cpu_c.c b/Ports/Renesas/RL78/IAR/os_cpu_c.c index 8743a0a..48d258d 100644 --- a/Ports/Renesas/RL78/IAR/os_cpu_c.c +++ b/Ports/Renesas/RL78/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RL78 Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RL78 * Toolchain : IAR RL78 v1.2x and up diff --git a/Ports/Renesas/RX/GNURX/os_cpu.h b/Ports/Renesas/RX/GNURX/os_cpu.h index 5c9ced2..b8a73cf 100644 --- a/Ports/Renesas/RX/GNURX/os_cpu.h +++ b/Ports/Renesas/RX/GNURX/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RX * Toolchain : HEW with GNURX compiler diff --git a/Ports/Renesas/RX/GNURX/os_cpu_a.S b/Ports/Renesas/RX/GNURX/os_cpu_a.S index f103f1f..0295a80 100644 --- a/Ports/Renesas/RX/GNURX/os_cpu_a.S +++ b/Ports/Renesas/RX/GNURX/os_cpu_a.S @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RX Specific Code ; ; File : os_cpu_a.S -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas RX ; Toolchain : HEW with GNURX compiler diff --git a/Ports/Renesas/RX/GNURX/os_cpu_c.c b/Ports/Renesas/RX/GNURX/os_cpu_c.c index b2638a5..f175071 100644 --- a/Ports/Renesas/RX/GNURX/os_cpu_c.c +++ b/Ports/Renesas/RX/GNURX/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RX * Toolchain : HEW with GNURX compiler diff --git a/Ports/Renesas/RX/IAR/os_cpu.h b/Ports/Renesas/RX/IAR/os_cpu.h index 1071174..25cdc26 100644 --- a/Ports/Renesas/RX/IAR/os_cpu.h +++ b/Ports/Renesas/RX/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RX * Toolchain : IAR Embedded Workbench for Renesas RX diff --git a/Ports/Renesas/RX/IAR/os_cpu_a.s b/Ports/Renesas/RX/IAR/os_cpu_a.s index 92ab444..cb2ad45 100644 --- a/Ports/Renesas/RX/IAR/os_cpu_a.s +++ b/Ports/Renesas/RX/IAR/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RX Specific Code ; ; File : os_cpu_a.s -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas RX ; Toolchain : IAR Embedded Workbench for Renesas RX diff --git a/Ports/Renesas/RX/IAR/os_cpu_c.c b/Ports/Renesas/RX/IAR/os_cpu_c.c index ebf38f7..1872a50 100644 --- a/Ports/Renesas/RX/IAR/os_cpu_c.c +++ b/Ports/Renesas/RX/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RX * Toolchain : IAR Embedded Workbench for Renesas RX diff --git a/Ports/Renesas/RX/RXC/os_cpu.h b/Ports/Renesas/RX/RXC/os_cpu.h index 5d9d64c..c1e6074 100644 --- a/Ports/Renesas/RX/RXC/os_cpu.h +++ b/Ports/Renesas/RX/RXC/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RX * Toolchain : HEW with RXC diff --git a/Ports/Renesas/RX/RXC/os_cpu_a.src b/Ports/Renesas/RX/RXC/os_cpu_a.src index cd804cd..b9ded97 100644 --- a/Ports/Renesas/RX/RXC/os_cpu_a.src +++ b/Ports/Renesas/RX/RXC/os_cpu_a.src @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RX Specific Code ; ; File : os_cpu_a.src -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas RXC compiler ; Toolchain : HEW with RXC diff --git a/Ports/Renesas/RX/RXC/os_cpu_c.c b/Ports/Renesas/RX/RXC/os_cpu_c.c index 6e64445..b3d3df8 100644 --- a/Ports/Renesas/RX/RXC/os_cpu_c.c +++ b/Ports/Renesas/RX/RXC/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas RX * Toolchain : HEW with RXC diff --git a/Ports/Renesas/SH2A-Banked/HEW/os_cpu.h b/Ports/Renesas/SH2A-Banked/HEW/os_cpu.h index 2200f9a..1428ab6 100644 --- a/Ports/Renesas/SH2A-Banked/HEW/os_cpu.h +++ b/Ports/Renesas/SH2A-Banked/HEW/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.inc b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.inc index 5e4e5ae..76787c6 100644 --- a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.inc +++ b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** @@ -96,4 +96,3 @@ LDC R0, TBR MOV.L @R15+, R0 .ENDM - diff --git a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.src b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.src index df9a067..a5d56d9 100644 --- a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.src +++ b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.src @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.src -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** .INCLUDE "os_cpu_a.inc" ; Include macros @@ -199,4 +199,3 @@ _OSTickISR: NOP .END - diff --git a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_c.c b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_c.c index ca474b9..4a5bc71 100644 --- a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_c.c +++ b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu.h b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu.h index 9635547..7c409a8 100644 --- a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu.h +++ b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.inc b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.inc index b431f75..91ea3de 100644 --- a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.inc +++ b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** @@ -185,4 +185,3 @@ FMOV.S @R15+, FR13 FMOV.S @R15+, FR12 .ENDM - diff --git a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.src b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.src index 4603b0c..381c772 100644 --- a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.src +++ b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.src @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.src -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** .INCLUDE "os_cpu_a.inc" ; Include OS_CTX_SAVE and OS_CTX_RESTORE macros @@ -197,4 +197,3 @@ _OSTickISR: NOP .END - diff --git a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_c.c b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_c.c index 7c836b0..39dc4cc 100644 --- a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_c.c +++ b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-FPU/HEW/os_cpu.h b/Ports/Renesas/SH2A-FPU/HEW/os_cpu.h index 17f0c57..edf64ae 100644 --- a/Ports/Renesas/SH2A-FPU/HEW/os_cpu.h +++ b/Ports/Renesas/SH2A-FPU/HEW/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.inc b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.inc index 9a8b237..647501c 100644 --- a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.inc +++ b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** .IMPORT _OSIntNestingCtr diff --git a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.src b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.src index 8d3720b..41ab7f8 100644 --- a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.src +++ b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.src @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.src -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** .INCLUDE "os_cpu_a.inc" ; Include OS_CTX_SAVE and OS_CTX_RESTORE macros @@ -129,4 +129,3 @@ _OSIntCtxSw: .END - diff --git a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_c.c b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_c.c index 65a517d..1c06075 100644 --- a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_c.c +++ b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu.h b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu.h index bfab7af..4b296c0 100644 --- a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu.h +++ b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas V850E2M * Toolchain : CubeSuite+ V1.00.01 diff --git a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.asm b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.asm index aa1e722..c2c5466 100644 --- a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.asm +++ b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.asm -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : CubeSuite+ V1.00.01 @@ -198,4 +198,3 @@ _OS_CPU_TickHandler: ;******************************************************************************************************** ; ASSEMBLY LANGUAGE PORT FILE END ;******************************************************************************************************** - diff --git a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.inc b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.inc index 31392d2..d859354 100644 --- a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.inc +++ b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : CubeSuite+ V1.00.01 @@ -276,4 +276,3 @@ OS_ISR_EXIT .macro ;******************************************************************************************************** ; ASSEMBLY LANGUAGE MACROS FILE END ;******************************************************************************************************** - diff --git a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_c.c b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_c.c index 01e9b5e..f5432e6 100644 --- a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_c.c +++ b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2M Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas V850E2M * Toolchain : CubeSuite+ V1.00.01 diff --git a/Ports/Renesas/V850E2M/IAR/os_cpu.h b/Ports/Renesas/V850E2M/IAR/os_cpu.h index 05c3af7..8e11fa0 100644 --- a/Ports/Renesas/V850E2M/IAR/os_cpu.h +++ b/Ports/Renesas/V850E2M/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2M Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas V850E2M * Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2M/IAR/os_cpu_a.inc b/Ports/Renesas/V850E2M/IAR/os_cpu_a.inc index 7d42686..faaf498 100644 --- a/Ports/Renesas/V850E2M/IAR/os_cpu_a.inc +++ b/Ports/Renesas/V850E2M/IAR/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : IAR EWV850 v3.7x and 3.8x @@ -235,4 +235,3 @@ OS_ISR_EXIT MACRO ;******************************************************************************************************** ; ASSEMBLY LANGUAGE MACROS FILE END ;******************************************************************************************************** - diff --git a/Ports/Renesas/V850E2M/IAR/os_cpu_a.s85 b/Ports/Renesas/V850E2M/IAR/os_cpu_a.s85 index 1b67e81..4290ea2 100644 --- a/Ports/Renesas/V850E2M/IAR/os_cpu_a.s85 +++ b/Ports/Renesas/V850E2M/IAR/os_cpu_a.s85 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.s85 -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2M/IAR/os_cpu_c.c b/Ports/Renesas/V850E2M/IAR/os_cpu_c.c index d4236e0..46fecd9 100644 --- a/Ports/Renesas/V850E2M/IAR/os_cpu_c.c +++ b/Ports/Renesas/V850E2M/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2M Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas V850E2M * Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2S/IAR/os_cpu.h b/Ports/Renesas/V850E2S/IAR/os_cpu.h index f455b63..11b2fa5 100644 --- a/Ports/Renesas/V850E2S/IAR/os_cpu.h +++ b/Ports/Renesas/V850E2S/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2S Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas V850E2S * Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2S/IAR/os_cpu_a.inc b/Ports/Renesas/V850E2S/IAR/os_cpu_a.inc index 6f903fe..15b6eb1 100644 --- a/Ports/Renesas/V850E2S/IAR/os_cpu_a.inc +++ b/Ports/Renesas/V850E2S/IAR/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -19,7 +19,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : IAR EWV850 v3.7x and 3.8x @@ -236,4 +236,3 @@ OS_ISR_EXIT MACRO ;******************************************************************************************************** ; ASSEMBLY LANGUAGE MACROS FILE END ;******************************************************************************************************** - diff --git a/Ports/Renesas/V850E2S/IAR/os_cpu_a.s85 b/Ports/Renesas/V850E2S/IAR/os_cpu_a.s85 index 5cb8a57..883bc66 100644 --- a/Ports/Renesas/V850E2S/IAR/os_cpu_a.s85 +++ b/Ports/Renesas/V850E2S/IAR/os_cpu_a.s85 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -19,7 +19,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.s85 -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2S/IAR/os_cpu_c.c b/Ports/Renesas/V850E2S/IAR/os_cpu_c.c index 95c8072..5e3cb09 100644 --- a/Ports/Renesas/V850E2S/IAR/os_cpu_c.c +++ b/Ports/Renesas/V850E2S/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2S Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas V850E2S * Toolchain : IAR EWV850 v3.7x and 3.8x @@ -342,4 +342,3 @@ void OSTimeTickHook (void) #ifdef __cplusplus } #endif - diff --git a/Ports/Renesas/V850ES/IAR/os_cpu.h b/Ports/Renesas/V850ES/IAR/os_cpu.h index e8ef16e..fdd7029 100644 --- a/Ports/Renesas/V850ES/IAR/os_cpu.h +++ b/Ports/Renesas/V850ES/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850ES Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas V850ES * Toolchain : IAR EWV850 v3.7x and up diff --git a/Ports/Renesas/V850ES/IAR/os_cpu_a.inc b/Ports/Renesas/V850ES/IAR/os_cpu_a.inc index 9e4d34e..06b320d 100644 --- a/Ports/Renesas/V850ES/IAR/os_cpu_a.inc +++ b/Ports/Renesas/V850ES/IAR/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas V850ES Port ; ; File : os_cpu_a.inc -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas V850ES ; Toolchain : IAR EWV850 v3.7x and 3.8x @@ -247,4 +247,3 @@ OS_ISR_EXIT MACRO ;******************************************************************************************************** ; ASSEMBLY LANGUAGE MACROS FILE END ;******************************************************************************************************** - diff --git a/Ports/Renesas/V850ES/IAR/os_cpu_a.s85 b/Ports/Renesas/V850ES/IAR/os_cpu_a.s85 index b258bf2..23db64e 100644 --- a/Ports/Renesas/V850ES/IAR/os_cpu_a.s85 +++ b/Ports/Renesas/V850ES/IAR/os_cpu_a.s85 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas V850ES Port ; ; File : os_cpu_a.s85 -; Version : V3.08.00 +; Version : V3.08.01 ;******************************************************************************************************** ; For : Renesas V850ES ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850ES/IAR/os_cpu_c.c b/Ports/Renesas/V850ES/IAR/os_cpu_c.c index 1b3f395..d6994d1 100644 --- a/Ports/Renesas/V850ES/IAR/os_cpu_c.c +++ b/Ports/Renesas/V850ES/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific code * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Renesas V850ES * Toolchain : IAR EWV850 v3.7x and up diff --git a/Ports/Template/os_cpu.h b/Ports/Template/os_cpu.h index 678335e..24d863e 100644 --- a/Ports/Template/os_cpu.h +++ b/Ports/Template/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * $$$$ Insert Compiler Name * * Filename : os_cpu.h -* Version : $$$$ V3.08.00 +* Version : $$$$ V3.08.01 ********************************************************************************************************* * Note(s) : (1) This file is used to create a uC/OS-III port. You can use this template as a * starting point instead of typing everything from scratch. diff --git a/Ports/Template/os_cpu_a.asm b/Ports/Template/os_cpu_a.asm index 2a30923..d6717af 100644 --- a/Ports/Template/os_cpu_a.asm +++ b/Ports/Template/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -20,7 +20,7 @@ ; $$$$ Compiler/Assembler Name ; ; Filename : os_cpu_a.asm -; Version : $$$$ V3.08.00 +; Version : $$$$ V3.08.01 ;******************************************************************************************************** ; Include macros from 'os_cpu_a.inc' diff --git a/Ports/Template/os_cpu_a.inc b/Ports/Template/os_cpu_a.inc index 66447db..c876a0e 100644 --- a/Ports/Template/os_cpu_a.inc +++ b/Ports/Template/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -20,7 +20,7 @@ ; $$$$ Compiler/Assembler Name ; ; Filename : os_cpu_a.inc -; Version : $$$$ V3.08.00 +; Version : $$$$ V3.08.01 ;******************************************************************************************************** ;******************************************************************************************************** @@ -105,4 +105,4 @@ OS_ISR_EXIT MACRO OS_CTX_RESTORE ; Restore processor registers from stack ;$$$$ ; CPU instruction to return from Interrupt/exception - ENDM \ No newline at end of file + ENDM diff --git a/Ports/Template/os_cpu_c.c b/Ports/Template/os_cpu_c.c index 857fcc2..b7479eb 100644 --- a/Ports/Template/os_cpu_c.c +++ b/Ports/Template/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * $$$$ Insert Compiler Name * * Filename : os_cpu_c.c -* Version : $$$$ V3.08.00 +* Version : $$$$ V3.08.01 ********************************************************************************************************* * Note(s) : (1) This file is used to create a uC/OS-III port. You can use this template as a * starting point instead of typing everything from scratch. @@ -362,4 +362,3 @@ void OSTimeTickHook (void) #ifdef __cplusplus } #endif - diff --git a/Ports/Win32/Visual_Studio/os_cpu.h b/Ports/Win32/Visual_Studio/os_cpu.h index 7ffd761..79f4a7f 100644 --- a/Ports/Win32/Visual_Studio/os_cpu.h +++ b/Ports/Win32/Visual_Studio/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Microsoft Win32 Port * * File : os_cpu.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Win32 * Toolchain : Visual Studio diff --git a/Ports/Win32/Visual_Studio/os_cpu_c.c b/Ports/Win32/Visual_Studio/os_cpu_c.c index f3f576e..2d380ab 100644 --- a/Ports/Win32/Visual_Studio/os_cpu_c.c +++ b/Ports/Win32/Visual_Studio/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Microsoft Win32 Port * * File : os_cpu_c.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * For : Win32 * Toolchain : Visual Studio diff --git a/README.rst b/README.rst new file mode 100644 index 0000000..99d7413 --- /dev/null +++ b/README.rst @@ -0,0 +1,56 @@ +.. raw:: html + + +

+ +

+ + +µC/OS is a full-featured embedded operating system originally developed by Micriµm. +It features support for TCP/IP, USB, CAN bus, and Modbus, as well as a robust file system. + +---------- + +.. raw:: HTML + + +

+ +

+ + +Founded by a team of former Micrium employees, Weston Embedded Solutions is the official custodian for the µC/™ RTOS software repository to ensure it remains the trusted choice for embedded engineers around the world. + +---------- + +.. raw:: html + + +

+ +

+ + +Since its founding in 1999 as a private company, Micriµm™ and its team of engineers have offered world-class embedded software components for the most critical and demanding real-time applications. Recognized as having some of the cleanest code in the industry, with easy-to-understand documentation, the Micrium real-time kernels, and software components have successfully been deployed in thousands of products worldwide across a broad range of industries. Micrium’s µC/OS™ kernel has been certified for use in safety-critical applications and remains a respected favorite in the medical, aerospace, and industrial markets. It continues to be the RTOS of choice for engineers requiring the most reliable and trusted solution for their mission-critical applications. + +---------- + +Product Documentation +*************** +https://micrium.atlassian.net/ + +Technical Support +***************** +https://weston-embedded.com/micrium-support + +Example Projects +********* +https://weston-embedded.com/micrium-examples + +Commercial Licensing Option +********* +https://weston-embedded.com/products/cesium + +Who to Contact +********* +https://weston-embedded.com/company/contact diff --git a/Source/__dbg_uCOS-III.c b/Source/__dbg_uCOS-III.c index facf23d..71d639a 100644 --- a/Source/__dbg_uCOS-III.c +++ b/Source/__dbg_uCOS-III.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * VARIABLES * * File : __dbg_uCOS-III.C -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Source/os.h b/Source/os.h index 10a387d..a9ffb3b 100644 --- a/Source/os.h +++ b/Source/os.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -17,7 +17,7 @@ /* ********************************************************************************************************* * File : os.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Note(s) : (1) Assumes the following versions (or more recent) of software modules are included * in the project build: @@ -2144,6 +2144,15 @@ OS_TICK OS_DynTickSet (OS_TICK ticks); #endif +#ifndef OS_CFG_OBJ_CREATED_CHK_EN +#error "OS_CFG.H, Missing OS_CFG_OBJ_CREATED_CHK_EN: Allows you to include object created checks or not" +#else + #if (OS_CFG_OBJ_CREATED_CHK_EN > 0u) && (OS_OBJ_TYPE_REQ == 0u) + #error "OS_CFG.H, OS_CFG_DBG_EN or OS_CFG_OBJ_TYPE_CHK_EN must be Enabled (1) to use object created checks." + #endif +#endif + + #if OS_CFG_PRIO_MAX < 8u #error "OS_CFG.H, OS_CFG_PRIO_MAX must be >= 8" #endif diff --git a/Source/os_cfg_app.c b/Source/os_cfg_app.c index 0a66847..0ff121f 100644 --- a/Source/os_cfg_app.c +++ b/Source/os_cfg_app.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * OS CONFIGURATION (APPLICATION SPECIFICS) * * File : os_cfg_app.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Note(s) : DO NOT CHANGE THIS FILE! ********************************************************************************************************* diff --git a/Source/os_core.c b/Source/os_core.c index 50a8a4f..737e72d 100644 --- a/Source/os_core.c +++ b/Source/os_core.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * CORE FUNCTIONS * * File : os_core.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Source/os_dbg.c b/Source/os_dbg.c index fc6ec99..0e48937 100644 --- a/Source/os_dbg.c +++ b/Source/os_dbg.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * DEBUGGER CONSTANTS * * File : os_dbg.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -106,6 +106,7 @@ CPU_INT16U const OSDbg_MutexSize = 0u; #endif CPU_INT08U const OSDbg_ObjTypeChkEn = OS_CFG_OBJ_TYPE_CHK_EN; +CPU_INT08U const OSDbg_ObjCreatedChkEn = OS_CFG_OBJ_CREATED_CHK_EN; CPU_INT16U const OSDbg_PendListSize = sizeof(OS_PEND_LIST); @@ -449,6 +450,7 @@ void OS_Dbg_Init (void) #endif p_temp08 = (CPU_INT08U const *)&OSDbg_ObjTypeChkEn; + p_temp08 = (CPU_INT08U const *)&OSDbg_ObjCreatedChkEn; p_temp16 = (CPU_INT16U const *)&OSDbg_PendListSize; p_temp16 = (CPU_INT16U const *)&OSDbg_PendObjSize; diff --git a/Source/os_flag.c b/Source/os_flag.c index 6d643cf..5772c7b 100644 --- a/Source/os_flag.c +++ b/Source/os_flag.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * EVENT FLAG MANAGEMENT * * File : os_flag.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -96,11 +96,13 @@ void OSFlagCreate (OS_FLAG_GRP *p_grp, CPU_CRITICAL_ENTER(); #if (OS_OBJ_TYPE_REQ > 0u) +#if (OS_CFG_OBJ_CREATED_CHK_EN > 0u) if (p_grp->Type == OS_OBJ_TYPE_FLAG) { CPU_CRITICAL_EXIT(); *p_err = OS_ERR_OBJ_CREATED; return; } +#endif p_grp->Type = OS_OBJ_TYPE_FLAG; /* Set to event flag group type */ #endif #if (OS_CFG_DBG_EN > 0u) diff --git a/Source/os_mem.c b/Source/os_mem.c index 38a0252..981e806 100644 --- a/Source/os_mem.c +++ b/Source/os_mem.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * MEMORY PARTITION MANAGEMENT * * File : os_mem.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -146,11 +146,13 @@ void OSMemCreate (OS_MEM *p_mem, CPU_CRITICAL_ENTER(); #if (OS_OBJ_TYPE_REQ > 0u) +#if (OS_CFG_OBJ_CREATED_CHK_EN > 0u) if (p_mem->Type == OS_OBJ_TYPE_MEM) { CPU_CRITICAL_EXIT(); *p_err = OS_ERR_OBJ_CREATED; return; } +#endif p_mem->Type = OS_OBJ_TYPE_MEM; /* Set the type of object */ #endif #if (OS_CFG_DBG_EN > 0u) diff --git a/Source/os_msg.c b/Source/os_msg.c index e4d78f2..cd4836e 100644 --- a/Source/os_msg.c +++ b/Source/os_msg.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * MESSAGE HANDLING SERVICES * * File : os_msg.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Source/os_mutex.c b/Source/os_mutex.c index 1cd40c2..18113e5 100644 --- a/Source/os_mutex.c +++ b/Source/os_mutex.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * MUTEX MANAGEMENT * * File : os_mutex.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -95,11 +95,13 @@ void OSMutexCreate (OS_MUTEX *p_mutex, CPU_CRITICAL_ENTER(); #if (OS_OBJ_TYPE_REQ > 0u) +#if (OS_CFG_OBJ_CREATED_CHK_EN > 0u) if (p_mutex->Type == OS_OBJ_TYPE_MUTEX) { CPU_CRITICAL_EXIT(); *p_err = OS_ERR_OBJ_CREATED; return; } +#endif p_mutex->Type = OS_OBJ_TYPE_MUTEX; /* Mark the data structure as a mutex */ #endif #if (OS_CFG_DBG_EN > 0u) diff --git a/Source/os_prio.c b/Source/os_prio.c index 2a637c7..3fad964 100644 --- a/Source/os_prio.c +++ b/Source/os_prio.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * PRIORITY MANAGEMENT * * File : os_prio.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Source/os_q.c b/Source/os_q.c index 0dab280..6b76f21 100644 --- a/Source/os_q.c +++ b/Source/os_q.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * MESSAGE QUEUE MANAGEMENT * * File : os_q.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -105,11 +105,13 @@ void OSQCreate (OS_Q *p_q, CPU_CRITICAL_ENTER(); #if (OS_OBJ_TYPE_REQ > 0u) +#if (OS_CFG_OBJ_CREATED_CHK_EN > 0u) if (p_q->Type == OS_OBJ_TYPE_Q) { CPU_CRITICAL_EXIT(); *p_err = OS_ERR_OBJ_CREATED; return; } +#endif p_q->Type = OS_OBJ_TYPE_Q; /* Mark the data structure as a message queue */ #endif #if (OS_CFG_DBG_EN > 0u) diff --git a/Source/os_sem.c b/Source/os_sem.c index deec2bf..02c4a69 100644 --- a/Source/os_sem.c +++ b/Source/os_sem.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * SEMAPHORE MANAGEMENT * * File : os_sem.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -100,11 +100,13 @@ void OSSemCreate (OS_SEM *p_sem, CPU_CRITICAL_ENTER(); #if (OS_OBJ_TYPE_REQ > 0u) +#if (OS_CFG_OBJ_CREATED_CHK_EN > 0u) if (p_sem->Type == OS_OBJ_TYPE_SEM) { CPU_CRITICAL_EXIT(); *p_err = OS_ERR_OBJ_CREATED; return; } +#endif p_sem->Type = OS_OBJ_TYPE_SEM; /* Mark the data structure as a semaphore */ #endif p_sem->Ctr = cnt; /* Set semaphore value */ diff --git a/Source/os_stat.c b/Source/os_stat.c index b1362fd..29b0bee 100644 --- a/Source/os_stat.c +++ b/Source/os_stat.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * STATISTICS MODULE * * File : os_stat.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Source/os_task.c b/Source/os_task.c index 8faeebd..cf85f83 100644 --- a/Source/os_task.c +++ b/Source/os_task.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * TASK MANAGEMENT * * File : os_task.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Source/os_tick.c b/Source/os_tick.c index c4a63ae..d631b17 100644 --- a/Source/os_tick.c +++ b/Source/os_tick.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * TICK MANAGEMENT * * File : os_tick.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -574,4 +574,3 @@ static void OS_TickListUpdate (OS_TICK ticks) } #endif /* #if OS_CFG_TICK_EN */ - diff --git a/Source/os_time.c b/Source/os_time.c index 8ade421..832be4f 100644 --- a/Source/os_time.c +++ b/Source/os_time.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * TIME MANAGEMENT * * File : os_time.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Source/os_tmr.c b/Source/os_tmr.c index b8b755a..5c6d640 100644 --- a/Source/os_tmr.c +++ b/Source/os_tmr.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * TIMER MANAGEMENT * * File : os_tmr.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -164,8 +164,8 @@ void OSTmrCreate (OS_TMR *p_tmr, OS_TmrLock(); } - p_tmr->State = OS_TMR_STATE_STOPPED; /* Initialize the timer fields */ #if (OS_OBJ_TYPE_REQ > 0u) +#if (OS_CFG_OBJ_CREATED_CHK_EN > 0u) if (p_tmr->Type == OS_OBJ_TYPE_TMR) { if (OSRunning == OS_STATE_OS_RUNNING) { OS_TmrUnlock(); @@ -173,8 +173,11 @@ void OSTmrCreate (OS_TMR *p_tmr, *p_err = OS_ERR_OBJ_CREATED; return; } +#endif p_tmr->Type = OS_OBJ_TYPE_TMR; #endif + + p_tmr->State = OS_TMR_STATE_STOPPED; /* Initialize the timer fields */ #if (OS_CFG_DBG_EN > 0u) p_tmr->NamePtr = p_name; #else diff --git a/Source/os_trace.h b/Source/os_trace.h index 6def1d6..d2d107c 100644 --- a/Source/os_trace.h +++ b/Source/os_trace.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -17,7 +17,7 @@ /* ********************************************************************************************************* * File : os_trace.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* * Note(s) : (1) The header file os_trace_events.h is the interface between uC/OS-III and your * trace recorder of choice. To support trace recording, include one of the sub-folders diff --git a/Source/os_type.h b/Source/os_type.h index d33a90a..14092ca 100644 --- a/Source/os_type.h +++ b/Source/os_type.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -17,7 +17,7 @@ /* ********************************************************************************************************* * File : os_type.h -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Source/os_var.c b/Source/os_var.c index 15d6f88..5093cf0 100644 --- a/Source/os_var.c +++ b/Source/os_var.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * VARIABLES * * File : os_var.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/TLS/CCES/os_tls.c b/TLS/CCES/os_tls.c index ee61f01..319b5f0 100644 --- a/TLS/CCES/os_tls.c +++ b/TLS/CCES/os_tls.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Cross Core Embedded Studio (CCES) IMPLEMENTATION * * File : os_tls.c -* Version : V3.08.00 +* Version : V3.08.01 ************************************************************************************************************************ */ diff --git a/TLS/IAR/os_tls.c b/TLS/IAR/os_tls.c index c7c0be1..3246d82 100644 --- a/TLS/IAR/os_tls.c +++ b/TLS/IAR/os_tls.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * IAR IMPLEMENTATION * * File : os_tls.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ @@ -43,7 +43,7 @@ const CPU_CHAR *os_tls__c = "$Id: $"; #if (_DLIB_FILE_DESCRIPTOR > 0) && (_FILE_OP_LOCKS > 0) -#define OS_TLS_LOCK_MAX ((_MAX_LOCK) + (FOPEN_MAX)) /* _MAX_LOCK and _FOPEN_MAX defined by IAR */ +#define OS_TLS_LOCK_MAX ((_MAX_LOCK) + (FOPEN_MAX)) /* _MAX_LOCK and _FOPEN_MAX defined by IAR */ #else #define OS_TLS_LOCK_MAX (_MAX_LOCK) #endif @@ -124,8 +124,8 @@ OS_TLS_ID OS_TLS_GetID (OS_ERR *p_err) return ((OS_TLS_ID)OS_CFG_TLS_TBL_SIZE); } - id = OS_TLS_NextAvailID; /* Assign the next available ID */ - OS_TLS_NextAvailID++; /* Increment available ID for next request */ + id = OS_TLS_NextAvailID; /* Assign the next available ID */ + OS_TLS_NextAvailID++; /* Increment available ID for next request */ CPU_CRITICAL_EXIT(); *p_err = OS_ERR_NONE; return (id); @@ -400,7 +400,7 @@ void OS_TLS_TaskCreate (OS_TCB *p_tcb) if ((p_tcb->Opt & OS_OPT_TASK_NO_TLS) == OS_OPT_NONE) { /* See if TLS is available for this task */ - /* Get TLS segment from the HEAP. */ + /* Get TLS segment from the HEAP. */ p_tls = (OS_TLS)__iar_dlib_perthread_allocate(); __iar_dlib_perthread_initialize(p_tls); /* Initialize the TLS segment. */ p_tcb->TLS_Tbl[OS_TLS_LibID] = p_tls; /* Set the TLS segment pointer in the task. */ @@ -493,26 +493,32 @@ static void OS_TLS_LockCreate (void **p_lock) return; } + CPU_CRITICAL_ENTER(); if (OS_TLS_LockPoolListPtr == (OS_TLS_LOCK *)0) { /* If 'OS_TLS_LOCK' object pool is empty? */ + CPU_CRITICAL_EXIT(); *p_lock = (void *)0; /* return a 'NULL' pointer. */ return; } - p_tls_lock = OS_TLS_LockPoolListPtr; /* Get the first object in the list. */ + p_tls_lock = OS_TLS_LockPoolListPtr; /* Get the first object in the list. */ + OS_TLS_LockPoolListPtr = p_tls_lock->NextPtr; /* Move HEAD pointer to the next object in the list.*/ + CPU_CRITICAL_EXIT(); OSMutexCreate((OS_MUTEX *)&p_tls_lock->Mutex, /* Create the mutex in the kernel. */ (CPU_CHAR *) 0, (OS_ERR *)&err); if (err != OS_ERR_NONE) { /* If the mutex create funtion fail? */ + CPU_CRITICAL_ENTER(); + /* Return the OS_TLS_LOCK in front of the list */ + p_tls_lock->NextPtr = OS_TLS_LockPoolListPtr; + OS_TLS_LockPoolListPtr = p_tls_lock; + CPU_CRITICAL_EXIT(); + *p_lock = (void *)0; /* ... return a 'NULL' pointer. */ return; } - CPU_CRITICAL_ENTER(); - OS_TLS_LockPoolListPtr = p_tls_lock->NextPtr; /* Move HEAD pointer to the next object in the list.*/ - CPU_CRITICAL_EXIT(); - *p_lock = (void *)p_tls_lock; /* Return the new 'OS_TLS_LOCK' object pointer. */ } @@ -551,11 +557,7 @@ static void OS_TLS_LockDel (void *p_lock) CPU_CRITICAL_ENTER(); /* Return the OS_TLS_LOCK in front of the list */ - if (OS_TLS_LockPoolListPtr == (OS_TLS_LOCK *)0) { - p_tls_lock->NextPtr = (OS_TLS_LOCK *)0; - } else { - p_tls_lock->NextPtr = OS_TLS_LockPoolListPtr; - } + p_tls_lock->NextPtr = OS_TLS_LockPoolListPtr; OS_TLS_LockPoolListPtr = p_tls_lock; CPU_CRITICAL_EXIT(); diff --git a/TLS/NewLib/os_tls.c b/TLS/NewLib/os_tls.c index 73ebba8..7bfa578 100644 --- a/TLS/NewLib/os_tls.c +++ b/TLS/NewLib/os_tls.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * NEWLIB IMPLEMENTATION * * File : os_tls.c -* Version : V3.08.00 +* Version : V3.08.01 ********************************************************************************************************* */ diff --git a/Template/bsp_os_dt.c b/Template/bsp_os_dt.c new file mode 100644 index 0000000..f31f923 --- /dev/null +++ b/Template/bsp_os_dt.c @@ -0,0 +1,284 @@ +/* +********************************************************************************************************* +* uC/OS-III +* The Real-Time Kernel +* +* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* +* SPDX-License-Identifier: APACHE-2.0 +* +* This software is subject to an open source license and is distributed by +* Silicon Laboratories Inc. pursuant to the terms of the Apache License, +* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. +* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* uC/OS-III BOARD SUPPORT PACKAGE +* Dynamic Tick BSP +* +* Filename : bsp_os_dt.c +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +*/ + +#include +#include + + +/* +********************************************************************************************************* +* LOCAL DEFINES +********************************************************************************************************* +*/ + +#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED) +#define TIMER_COUNT_HZ ($$$$) /* Frequency of the Dynamic Tick Timer. */ +#define TIMER_TO_OSTICK(count) (((CPU_INT64U)(count) * OS_CFG_TICK_RATE_HZ) / TIMER_COUNT_HZ) +#define OSTICK_TO_TIMER(ostick) (((CPU_INT64U)(ostick) * TIMER_COUNT_HZ) / OS_CFG_TICK_RATE_HZ) + + /* The max timer count should end on a 1 tick boundary. */ +#define TIMER_COUNT_MAX (DEF_INT_32U_MAX_VAL - (DEF_INT_32U_MAX_VAL % OSTICK_TO_TIMER(1u))) +#endif + + +/* +********************************************************************************************************* +* LOCAL VARIABLES +********************************************************************************************************* +*/ + +#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED) +static OS_TICK TickDelta = 0u; /* Stored in OS Tick units. */ +#endif + + +/* +********************************************************************************************************* +* LOCAL FUNCTION PROTOTYPES +********************************************************************************************************* +*/ + +#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED) +static void BSP_DynTick_ISRHandler(void); +#endif + + +/* +********************************************************************************************************* +********************************************************************************************************* +* GLOBAL FUNCTIONS +********************************************************************************************************* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* BSP_OS_TickInit() +* +* Description : Initializes the tick interrupt for the OS. +* +* Argument(s) : none. +* +* Return(s) : none. +* +* Note(s) : (1) Must be called prior to OSStart() in main(). +* +* (2) This function ensures that the tick interrupt is disabled until BSP_OS_TickEn() is +* called in the startup task. +********************************************************************************************************* +*/ + +void BSP_OS_TickInit (void) +{ + /* $$$$ */ /* Stop the Dynamic Tick Timer if running. */ + + /* $$$$ */ /* Configure the timer. */ + /* $$$$ */ /* Frequency : TIMER_COUNT_HZ */ + /* $$$$ */ /* Counter Match Value : TIMER_COUNT_MAX */ + /* $$$$ */ /* Counter Value : 0 */ + /* $$$$ */ /* Interrupt : On counter match */ + + /* $$$$ */ /* Install BSP_DynTick_ISRHandler as the int. handler. */ + /* $$$$ */ /* Start the timer. */ +} + + +/* +********************************************************************************************************* +* BSP_OS_TickEnable() +* +* Description : Enable the OS tick interrupt. +* +* Argument(s) : none. +* +* Return(s) : none. +* +* Note(s) : none +********************************************************************************************************* +*/ + +void BSP_OS_TickEnable (void) +{ + /* $$$$ */ /* Enable Timer interrupt. */ + /* $$$$ */ /* Start the Timer count generation. */ +} + + +/* +********************************************************************************************************* +* BSP_OS_TickDisable() +* +* Description : Disable the OS tick interrupt. +* +* Argument(s) : none. +* +* Return(s) : none. +* +* Note(s) : none +********************************************************************************************************* +*/ + +void BSP_OS_TickDisable (void) +{ + /* $$$$ */ /* Stop the Timer count generation. */ + /* $$$$ */ /* Disable Timer interrupt. */ +} + + +/* +********************************************************************************************************* +********************************************************************************************************* +** uC/OS-III DYNAMIC TICK +********************************************************************************************************* +********************************************************************************************************* +*/ + +#if (OS_CFG_DYN_TICK_EN == DEF_ENABLED) +/* +********************************************************************************************************* +* OS_DynTickGet() +* +* Description : Get the number of ticks which have elapsed since the last delta was set. +* +* Argument(s) : none. +* +* Return(s) : An unsigned integer between 0 and TickDelta, inclusive. +* +* Note(s) : 1) This function is an INTERNAL uC/OS-III function & MUST NOT be called by the +* application. +* +* 2) This function is called with kernel-aware interrupts disabled. +********************************************************************************************************* +*/ + +OS_TICK OS_DynTickGet (void) +{ + CPU_INT32U tmrcnt; + + + tmrcnt = /* $$$$ */; /* Read current timer count. */ + + if (/* $$$$ */) { /* Check timer interrupt flag. */ + return (TickDelta); /* Counter Overflow has occured. */ + } + + tmrcnt = TIMER_TO_OSTICK(tmrcnt); /* Otherwise, the value we read is valid. */ + + return ((OS_TICK)tmrcnt); +} + + +/* +********************************************************************************************************* +* OS_DynTickSet() +* +* Description : Sets the number of ticks that the kernel wants to expire before the next interrupt. +* +* Argument(s) : ticks number of ticks the kernel wants to delay. +* 0 indicates an indefinite delay. +* +* Return(s) : The actual number of ticks which will elapse before the next interrupt. +* (See Note #3). +* +* Note(s) : 1) This function is an INTERNAL uC/OS-III function & MUST NOT be called by the +* application. +* +* 2) This function is called with kernel-aware interrupts disabled. +* +* 3) It is possible for the kernel to specify a delay that is too large for our +* hardware timer, or an indefinite delay. In these cases, we should program the timer +* to count the maximum number of ticks possible. The value we return should then +* be the timer maximum converted into units of OS_TICK. +********************************************************************************************************* +*/ + +OS_TICK OS_DynTickSet (OS_TICK ticks) +{ + CPU_INT32U tmrcnt; + + + tmrcnt = OSTICK_TO_TIMER(ticks); + + if ((tmrcnt >= TIMER_COUNT_MAX) || /* If the delay exceeds our timer's capacity, ... */ + (tmrcnt == 0u)) { /* ... or the kernel wants an indefinite delay. */ + tmrcnt = TIMER_COUNT_MAX; /* Count as many ticks as we are able. */ + } + + TickDelta = TIMER_TO_OSTICK(tmrcnt); /* Convert the timer count into OS_TICK units. */ + + /* $$$$ */ /* Stop the timer. */ + /* $$$$ */ /* Clear the timer interrupt. */ + /* Set new timeout. */ + /* $$$$ */ /* Counter Match Value : tmrcnt */ + /* $$$$ */ /* Counter Value : 0 */ + /* $$$$ */ /* Start the timer. */ + + return (TickDelta); /* Return the number ticks that will elapse before ... */ + /* ... the next interrupt. */ +} + + +/* +********************************************************************************************************* +* BSP_DynTick_ISRHandler() +* +* Description : Dynamic Tick ISR handler. +* +* Argument(s) : none. +* +* Return(s) : none. +* +* Note(s) : none. +********************************************************************************************************* +*/ + +static void BSP_DynTick_ISRHandler (void) +{ + CPU_SR_ALLOC(); + + + CPU_CRITICAL_ENTER(); + OSIntEnter(); + CPU_CRITICAL_EXIT(); + + OSTimeDynTick(TickDelta); /* Next delta will be set by the kernel. */ + + OSIntExit(); +} +#endif /* End of uC/OS-III Dynamic Tick module. */ + + +/* +********************************************************************************************************* +* MODULE END +********************************************************************************************************* +*/ diff --git a/Trace/readme.txt b/Trace/readme.txt index 3002237..6577dbe 100644 --- a/Trace/readme.txt +++ b/Trace/readme.txt @@ -7,8 +7,8 @@ Download the embedded target code to support Segger's SystemView for uC/OS-III from the following website https://www.segger.com/downloads/free_tools#SystemView and place the files in this folder. ##################################################################################### -Percepio TraceAlyzer for uC/OS-III +Percepio Tracealyzer for uC/OS-III -Download the embedded target code to support Percepio's TraceAlyzer for µC/OS-III (Snapshot) +Download the embedded target code to support Percepio's Tracealyzer for µC/OS-III (Snapshot) from the following website http://percepio.com/download and place the files in this folder. ##################################################################################### \ No newline at end of file diff --git a/readme.md b/readme.md deleted file mode 100644 index 5772fdd..0000000 --- a/readme.md +++ /dev/null @@ -1,7 +0,0 @@ -# uC/OS-III - -µC/OS-III is a highly portable, ROMable, scalable, preemptive, real-time, deterministic, multitasking kernel for microprocessors, microcontrollers and DSPs. - -Offering unprecedented ease-of-use, μC/OS-III is delivered with complete 100% ANSI C source code and in-depth documentation. μC/OS-III runs on the largest number of processor architectures, with ports available for download from the Micrium Web site. - -## For the complete documentation, visit https://doc.micrium.com/display/ucos/ \ No newline at end of file