Merge branch 'esp32c5/add_adc_support' into 'master'

ADC: bringup ADC oneshot and continuous mode on C5 Closes IDF-8701 and IDF-8703 See merge request espressif/esp-idf!31940
2opremio · Jul 17, 2024 · 7d3ac1a · 7d3ac1a
2 parents 2afbcd1 + 2f49a2e
commit 7d3ac1a
Show file tree

Hide file tree

Showing 29 changed files with 1,055 additions and 62 deletions.
diff --git a/components/driver/test_apps/legacy_adc_driver/README.md b/components/driver/test_apps/legacy_adc_driver/README.md
@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
diff --git a/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c b/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c
@@ -74,6 +74,13 @@
 #define ADC_TEST_HIGH_VAL        4095
 #define ADC_TEST_HIGH_THRESH     200
 
+#elif CONFIG_IDF_TARGET_ESP32C5
+#define ADC_TEST_LOW_VAL         2195
+#define ADC_TEST_LOW_THRESH      200
+
+#define ADC_TEST_HIGH_VAL        4095
+#define ADC_TEST_HIGH_THRESH     200
+
 #endif
 
 //ADC Channels

diff --git a/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py b/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py
@@ -1,6 +1,5 @@
 # SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
-
 import pytest
 from pytest_embedded import Dut
 
@@ -11,6 +10,7 @@
 @pytest.mark.esp32c3
 @pytest.mark.esp32c6
 @pytest.mark.esp32h2
+@pytest.mark.esp32c5
 @pytest.mark.adc
 @pytest.mark.parametrize(
     'config',

diff --git a/components/esp_adc/adc_oneshot.c b/components/esp_adc/adc_oneshot.c
@@ -126,7 +126,7 @@ esp_err_t adc_oneshot_new_unit(const adc_oneshot_unit_init_cfg_t *init_config, a
     if (init_config->ulp_mode == ADC_ULP_MODE_DISABLE) {
         sar_periph_ctrl_adc_oneshot_power_acquire();
     } else {
-#if !CONFIG_IDF_TARGET_ESP32P4 // # TODO: IDF-7528, IDF-7529
+#if !CONFIG_IDF_TARGET_ESP32C5// # TODO: IDF-8638, IDF-8640
         esp_sleep_enable_adc_tsens_monitor(true);
 #endif
     }
@@ -229,7 +229,7 @@ esp_err_t adc_oneshot_del_unit(adc_oneshot_unit_handle_t handle)
     if (ulp_mode == ADC_ULP_MODE_DISABLE) {
         sar_periph_ctrl_adc_oneshot_power_release();
     } else {
-#if !CONFIG_IDF_TARGET_ESP32P4 // # TODO: IDF-7528, IDF-7529
+#if !CONFIG_IDF_TARGET_ESP32C5// # TODO: IDF-8638, IDF-8640
         esp_sleep_enable_adc_tsens_monitor(false);
 #endif
     }

diff --git a/components/esp_adc/test_apps/adc/README.md b/components/esp_adc/test_apps/adc/README.md
@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
diff --git a/components/esp_adc/test_apps/adc/main/test_common_adc.h b/components/esp_adc/test_apps/adc/main/test_common_adc.h
@@ -94,6 +94,15 @@ extern "C" {
 #define ADC_TEST_HIGH_VAL        4095
 #define ADC_TEST_HIGH_VAL_DMA    4095
 #define ADC_TEST_HIGH_THRESH     200
+
+#elif CONFIG_IDF_TARGET_ESP32C5
+#define ADC_TEST_LOW_VAL         2169
+#define ADC_TEST_LOW_THRESH      200
+
+#define ADC_TEST_HIGH_VAL        4095
+#define ADC_TEST_HIGH_VAL_DMA    4095
+#define ADC_TEST_HIGH_THRESH     200
+
 #endif
 
 /*---------------------------------------------------------------

diff --git a/components/esp_adc/test_apps/adc/pytest_adc.py b/components/esp_adc/test_apps/adc/pytest_adc.py
@@ -10,6 +10,7 @@
 @pytest.mark.esp32c3
 @pytest.mark.esp32c6
 @pytest.mark.esp32h2
+@pytest.mark.esp32c5
 @pytest.mark.adc
 @pytest.mark.parametrize('config', [
     'iram_safe',
@@ -40,6 +41,7 @@ def test_adc_esp32c2_xtal_26mhz(dut: Dut) -> None:
 @pytest.mark.esp32c3
 @pytest.mark.esp32c6
 @pytest.mark.esp32h2
+@pytest.mark.esp32c5
 @pytest.mark.adc
 @pytest.mark.parametrize('config', [
     'gdma_iram_safe',

diff --git a/components/esp_hw_support/adc_share_hw_ctrl.c b/components/esp_hw_support/adc_share_hw_ctrl.c
@@ -207,6 +207,9 @@ void adc_apb_periph_claim(void)
     if (s_adc_digi_ctrlr_cnt == 1) {
         ADC_BUS_CLK_ATOMIC() {
             adc_ll_enable_bus_clock(true);
+#if SOC_RCC_IS_INDEPENDENT
+            adc_ll_enable_func_clock(true);
+#endif
             adc_ll_reset_register();
         }
     }
@@ -221,6 +224,9 @@ void adc_apb_periph_free(void)
     if (s_adc_digi_ctrlr_cnt == 0) {
         ADC_BUS_CLK_ATOMIC() {
             adc_ll_enable_bus_clock(false);
+#if SOC_RCC_IS_INDEPENDENT
+            adc_ll_enable_func_clock(false);
+#endif
         }
     } else if (s_adc_digi_ctrlr_cnt < 0) {
         portEXIT_CRITICAL(&s_spinlock);

diff --git a/components/esp_hw_support/port/esp32c5/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32c5/sar_periph_ctrl.c
@@ -24,8 +24,6 @@
 static const char *TAG = "sar_periph_ctrl";
 extern portMUX_TYPE rtc_spinlock;
 
-// TODO: [ESP32C5] IDF-8701, IDF-8703, IDF-8727
-
 void sar_periph_ctrl_init(void)
 {
     sar_ctrl_ll_force_power_ctrl_from_pwdet(true);