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Add VectorFIFOF module #35

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The VectorFIFOF module has a FIFOF interface for enqueuing and dequeuing data. It also provides a method, which returns a Vector of Maybe entries, to access all entries in the queue simultaneously.

The VectorFIFOF module has a FIFOF interface for enqueuing and dequeuing
data.  It also provides a method, which returns a Vector of Maybe entries,
to access all entries in the queue simultaneously.
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quark17 commented Jan 4, 2025

Can you add a header comment to this file (with copyright and license info), similar to what's in Semi_FIFOF.bsv, for example?

Also, the rules need to have the attribute fire_when_enabled on them, and I would also want no_implicit_conditions, to guarantee that the rules never fail to fire. This second attribute might fail for rl_enq, which can be resolved by changing the mkWire (which has a condition) to mkRWire (which doesn't).

I also think it'd be good to put a comment on the module saying what the method scheduling relationships are (or rather, what you expect them to be). I think the use of wires means that enq, deq, clear, and vector can all come in any order, so I'd like to document what you expect it to be. Personally, I think this is too free -- I'd like to see vector have to be before the others, because the vector value becomes stale after enqueuing, dequeuing, or clearing. I also think that clear should be after enq and deq. I think the one freedom that this FIFO allows is for enq and deq to be in either order (because you're not making one depend on the other, their conditions both have to be true at the start of the cycle, and so you can't enqueue into a full FIFO when also dequeuing or dequeue from an empty FIFO when also enqueuing, for example) -- that's worth calling out in a comment on the module, as it's where FIFO variants typically differ in their scheduling. If you're able to make the scheduling less free, that'd be wonderful, but I don't want to make more work for you if it's trouble, so just a comment on the state of things would be sufficient.

With those three changes, I'd be willing to merge it. However, I'd really prefer that the design not use wires, and put everything in the method actions -- both for formal cleanliness and to avoid unintentional freedoms in the method scheduling. But I don't want to make too much work for you (and this contrib repo can be a little loose), so as long as there are comments and attributes, I'm OK accepting it.

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