Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Rev D1 Faraday Hardware Design #41

Closed
wants to merge 27 commits into from
Closed

Rev D1 Faraday Hardware Design #41

wants to merge 27 commits into from

Conversation

kb1lqc
Copy link
Member

@kb1lqc kb1lqc commented Nov 21, 2016

Massive update from Rev C design in terms of optimizations. Most changes include simplification of the power supply and DNPing various parts. Another huge update was pulling back the ground pours near the RF traces and making better via fences. No Rev C boards were ever built. Instead we opted to go immediately to Rev D1.

Rev D1 is a Rev D Faraday optimized for PCB:NG manufacturing. Largely this involves PCB stack-up for 50 Ohm impedance traces. We will not be controlling impedance during manufacturing but it's best to get close! Likely good enough per our current testing.

…ors left. Still need to redo stackup impedance traces and grounding fences that were removed.
…too large of a voltage drop... woops. Also added via fences back in.
…ions were used. Also added a few notes such as LED color. Output new PDF of Schematics and updated Rev to Rev D1 for PCB:NG
…ayer copper pullback. Also updated Via Fencing. Work captured on Hardware Issue #31 on Github.
… Rev d fabrication zip file. Also combined NPTH and plated TH drill files into faraday-all.drl. Updated read.me in fab zip file to summarize the new combined drill file. Advanced Circuits freedfm seems to have passed!
…4.1 mils on this board with still some more DFM issues to work though. Moved some of the reference designtors in the process...
…ages. Definitely need to revisit board ref des placement and such again and export clean gerbers/drill files!
…ators/silkscreen text and layer by layer stackup orientation.
…new netlist and pull it into the PCB and generate new gerbers to ensure nothing was accidentally missed
…so realizes I didn't have the INSERT set for fiducials so I set that an exported XY position/rotation data for fiducials.
…d gerbers and drill files relative to aux axis for PCB:NG.
… with Brent @kb1lqd. Fixed an issue I found with the soldermask on pins 1 and 16 of the CC1190 so they used the global setting. Lastly, checked the BOM and pick and place files extensively, optimized for FaradayRF/PCB:NG use. Exported new PDF schematic.
@kb1lqc kb1lqc added this to the Rev D | Minimalist Design milestone Nov 21, 2016
@kb1lqc kb1lqc self-assigned this Nov 21, 2016
…e csv pick and place to the zip assembly file.
@kb1lqc kb1lqc closed this Nov 21, 2016
@kb1lqc
Copy link
Member Author

kb1lqc commented Nov 21, 2016

Closing since my next commit adds the CSV assembly file to the assembly zip.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging this pull request may close these issues.

1 participant