riscv-emu

riscv-emu is the RISC-V emulator that is written in Rust. This RISC-V emulator supports Linux, xv6, NuttX, FreeRTOS and Zephyr OS.

Usage

$ ../target/release/riscv_emu_desktop [options]
Options:
    -k, --kernel        Kernel image file
    -f, --filesystem    File system image file
    -d, --dtb           Device tree binary file
    -m, --machine       Target machine (SiFive_e|SiFive_u|Qemu_virt)
    -t, --testmode      Testmode is enabled
    -h, --help          Help message

Run on desktop terminal

git clone https://github.com/HidenoriMatsubayashi/riscv-emu.git
cd desktop
cargo build --release

Linux

../target/release/riscv_emu_desktop \
   -k ../artifacts/linux/fw_payload.elf \
   -m Qemu_virt \
   -d ../artifacts/linux/dtb/qemu_virtio.dtb \
   -f ../artifacts/linux/rootfs.img

NuttX

../target/release/riscv_emu_desktop -k ../artifacts/nuttx/nuttx -m SiFive_e

xv6

../target/release/riscv_emu_desktop \
   -k ../artifacts/xv6/kernel \
   -m Qemu_virt \
   -f ../artifacts/xv6/fs.img

FreeRTOS

../target/release/riscv_emu_desktop -k ../artifacts/freertos/RTOSDemo.elf -m SiFive_e

Zephyr

../target/release/riscv_emu_desktop -k ../artifacts/zephyr/zephyr.elf -m SiFive_e

User bare-metal programs

../target/release/riscv_emu_desktop -k ../tests/bin/rv32ui-p-add -t

Tests

Regression Tests (risc-tests)

cargo test

Support Status

Instructions

• RV32/64I
• RV32/64M
• RV32/64F
• RV32/64D
• RV32/64V
• RV32/64A
• RV32/64C (Almost implemented)

Virtual Memory

• SV32
• SV39
• SV48
• SV57
• SV64

SoC/Peripherals

General

• Uart (UART 16550)
• Virtio Disk

FU540-C000

• CLINT (Timer)
• PLIC (Interrupt Controller)

FE310

• UART
• PRCI
• GPIO
• SPI Flash
• DTIM (SRAM)

Support OS

• Linux
• Nuttx
• xv6-riscv
• FreeRTOS
• Zephyr

Links

• riscv/riscv-tests
• RISC-V - Getting Started Guide