x86/msr: do not warn on writes to OC_MAILBOX

Popular tools, like intel-undervolt, use MSR 0x150 to control the CPU voltage offset. In fact, evidently the intel_turbo_max_3 driver in-tree also uses this MSR. So, teach the kernel's MSR list about this, so that intel-undervolt and other such tools don't spew warnings to dmesg, while unifying the constant used throughout the kernel. Fixes: a7e1f67 ("x86/msr: Filter MSR writes") Cc: Borislav Petkov <[email protected]> Signed-off-by: Jason A. Donenfeld <[email protected]>
KenHV · Jun 26, 2022 · 1256753 · 1256753
1 parent d5b577f
commit 1256753
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
@@ -159,6 +159,8 @@
 
 #define MSR_IA32_OC_MAILBOX		0x00000150
 
+#define MSR_IA32_OC_MAILBOX		0x00000150
+
 #define MSR_IA32_SYSENTER_CS		0x00000174
 #define MSR_IA32_SYSENTER_ESP		0x00000175
 #define MSR_IA32_SYSENTER_EIP		0x00000176