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Add suport for RISCV64 #94

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Add suport for RISCV64 #94

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9 changes: 9 additions & 0 deletions deps/leveldb/leveldb-1.20/port/atomic_pointer.h
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Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,8 @@
#define ARCH_CPU_PPC_FAMILY 1
#elif defined(__mips__)
#define ARCH_CPU_MIPS_FAMILY 1
#elif defined(__riscv)
#define ARCH_CPU_RISCV64_FAMILY 1
#endif

namespace leveldb {
Expand Down Expand Up @@ -103,6 +105,13 @@ inline void MemoryBarrier() {
}
#define LEVELDB_HAVE_MEMORY_BARRIER

// RISCV64
#elif defined(ARCH_CPU_RISCV64_FAMILY)
inline void MemoryBarrier() {
asm volatile("fence iorw, iorw" : : : "memory");
}
#define LEVELDB_HAVE_MEMORY_BARRIER

// PPC
#elif defined(ARCH_CPU_PPC_FAMILY) && defined(__GNUC__)
inline void MemoryBarrier() {
Expand Down