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Merge pull request #28 from timmy61109/release/v5.3.4-beta
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Release/v5.3.4-beta
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@timmy61109
timmy61109 authored Sep 9, 2019
2 parents 4329dee + 234c6e2 commit 56dd8f9
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271 changes: 271 additions & 0 deletions CH5/CH5-2/Full_subtractor_S.bdf
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, the Altera Quartus II License Agreement,
the Altera MegaCore Function License Agreement, or other
applicable license agreement, including, without limitation,
that your use is for the sole purpose of programming logic
devices manufactured by Altera and sold by Altera or its
authorized distributors. Please refer to the applicable
agreement for further details.
*/
(header "graphic" (version "1.4"))
(pin
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(rect 120 232 288 248)
(text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
(text "A" (rect 5 0 14 10)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 84 12)(pt 109 12))
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(line (pt 109 12)(pt 113 8))
)
(text "VCC" (rect 128 7 149 16)(font "Arial" (font_size 6)))
)
(pin
(input)
(rect 120 248 288 264)
(text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
(text "B" (rect 5 0 14 10)(font "Arial" ))
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(pin
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)
(pin
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(symbol
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)
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(connector
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)
(connector
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(pt 432 312)
)
31 changes: 31 additions & 0 deletions CH5/CH5-2/Full_subtractor_S.qpf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, the Altera Quartus II License Agreement,
# the Altera MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Altera and sold by Altera or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 15.0.2 Build 153 07/15/2015 SJ Web Edition
# Date created = 17:08:29 August 26, 2019
#
# -------------------------------------------------------------------------- #

QUARTUS_VERSION = "15.0"
DATE = "17:08:29 August 26, 2019"

# Revisions

PROJECT_REVISION = "Full_subtractor_S"
64 changes: 64 additions & 0 deletions CH5/CH5-2/Full_subtractor_S.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, the Altera Quartus II License Agreement,
# the Altera MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Altera and sold by Altera or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 15.0.2 Build 153 07/15/2015 SJ Web Edition
# Date created = 17:08:29 August 26, 2019
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# Full_subtractor_S_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CSXFC6D6F31C8
set_global_assignment -name TOP_LEVEL_ENTITY Full_subtractor_S
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.0.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:08:29 AUGUST 26, 2019"
set_global_assignment -name LAST_QUARTUS_VERSION 15.0.2
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
set_global_assignment -name BDF_FILE Full_subtractor_S.bdf
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name VECTOR_WAVEFORM_FILE Full_subtractor_S.vwf
set_global_assignment -name CDF_FILE output_files/Full_subtractor_S.cdf
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_location_assignment PIN_W25 -to A
set_location_assignment PIN_V25 -to B
set_location_assignment PIN_AC28 -to Bi
set_location_assignment PIN_AF10 -to Bo
set_location_assignment PIN_AD10 -to Do
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
Binary file added CH5/CH5-2/Full_subtractor_S.qws
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