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RISC-V Single Cycle CPU

Cover Image


Result Image

Usage

Display Bad Apple Video

  1. Make sure java is installed.

  2. Run logisim-evolution.jar using Java.

  3. Open 32b_single_cycle_cpu.circ or 32b_single_cycle_cpu_single_page.circ in Logisim.

  4. Load IMEM and DMEM to the corresponding memory modules.

  5. Enable clock.

Assemble your own program

Please try the Mercury assembler

Notes

  • Single page version can achieve ~300 Hz clock rate on a i7-6700K computer.

Terms and Conditions

The software Logisim-evoluion is under GNU GENERAL PUBLIC LICENSE.

This project is under GNU GENERAL PUBLIC LICENSE. Feel free to redistribute it and/or modify it under the terms of the GNU General Public License.

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A RISC-V 32bit single-cycle CPU written in Logisim

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  • Python 72.0%
  • Assembly 28.0%