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stop accidental turbo mode
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jr1221 committed Dec 16, 2024
1 parent c5ec104 commit f60419a
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1 change: 1 addition & 0 deletions src/simulatable_message.rs
Original file line number Diff line number Diff line change
Expand Up @@ -206,6 +206,7 @@ impl SimEnum {
/// Base logic for enum sim
impl SimShared for SimEnum {
fn update(&mut self) {
self.component.last_update = Instant::now();
let mut rng = rand::thread_rng();
for i in 0..self.component.value.len() {
let prob = rng.gen_range(0f32..1f32);
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