Finished Refactoring LTC4015 Ticket

.gitignore

@@ -1,5 +1,3 @@
 .vscode/
 __pycache__/
-*.egg-info/
-
-*.nix
+*.egg-info/

general/include/LTC4015.h

@@ -39,41 +39,49 @@
 //Enable Coulomb Counter Low Alert.(0xOD Bit 13)
 //Enable Coulomb Counter High Alert.(0xOD Bit 12)
 
+typedef int (*Read_Ptr)(uint16_t DevAddress, uint16_t MemAddress,
+			uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
+
+typedef int (*Write_Ptr)(uint16_t DevAddress, uint16_t MemAddress,
+			 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
+
 typedef struct {
-	I2C_HandleTypeDef *i2cHandle;
 	uint16_t chargeFaults; //Stores error faults from CHGSTATE register
 	uint16_t qcount;
 	uint16_t limitAlerts;
 
+	Read_Ptr read;
+	Write_Ptr write;
 } LTC4015_T;
 
 /**
  * @brief Initializes the LTC4015EUHF#PBF
  *
  * @param dev
  * @param hi2c
- * @return HAL_StatusTypeDef
+ * @return int
  */
-HAL_StatusTypeDef LTC4015_Init(LTC4015_T *dev, I2C_HandleTypeDef *i2cHandle);
+int LTC4015_Init(LTC4015_T *dev, Read_Ptr read, Write_Ptr write);
 
 /**
  * @brief Reads from the LTC4015EUHF#PBF load switch 
  * @note always reads from both input registers
  *
  * @param dev
- * @param i2c_handle
+ * @param reg
+ * @param data
  */
-HAL_StatusTypeDef LTC4015_read(LTC4015_T *dev, uint16_t reg, uint16_t *data);
+int LTC4015_read(LTC4015_T *dev, uint16_t reg, uint16_t *data);
 
 /**
  * @brief Writes to the LTC4015EUHF#PBF load switch 
  *
- * @param device
+ * @param dev
+ * @param reg
  * @param data
- * @param i2c_handle
- * @return HAL_StatusTypeDef
+ * @return int
  */
-HAL_StatusTypeDef LTC4015_write(LTC4015_T *dev, uint16_t reg, uint16_t data);
+int LTC4015_write(LTC4015_T *dev, uint16_t reg, uint16_t data);
 
 /**
  * @brief Checks coulombs of charger to see if within a given range, more info on page 38-40
@@ -83,10 +91,10 @@ HAL_StatusTypeDef LTC4015_write(LTC4015_T *dev, uint16_t reg, uint16_t data);
  * @param highAlert
  * @param prescaler
  * @param lowAlert
- * @return HAL_StatusTypeDef, QCOUNT, Faulted 
+ * @return int
  */
-HAL_StatusTypeDef LTC4015_Qcounter(LTC4015_T *dev, uint16_t prescaler,
-				   uint16_t highAlert, uint16_t lowAlert);
+int LTC4015_Qcounter(LTC4015_T *dev, uint16_t prescaler, uint16_t highAlert,
+		     uint16_t lowAlert);
 
 #ifndef MAX_NUM_LTC4015_INSTANCES
 #define MAX_NUM_LTC4015_INSTANCES 1

general/include/ads131m04.h

@@ -4,15 +4,15 @@
 #include "stm32xx_hal.h"
 
 typedef struct {
-	SPI_HandleTypeDef *spi;
-	GPIO_TypeDef *gpio;
-	uint8_t cs_pin;
+  SPI_HandleTypeDef *spi;
+  GPIO_TypeDef *gpio;
+  uint8_t cs_pin;
 } ads131_t;
 
 /*  Method to initialize communication over SPI and configure the ADC into
  * Continuous Conversion Mode*/
 void ads131m04_init(ads131_t *adc, SPI_HandleTypeDef *hspi, GPIO_TypeDef *hgpio,
-		    uint8_t cs_pin);
+                    uint8_t cs_pin);
 
 /* Method to read values out of the ADC */
 HAL_StatusTypeDef ads131m04_read_adc(ads131_t *adc, uint32_t *adc_values);

general/include/lsm6dso.h

@@ -14,29 +14,29 @@
 #define LSM6DSO_I2C_ADDRESS 0x6A << 1 /* Shifted because datasheet said to */
 // Not sure if these are all needed, also not sure if more need to be added
 /* For register descriptions reference datasheet pages 47 - 98 */
-#define LSM6DSO_REG_FUNC_CFG_ACCESS \
-	0x01 /* Enable embedded functions register */
-#define LSM6DSO_REG_INTERRUPT_CTRL_1 \
-	0x0D /* INT1 pin control, used for interrupts */
-#define LSM6DSO_REG_INTERRUPT_CTRL_2 \
-	0x0E /* INT2 pin control, used for interrupts */
-#define LSM6DSO_REG_DEVICE_ID  0x0F /* Register for checking communication */
+#define LSM6DSO_REG_FUNC_CFG_ACCESS                                            \
+  0x01 /* Enable embedded functions register */
+#define LSM6DSO_REG_INTERRUPT_CTRL_1                                           \
+  0x0D /* INT1 pin control, used for interrupts */
+#define LSM6DSO_REG_INTERRUPT_CTRL_2                                           \
+  0x0E                              /* INT2 pin control, used for interrupts */
+#define LSM6DSO_REG_DEVICE_ID 0x0F  /* Register for checking communication */
 #define LSM6DSO_REG_ACCEL_CTRL 0x10 /* Accelerometer Control Register */
-#define LSM6DSO_REG_GYRO_CTRL  0x11 /* Gyroscope Control Register */
-#define LSM6DSO_REG_ALL_INTERRUPT_SRC \
-	0x1A /* Source Register for all interupsts */
-#define LSM6DSO_REG_WAKEUP_INTERRUPT_SRC \
-	0x1B /* Wake up interupt source register */
+#define LSM6DSO_REG_GYRO_CTRL 0x11  /* Gyroscope Control Register */
+#define LSM6DSO_REG_ALL_INTERRUPT_SRC                                          \
+  0x1A /* Source Register for all interupsts */
+#define LSM6DSO_REG_WAKEUP_INTERRUPT_SRC                                       \
+  0x1B /* Wake up interupt source register */
 #define LSM6DSO_REG_TAP_INTERRUPT_SRC 0x1C /* Tap Interrupt source register */
-#define LSM6DSO_REG_6D_INTERRUPT_SRC \
-	0x1D /* 6-direction Interrupt source register */
-#define LSM6DSO_REG_STATUS	   0x1E /* Status register */
-#define LSM6DSO_REG_GYRO_X_AXIS_L  0x22 /* Gyro pitch axis lower bits */
-#define LSM6DSO_REG_GYRO_X_AXIS_H  0x23 /* Gyro pitch axis upper bits */
-#define LSM6DSO_REG_GYRO_Y_AXIS_L  0x24 /* Gyro roll axis lower bits */
-#define LSM6DSO_REG_GYRO_Y_AXIS_H  0x25 /* Gyro roll axis upper bits */
-#define LSM6DSO_REG_GYRO_Z_AXIS_L  0x26 /* Gyro yaw axis lower bits */
-#define LSM6DSO_REG_GYRO_Z_AXIS_H  0x27 /* Gyro yaw axis higher bits */
+#define LSM6DSO_REG_6D_INTERRUPT_SRC                                           \
+  0x1D                          /* 6-direction Interrupt source register */
+#define LSM6DSO_REG_STATUS 0x1E /* Status register */
+#define LSM6DSO_REG_GYRO_X_AXIS_L 0x22  /* Gyro pitch axis lower bits */
+#define LSM6DSO_REG_GYRO_X_AXIS_H 0x23  /* Gyro pitch axis upper bits */
+#define LSM6DSO_REG_GYRO_Y_AXIS_L 0x24  /* Gyro roll axis lower bits */
+#define LSM6DSO_REG_GYRO_Y_AXIS_H 0x25  /* Gyro roll axis upper bits */
+#define LSM6DSO_REG_GYRO_Z_AXIS_L 0x26  /* Gyro yaw axis lower bits */
+#define LSM6DSO_REG_GYRO_Z_AXIS_H 0x27  /* Gyro yaw axis higher bits */
 #define LSM6DSO_REG_ACCEL_X_AXIS_L 0x28 /* Accelerometer X axis lower bits */
 #define LSM6DSO_REG_ACCEL_X_AXIS_H 0x29 /* Accelerometer X axis upper bits */
 #define LSM6DSO_REG_ACCEL_Y_AXIS_L 0x2A /* Accelerometer Y axis lower bits */
@@ -49,26 +49,26 @@
  *
  */
 enum lsm6dso_axes {
-	LSM6DSO_X_AXIS = 0,
-	LSM6DSO_Y_AXIS = 1,
-	LSM6DSO_Z_AXIS = 2
+  LSM6DSO_X_AXIS = 0,
+  LSM6DSO_Y_AXIS = 1,
+  LSM6DSO_Z_AXIS = 2
 };
 
 /**
  * @brief Struct containing data relevant to the LSM6DSO IMU
  *
  */
 typedef struct {
-	I2C_HandleTypeDef *i2c_handle;
+  I2C_HandleTypeDef *i2c_handle;
 
-	uint8_t accel_config; // TODO: We should make these cfg packed unions with
-		// bitfield structs
+  uint8_t accel_config; // TODO: We should make these cfg packed unions with
+                        // bitfield structs
 
-	uint8_t gyro_config;
+  uint8_t gyro_config;
 
-	int16_t accel_data[3];
+  int16_t accel_data[3];
 
-	int16_t gyro_data[3];
+  int16_t gyro_data[3];
 
 } lsm6dso_t;
 
@@ -92,7 +92,7 @@ HAL_StatusTypeDef lsm6dso_init(lsm6dso_t *imu, I2C_HandleTypeDef *i2c_handle);
  * @return HAL_StatusTypeDef
  */
 HAL_StatusTypeDef lsm6dso_set_accel_cfg(lsm6dso_t *imu, int8_t odr_sel,
-					int8_t fs_sel, int8_t lp_f2_enable);
+                                        int8_t fs_sel, int8_t lp_f2_enable);
 
 /**
  * @brief Configures the accelerometer of the LSM6DSO IMU
@@ -104,7 +104,7 @@ HAL_StatusTypeDef lsm6dso_set_accel_cfg(lsm6dso_t *imu, int8_t odr_sel,
  * @return HAL_StatusTypeDef
  */
 HAL_StatusTypeDef lsm6dso_set_gyro_cfg(lsm6dso_t *imu, int8_t odr_sel,
-				       int8_t fs_sel, int8_t fs_125);
+                                       int8_t fs_sel, int8_t fs_125);
 
 /* Data Aquisition */
 /**