ADBMS Integration (#138)

Co-authored-by: Jack Rubacha <[email protected]>

.github/workflows/build-check.yml

@@ -9,6 +9,7 @@ jobs:
         uses: actions/checkout@v4
         with:
             submodules: recursive
+            token: ${{ secrets.PAT_TOKEN }}
             fetch-depth: 0
       - name: Execute Make
         run: |

.github/workflows/format-check.yml

@@ -10,6 +10,7 @@ jobs:
     - uses: actions/checkout@v4
       with:
         submodules: recursive
+        token: ${{ secrets.PAT_TOKEN }}
     - name: Run clang-format style check for C/C++ sources
       uses: Northeastern-Electric-Racing/clang-format-action@main
       with:

.gitmodules

@@ -1,3 +1,6 @@
 [submodule "Drivers/Embedded-Base"]
 	path = Drivers/Embedded-Base
 	url = https://github.com/Northeastern-Electric-Racing/Embedded-Base.git
+[submodule "Drivers/adbms"]
+	path = Drivers/adbms
+	url = [email protected]:Northeastern-Electric-Racing/adbms.git

Core/Inc/FreeRTOSConfig.h

@@ -51,7 +51,6 @@
 #if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
   #include <stdint.h>
   extern uint32_t SystemCoreClock;
-  void xPortSysTickHandler(void);
 #endif
 #ifndef CMSIS_device_header
 #define CMSIS_device_header "stm32f4xx.h"
@@ -164,7 +163,7 @@ standard names. */
 
 /* IMPORTANT: After 10.3.1 update, Systick_Handler comes from NVIC (if SYS timebase = systick), otherwise from cmsis_os2.c */
 
-#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 1
+#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 0
 
 /* USER CODE BEGIN Defines */
 /* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */

Core/Inc/adi_interaction.h

@@ -0,0 +1,238 @@
+#include "adBms6830Data.h"
+#include "bmsConfig.h"
+
+// --- BEGIN SET HELPERS ---
+
+/**
+ * @brief Set the status of the REFON bit.
+ * 
+ * @param chip Pointer to the chip to modify.
+ * @param state New state of the REFON bit.
+ */
+void set_REFON(cell_asic *chip, REFON state);
+
+/**
+ * @brief Set the C-ADC vs. S-ADC comparison voltage threshold 
+ * 
+ * @param chip Pointer to the chip to modify.
+ * @param threshold Threshold to set.
+ */
+void set_volt_adc_comp_thresh(cell_asic *chip, CTH threshold);
+
+void set_diagnostic_flags(cell_asic *chip, FLAG_D config);
+
+/**
+ * @brief Set the discharge state of a cell.
+ * 
+ * @param chip Pointer to chip with cell to modify.
+ * @param cell ID of cell to modify. Cell indexes start are from 1-16 (NOT ZERO INDEXED).
+ * @param discharge Cell discharge state. true to discharge, false to disable discharge.
+ */
+void set_cell_discharge(cell_asic *chip, uint8_t cell, bool discharge);
+
+/**
+ * @brief Set the state of the SOAKON bit to either enable or disable soak times.
+ * 
+ * @param chip Pointer to chip to configure
+ * @param state Enable or disable SOAKON
+ */
+void set_soak_on(cell_asic *chip, SOAKON state);
+
+/**
+ * @brief Set the soak time range.
+ * 
+ * @param chip Pointer to chip to configure
+ * @param range The range of time over which to soak for aux and aux2
+ */
+void set_aux_soak_range(cell_asic *chip, OWRNG range);
+
+/**
+ * @brief Set the open wire soak time. See data sheet for formula.
+ * 
+ * @param chip Pointer to chip configuration
+ * @param time The amount of time to soak for. Higher OWA is a higher soak time.
+ */
+void set_open_wire_soak_time(cell_asic *chip, OWA time);
+
+/**
+ * @brief Set the pull of a GPIO pin on an ADBMS8630.
+ * 
+ * @param chip ADBMS6830 chip
+ * @param gpio Number of the GPIO pin to change (1-10)
+ * @param input True is no pull down, False is pull down.
+ */
+void set_gpio_pull(cell_asic *chip, uint8_t gpio, bool input);
+
+/**
+ * @brief Set the corner frequency of the IIR filter.
+ * 
+ * @param chip Pointer to chip config
+ * @param freq Corner frequency (see IIR_FPA enum for frequencies)
+ */
+void set_iir_corner_freq(cell_asic *chip, IIR_FPA freq);
+
+/**
+ * @brief Configure a chip as a break in the isoSPI daisy chain.
+ * 
+ * @param chip Pointer to chip config
+ * @param is_break True if chip is break, false if chip is not break
+ */
+void set_comm_break(cell_asic *chip, bool is_break);
+
+/**
+ * @brief Enable/disable discharging through the mute discharge bit.
+ * 
+ * @param chip Pointer to chip config
+ * @param disable_discharge True to disable discharge, false to enable discharge.
+ */
+void set_mute_state(cell_asic *chip, bool disable_discharge);
+
+/**
+ * @brief Set whether or not this chip is taking a snapshot. The chip will not begin reading new values unless the snapshot bit is cleared.
+ * 
+ * @param chip Pointer to chip config
+ * @param take_snapshot True to take a snapshot, false to end the snapshot
+ */
+void set_snapshot(cell_asic *chip, bool take_snapshot);
+
+/**
+ * @brief Enable/disable the discharge timer monitor.
+ * 
+ * @param chip Pointer to chip config
+ * @param enabled True if discharge timer monitor is enabled, false if otherwise
+ */
+void set_discharge_timer_monitor(cell_asic *chip, bool enabled);
+
+/**
+ * @brief Configure the discharge timer range, which affects the resolution.
+ * 
+ * @param chip Pointer to chip config
+ * @param large True for large range, False for small range
+ */
+void set_discharge_timer_range(cell_asic *chip, bool large);
+
+/**
+ * @brief Set the discharge monitor timeout, which is dependent on the discharge timer range.
+ * 
+ * @param chip Pointer to chip config
+ * @param timeout Base for timeout multiplicaiton. Must be below six bits.
+ */
+void set_discharge_timeout(cell_asic *chip, uint8_t timeout);
+
+// --- END SET HELPERS ---
+
+// --- BEGIN WRITE COMMANDS ---
+
+/**
+ * @brief Soft reset all chips, then re-wake them
+ * 
+ * @param chips 
+ */
+void soft_reset_chips(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Write config registers. Wakes chips before writing.
+ * 
+ * @param chips Array of chips to write config registers of.
+ */
+void write_config_regs(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Clears all status regster C flags except the CS FLT
+ * 
+ * @param chips 
+ */
+void write_clear_flags(cell_asic chips[NUM_CHIPS]);
+
+// --- END WRITE COMMANDS ---
+
+// --- BEGIN READ COMMANDS ---
+
+/**
+ * @brief Read all filtered voltage results.  IIR must be on and ADC must be continous
+ * 
+ * @param chips The chips to read voltages from
+ */
+void read_filtered_voltage_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read every register connected to the AUX ADC.
+ * 
+ * @param chips Array of chips to get voltage readings of.
+ */
+void adc_and_read_aux_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read voltages in every register connected to AUX2 ADC.
+ * 
+ * @param chips Array of chips to get voltages of.
+ */
+void adc_and_read_aux2_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read status registers.
+ * 
+ * @param chips Array of chips to read.
+ */
+void read_status_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read status and aux registers in one command.
+ * 
+ * @param chips Array of chips to read.
+ */
+void read_status_aux_registers(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Read the serial ID of the chip.
+ * 
+ * @param chips Array of chips to read.
+ */
+void read_serial_id(cell_asic chips[NUM_CHIPS]);
+
+// --- END READ COMMANDS ---
+
+// --- BEGIN ADC POLL ---
+
+/**
+ * @brief Get voltage readings from the C-ADCs. Takes a single shot measurement.
+ * 
+ * @param chips Array of chips to get voltage readings from.
+ */
+void get_c_adc_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Get voltages from the S-ADCs. Makes a single shot measurement.
+ * 
+ * @param chip Array of chips to get voltage readings from.
+ */
+void get_s_adc_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Get the avgeraged cell voltages.
+ * 
+ * @param chip Array of chips to get voltage readings of.
+ */
+void get_avgd_cell_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Get the filtered cell volrages.
+ * 
+ * @param chip Array of chips to get voltage readings of.
+ */
+void get_filtered_cell_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Get the c and s adc voltages. Does this with RDCSALL command.
+ * 
+ * @param chips Array of chips to get voltage readings of.
+ */
+void get_c_and_s_adc_voltages(cell_asic chips[NUM_CHIPS]);
+
+/**
+ * @brief Starts a continous c ADC conversion with S redundancy
+ * 
+ */
+void start_c_adc_conv();
+
+// --- END ADC POLL ---

Core/Inc/analyzer.h

@@ -11,23 +11,6 @@ extern uint8_t THERM_DISABLE[NUM_CHIPS][NUM_THERMS_PER_CHIP];
 
 extern const uint8_t NO_THERM;
 extern const uint8_t MUX_OFFSET;
-
-/**
- * @brief Mapping the Relevant Thermistors for each cell based on cell #
- * @note 0xFF indicates the end of the relevant therms
- * @note Low side
- */
-extern const uint8_t RELEVANT_THERM_MAP_L[NUM_CELLS_PER_CHIP]
-					 [NUM_RELEVANT_THERMS];
-
-/**
- * @brief Mapping the Relevant Thermistors for each cell based on cell #
- * @note 0xFF indicates the end of the relevant therms
- * @note High side
- */
-extern const uint8_t RELEVANT_THERM_MAP_H[NUM_CELLS_PER_CHIP]
-					 [NUM_RELEVANT_THERMS];
-
 /*
  * List of therms that we actually read from, NOT reordered by cell
  */
@@ -44,6 +27,14 @@ extern const uint8_t POPULATED_THERM_LIST_H[NUM_THERMS_PER_CHIP];
 
 //#define MAX_SIZE_OF_HIST_QUEUE  300000U //bytes
 
+/**
+ * @brief Get the number of cells on a chip.
+ * 
+ * @param chip_data Pointer to struct containing chip data.
+ * @return uint8_t The number of cells in the chip.
+ */
+uint8_t get_num_cells(chipdata_t *chip_data);
+
 /**
  * @brief Calculate thermistor values and cell temps using thermistors.
  * 

Core/Inc/bmsConfig.h

@@ -1,12 +1,19 @@
 #ifndef BMS_CONFIG_H
 #define BMS_CONFIG_H
 
+#define DEBUG_MODE_ENABLED true
+#define DEBUG_STATS
+
 // Hardware definition
-#define NUM_SEGMENTS	    6
-#define NUM_CHIPS	    NUM_SEGMENTS * 2
-#define NUM_CELLS_PER_CHIP  10
-#define NUM_THERMS_PER_CHIP 32
-#define NUM_RELEVANT_THERMS 3
+#define NUM_SEGMENTS	1
+#define NUM_CHIPS	1 //NUM_SEGMENTS * 2
+#define NUM_CELLS_ALPHA 14
+#define NUM_CELLS_BETA	11
+#define NUM_CELLS_SEG	NUM_CELLS_ALPHA + NUM_CELLS_BETA
+#define NUM_CELLS                                \
+	((NUM_CELLS_ALPHA * (NUM_CHIPS / 2.0)) + \
+	 (NUM_CELLS_BETA * (NUM_CHIPS / 2.0)))
+#define NUM_THERMS_PER_CHIP 14
 
 // Firmware limits
 #define MAX_TEMP      65 //degrees C

Core/Inc/can_handler.h

@@ -39,9 +39,44 @@
 #define NOISE_CANID	    0x88
 #define NOISE_SIZE	    6
 #define DEBUG_CANID	    0x702
-#define DEBUG_SIZE	    8
-#define FAULT_TIMER_CANID   0x6FF
-#define FAULT_TIMER_SIZE    4
+
+#define ALPHA_CELL_CANID   0x6FA
+#define BETA_CELL_CANID	   0x6FB
+#define CELL_MSG_SIZE	   7
+#define BETA_STAT_A_CANID  0x6FD
+#define BETA_STAT_A_SIZE   8
+#define BETA_STAT_B_CANID  0x6FE
+#define BETA_STAT_B_SIZE   8
+#define ALPHA_STAT_A_CANID 0x6FC
+#define ALPHA_STAT_A_SIZE  7
+#define ALPHA_STAT_B_CANID 0x6FF
+#define ALPHA_STAT_B_SIZE  7
+
+typedef struct {
+	uint32_t prev_tick;
+	uint32_t msg_rate; /* in milliseconds */
+} rl_data_t;
+
+typedef enum {
+	CHARGE,
+	DISCHARGE,
+	ACC_STATUS,
+	BMS_STATUS,
+	SHUTDOWN_CTRL,
+	CELL_DATA,
+	CELL_VOLTAGE,
+	CURRENT,
+	CELL_TEMP,
+	SEGMENT_TEMP,
+	FAULT,
+	NOISE,
+	DEBUG,
+	RL_MSG_COUNT
+} rate_lim_t;
+
+#define DEBUG_SIZE	  8
+#define FAULT_TIMER_CANID 0x6FF
+#define FAULT_TIMER_SIZE  4
 
 void can_receive_callback(CAN_HandleTypeDef *hcan);