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rv64v: fix vill check for vector instructions #370

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merged 1 commit into from
Jun 26, 2024
Merged

rv64v: fix vill check for vector instructions #370

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3 changes: 3 additions & 0 deletions src/isa/riscv64/instr/rvv/vcompute_impl.c
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Original file line number Diff line number Diff line change
Expand Up @@ -319,6 +319,7 @@ void vector_slide_check(Decode *s, bool is_over) {

void arthimetic_instr(int opcode, int is_signed, int widening, int narrow, int dest_mask, Decode *s) {
if(check_vstart_ignore(s)) return;
require_vector(true);
int vlmax = get_vlmax(vtype->vsew, vtype->vlmul);
int idx;
uint64_t carry;
Expand Down Expand Up @@ -833,6 +834,7 @@ void arthimetic_instr(int opcode, int is_signed, int widening, int narrow, int d
*/
void permutaion_instr(int opcode, Decode *s) {
if(check_vstart_ignore(s)) return;
require_vector(true);
int vlmax = get_vlmax(vtype->vsew, vtype->vlmul);
int idx;
for(idx = vstart->val; idx < vl->val; idx ++) {
Expand Down Expand Up @@ -977,6 +979,7 @@ void permutaion_instr(int opcode, Decode *s) {

void floating_arthimetic_instr(int opcode, int is_signed, int widening, int dest_mask, Decode *s) {
if(check_vstart_ignore(s)) return;
require_vector(true);
if (dest_mask) {
if (s->src_vmode == SRC_VV) {
vector_mvv_check(s, true);
Expand Down
8 changes: 4 additions & 4 deletions src/isa/riscv64/instr/rvv/vldst.h
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Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@ def_EHelper(vlm) { //mask
}

def_EHelper(vlr) { // whole register
require_vector(true);
require_vector(false);
VLR(MODE_UNIT, UNSIGNED, s, MMU_DIRECT)
}

Expand Down Expand Up @@ -60,7 +60,7 @@ def_EHelper(vsm) {
}

def_EHelper(vsr) {
require_vector(true);
require_vector(false);
VSR(MODE_UNIT, MMU_DIRECT)
}

Expand Down Expand Up @@ -89,7 +89,7 @@ def_EHelper(vlm_mmu) { //mask
}

def_EHelper(vlr_mmu) { //whple register
require_vector(true);
require_vector(false);
VLR(MODE_UNIT, UNSIGNED, s, MMU_TRANSLATE)
}

Expand Down Expand Up @@ -118,7 +118,7 @@ def_EHelper(vsm_mmu) {
}

def_EHelper(vsr_mmu) {
require_vector(true);
require_vector(false);
VSR(MODE_UNIT, MMU_TRANSLATE)
}

Expand Down
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