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PX4 H7 ADC - stm32h7_adc: Dynamically set clock prescaler and BOOST settings #22503

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merged 3 commits into from
Jan 30, 2024
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PX4 H7 ADC - stm32h7_adc: Dynamically set clock prescaler and BOOST settings #22503

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6ca39e3
NuttX with h7 adc clock Backports
davids5 Dec 7, 2023
2e70719
stm32h7:ADC STM32_RCC_D3CCIPR_ADCSEL->STM32_RCC_D3CCIPR_ADCSRC
davids5 Dec 5, 2023
70e90c2
stm32h7:adc Dynamically set clock prescaler & BOOST
davids5 Dec 7, 2023
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2 changes: 1 addition & 1 deletion boards/ark/fmu-v6x/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/cuav/nora/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

#define STM32_FDCANCLK STM32_HSE_FREQUENCY
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2 changes: 1 addition & 1 deletion boards/cuav/x7pro/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

#define STM32_FDCANCLK STM32_HSE_FREQUENCY
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2 changes: 1 addition & 1 deletion boards/cubepilot/cubeorange/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */

/* FLASH wait states */
#define BOARD_FLASH_WAITSTATES 2
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2 changes: 1 addition & 1 deletion boards/cubepilot/cubeorangeplus/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */

/* FLASH wait states */
#define BOARD_FLASH_WAITSTATES 2
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2 changes: 1 addition & 1 deletion boards/holybro/durandal-v1/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/holybro/kakuteh7/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/holybro/kakuteh7mini/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/holybro/kakuteh7v2/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/matek/h743-mini/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 clock source */

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2 changes: 1 addition & 1 deletion boards/matek/h743-slim/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 clock source */

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2 changes: 1 addition & 1 deletion boards/matek/h743/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 clock source */

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2 changes: 1 addition & 1 deletion boards/modalai/fc-v2/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/mro/ctrl-zero-classic/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

#define STM32_FDCANCLK STM32_HSE_FREQUENCY
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2 changes: 1 addition & 1 deletion boards/mro/ctrl-zero-h7-oem/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

#define STM32_FDCANCLK STM32_HSE_FREQUENCY
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2 changes: 1 addition & 1 deletion boards/mro/ctrl-zero-h7/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

#define STM32_FDCANCLK STM32_HSE_FREQUENCY
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2 changes: 1 addition & 1 deletion boards/mro/pixracerpro/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2 /* SPI45 clock source */
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PLL2 /* SPI6 clock source */
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */
#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

#define STM32_FDCANCLK STM32_HSE_FREQUENCY
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2 changes: 1 addition & 1 deletion boards/px4/fmu-v6c/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/px4/fmu-v6u/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* CAN FD clock source */
#define STM32_FDCANCLK STM32_HSE_FREQUENCY
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2 changes: 1 addition & 1 deletion boards/px4/fmu-v6x/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/siyi/n7/nuttx-config/include/board.h
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#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_PLL3 /* USB 1 and 2 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2 /* ADC 1 2 3 clock source */

#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE /* FDCAN 1 2 clock source */

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2 changes: 1 addition & 1 deletion boards/spracing/h7extreme/nuttx-config/include/board.h
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/* ADC 1 2 3 clock source */

#define STM32_RCC_D3CCIPR_ADCSEL RCC_D3CCIPR_ADCSEL_PLL2
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2

/* QSPI clock source */
#define STM32_RCC_D1CCIPR_QSPISEL RCC_D1CCIPR_QSPISEL_PLL2
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4 changes: 2 additions & 2 deletions boards/spracing/h7extreme/src/rcc.c
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Expand Up @@ -503,10 +503,10 @@ __ramfunc__ void stm32_board_clockconfig(void)

/* Configure ADC source clock */

#if defined(STM32_RCC_D3CCIPR_ADCSEL)
#if defined(STM32_RCC_D3CCIPR_ADCSRC)
regval = getreg32(STM32_RCC_D3CCIPR);
regval &= ~RCC_D3CCIPR_ADCSEL_MASK;
regval |= STM32_RCC_D3CCIPR_ADCSEL;
regval |= STM32_RCC_D3CCIPR_ADCSRC;
putreg32(regval, STM32_RCC_D3CCIPR);
#endif

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2 changes: 1 addition & 1 deletion platforms/nuttx/NuttX/nuttx
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Submodule nuttx updated 7 files
+14 −12 arch/arm/src/stm32h7/hardware/stm32_adc.h
+146 −1 arch/arm/src/stm32h7/stm32_adc.c
+2 −2 arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
+2 −2 arch/arm/src/stm32h7/stm32h7x7xx_rcc.c
+1 −1 boards/arm/stm32h7/nucleo-h743zi/include/board.h
+1 −1 boards/arm/stm32h7/nucleo-h743zi2/include/board.h
+1 −1 boards/arm/stm32h7/stm32h747i-disco/include/board.h
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