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if indvar then parameters should be -9
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TheoPannetier committed Sep 6, 2024
1 parent 0135ae0 commit ddcc5fc
Showing 1 changed file with 11 additions and 10 deletions.
21 changes: 11 additions & 10 deletions src/BatchMode.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2690,13 +2690,15 @@ int CheckTransferFile(string indir)
errors++;
}
}

if (inStepLength <= 0.0) {
BatchError(whichFile, whichLine, 10, "SL"); errors++;
}
if (inStepCorr <= 0.0 || inStepCorr >= 1.0) {
BatchError(whichFile, whichLine, 20, "Rho"); errors++;
else {
if (inStepLength <= 0.0) {
BatchError(whichFile, whichLine, 10, "SL"); errors++;
}
if (inStepCorr <= 0.0 || inStepCorr >= 1.0) {
BatchError(whichFile, whichLine, 20, "Rho"); errors++;
}
}

if (inStraightenPath != 0 && inStraightenPath != 1) {
BatchError(whichFile, whichLine, 1, "StraightenPath"); errors++;
}
Expand Down Expand Up @@ -2903,14 +2905,13 @@ int CheckSettleFile(void)
nbErrors++;
}
}

if (inDensDep == 1) {
else if (inDensDep == 1) {

if (inS0 <= 0.0 || inS0 > 1.0) {
BatchError(whichFile, whichLine, 20, "S0");
nbErrors++;
}
// NOTE: alphaS and betaS can take any value
// alphaS and betaS can take any value
}
}
// read next simulation
Expand Down Expand Up @@ -3682,7 +3683,7 @@ int checkTraitSetCoherency(const vector <TraitType>& allReadTraits) {
batchLog << "Settlement alpha trait is missing." << endl;
nbErrors++;
}
if (!hasSMSBeta) {
if (!hasSettBeta) {
BatchError(whichInputFile, -999, 0, " ");
batchLog << "Settlement beta trait is missing." << endl;
nbErrors++;
Expand Down

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