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Merge pull request #263 from uxuh/patch-2
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Update components_hierarchy.rst
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Dolu1990 authored Jul 29, 2024
2 parents b8bee9e + 80eaafb commit 4b921f7
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Expand Up @@ -66,7 +66,6 @@ The syntax to define inputs and outputs is as follows:
- Bits/UInt/SInt
* - | ``in(T)``
| ``out(T)``
| ``out UInt(7 bits)``
- For all other data types, you may have to add some brackets around it. Sorry, this is a Scala limitation.
- T
* - | ``master(T)``
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