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There is no allocators for level zero in TiledArray yet
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Signed-off-by: Joseph Schuchart <[email protected]>
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devreal committed Nov 27, 2023
1 parent d660b07 commit 0ab8f47
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2 changes: 1 addition & 1 deletion examples/spmm/spmm_cuda.cc
Original file line number Diff line number Diff line change
Expand Up @@ -254,7 +254,7 @@ struct DeviceTensor : public ttg::TTValue<DeviceTensor<_T, _Range, _Storage>>
};

using scalar_t = double;
#if defined(TTG_HAVE_CUDA) || defined(TTG_HAVE_HIPBLAS) || defined(TTG_HAVE_LEVEL_ZERO)

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@evaleev

evaleev Nov 27, 2023

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what needs to happen to support level zero in TA?

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@devreal

devreal Nov 27, 2023

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We need a pinned allocator in TiledArray. We were not able to compile on a L0 machine with the device_pinned_allocator enabled. Is there a pinned allocator for L0 that we missed?

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@therault

therault via email Nov 27, 2023

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@evaleev

evaleev Nov 27, 2023

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Ugh, ugly, are we seriously supposed to have an executor for every single fn call next? ;)

Umpire only seems to have SYCL allocators, and those indeed have different signature: https://github.com/LLNL/Umpire/blob/develop/src/umpire/alloc/SyclPinnedAllocator.hpp#L31

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@therault

therault via email Nov 27, 2023

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#if defined(TTG_HAVE_CUDA) || defined(TTG_HAVE_HIPBLAS)
using blk_t = DeviceTensor<scalar_t, btas::DEFAULT::range,
btas::mohndle<btas::varray<scalar_t, TiledArray::device_pinned_allocator<scalar_t>>,
btas::Handle::shared_ptr>>;
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