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Merge pull request #148 from RICCIARDI-Adrien/initial_renesas_cr52_su…
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…pport

Added initial Renesas Cortex-R52 support.
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RICCIARDI-Adrien authored Nov 9, 2023
2 parents 8b82f0f + 3bdaced commit 9c67435
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31 changes: 31 additions & 0 deletions .github/workflows/build-examples.yaml
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Expand Up @@ -49,6 +49,37 @@ jobs:
run: ./make.py
working-directory: examples/cortex-a-r/armv7/bcm2836/rpi2/${{ matrix.example_name }}

cortex-a-r-spider-examples:
name: Build Renesas Spider Cortex-R52 examples
runs-on: ubuntu-22.04
needs: goil
env:
ARM_TOOLCHAIN_NAME: arm-gnu-toolchain-12.2.rel1-x86_64-arm-none-eabi
strategy:
matrix:
example_name: [blink, can_demo, iccom, one_task]
steps:
# A toolchain newer than the one included in Ubuntu 22.04 is needed
- name: Install ARM toolchain
run: |
wget https://developer.arm.com/-/media/Files/downloads/gnu/12.2.rel1/binrel/${{ env.ARM_TOOLCHAIN_NAME }}.tar.xz
sudo tar -xf ${{ env.ARM_TOOLCHAIN_NAME }}.tar.xz -C /opt
- name: Retrieve sources and Goil binary
uses: actions/cache/restore@v3
with:
path: ${{ github.workspace }}
key: ${{ env.CACHE_KEY }}
- name: Generate the code
run: |
echo "$(realpath /opt/${{ env.ARM_TOOLCHAIN_NAME }}/bin)" >> $GITHUB_PATH
${{ env.GOIL }} --target=cortex-a-r/armv8/spider --templates=../../../../../goil/templates/ ${{ matrix.example_name }}.oil
working-directory: examples/cortex-a-r/armv8/spider/${{ matrix.example_name }}
- name: Build the code
run: |
echo "$(realpath /opt/${{ env.ARM_TOOLCHAIN_NAME }}/bin)" >> $GITHUB_PATH
./make.py
working-directory: examples/cortex-a-r/armv8/spider/${{ matrix.example_name }}

avr-arduino-uno-examples:
name: Build AVR Arduino Uno examples
runs-on: ubuntu-22.04
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2 changes: 2 additions & 0 deletions README.md
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Expand Up @@ -8,6 +8,7 @@ Its API is aligned with OSEK/VDX OS and AUTOSAR OS 4.2 standards.
* cortex
* Cortex-M (M0+, M3 and M4 for now) instruction set
* Cortex-A (A7) instruction set. This port is under heavy development.
* Cortex-R (R52) instruction set.
* riscv
* PULPino microprocessor with 32bits RISC-V instruction set.
* ppc: PowerPC 32bits instruction set
Expand All @@ -32,6 +33,7 @@ Trampoline runs on the following platforms :
| NXP / Freescale MK20DX256 | Cortex-M4 | 1 | Teensy31 |
| NXP / Freescale MPC564xL | Power Architecture | 2 | XPC56XX EVB + XPC56XL MINI-MODULE |
| PULPino | RISC-V | 1 | ZedBoard |
| Renesas Spider CR52 | Cortex-R52 | 1 | Renesas R-Car S4 Spider |
| STMicroelectronics STM32F4xx | Cortex-M4 | 1 | STM32F4DISCOVERY with STM32F407VG |
| STMicroelectronics STM32F30x | Cortex-M4 | 1 | Nucleo-32 STM32F303K8 |
| STMicroelectronics STM32L432 | Cortex-M4 | 1 | Nucleo-32 STM32L432KC |
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5 changes: 5 additions & 0 deletions examples/cortex-a-r/armv8/spider/blink/.gitignore
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build/
blink/
*.map
*.py
blink_exe*
93 changes: 93 additions & 0 deletions examples/cortex-a-r/armv8/spider/blink/blink.c
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#include "tpl_os.h"

#define APP_Task_blink_START_SEC_CODE
#include "tpl_memmap.h"
#include "stdint.h"
#include "stdbool.h"
uint8_t *led8 = (uint8_t*)(0xe6050180 + 0x14);

#define GPIO0_BASE_ADDR 0xe6050180
#define IOINTSEL 0x00 /* General IO/Interrupt Switching Register */
#define INOUTSEL 0x04 /* General Input/Output Switching Register */
#define OUTDT 0x08 /* General Output Register */
#define INDT 0x0c /* General Input Register */
#define INTDT 0x10 /* Interrupt Display Register */
#define INTCLR 0x14 /* Interrupt Clear Register */
#define INTMSK 0x18 /* Interrupt Mask Register */
#define MSKCLR 0x1c /* Interrupt Mask Clear Register */
#define POSNEG 0x20 /* Positive/Negative Logic Select Register */
#define EDGLEVEL 0x24 /* Edge/level Select Register */
#define FILONOFF 0x28 /* Chattering Prevention On/Off Register */
#define OUTDTSEL 0x40 /* Output Data Select Register */
#define BOTHEDGE 0x4c /* One Edge/Both Edge Select Register */
#define INEN 0x50 /* General Input Enable Register */

#define GPIO_PIN 14

void gpio_modify_bit(uint32_t *addr, int bit, bool val) {
uint32_t tmp = *addr;
if(val) {
tmp |= (1<<bit);
} else {
tmp &= ~(1<<bit);
}
*addr = tmp;
}

void init_gpio(void){
uint32_t *addr;
/** GPIO **/
// *POSNEG = 0; // Positive logic
addr = (uint32_t*)(GPIO0_BASE_ADDR+POSNEG);
gpio_modify_bit(addr, GPIO_PIN, false);
// *INEN = 0; // General input disable
addr = (uint32_t*)(GPIO0_BASE_ADDR+INEN);
gpio_modify_bit(addr, GPIO_PIN, false);
// *IOINTSEL = 0; // General I/O mode
addr = (uint32_t*)(GPIO0_BASE_ADDR+IOINTSEL);
gpio_modify_bit(addr, GPIO_PIN, false);
// *INOUTSEL = 1; // General Output mode
addr = (uint32_t*)(GPIO0_BASE_ADDR+INOUTSEL);
gpio_modify_bit(addr, GPIO_PIN, true);
// *OUTDT = led_status; // output
addr = (uint32_t*)(GPIO0_BASE_ADDR+OUTDTSEL);
gpio_modify_bit(addr, GPIO_PIN, false);

}

void led(uint8_t status) {
uint32_t *addr;
// *OUTDT = led_status; // output
addr = (uint32_t*)(GPIO0_BASE_ADDR+OUTDT);
gpio_modify_bit(addr, GPIO_PIN, status);
}

volatile uint32_t temp = 0;
FUNC(int, OS_APPL_CODE) main(void)
{
init_gpio();
// for( int i = 0; i< 10; ++i) {
// led(0);
// for (int n=0; n<0xffffff; ++n) temp = n;
// led(1);
// for (int n=0; n<0xffffff; ++n) temp = n;
// }
StartOS(OSDEFAULTAPPMODE);
return 0;
}

volatile uint32_t tmp = 0;
TASK(my_only_task)
{
TerminateTask();
}

TASK(blink)
{
static int8_t led_status = 0;
led(led_status);
led_status = 1 - led_status;
TerminateTask();
}
#define APP_Task_blink_STOP_SEC_CODE
#include "tpl_memmap.h"
69 changes: 69 additions & 0 deletions examples/cortex-a-r/armv8/spider/blink/blink.oil
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OIL_VERSION = "4.2";

IMPLEMENTATION trampoline {

/* This fix the default STACKSIZE of tasks */
TASK {
UINT32 STACKSIZE = 1000 ;
} ;

/* This fix the default STACKSIZE of ISRs */
ISR {
UINT32 STACKSIZE = 1000 ;
} ;
};

CPU blink {
OS config {
STATUS = EXTENDED;

BUILD = TRUE {
TRAMPOLINE_BASE_PATH = "../../../../..";
APP_SRC = "blink.c";
APP_NAME = "blink_exe.elf";
CFLAGS = "-O0";
LDFLAGS = "-Map=blink.map";
COMPILER = "arm-none-eabi-gcc";
CPPCOMPILER = "arm-none-eabi-g++";
ASSEMBLER = "arm-none-eabi-as";
LINKER = "arm-none-eabi-ld";
COPIER = "arm-none-eabi-objcopy";
SYSTEM = PYTHON;
};
SYSTEM_CALL = TRUE;
MEMMAP = TRUE {
COMPILER = gcc;
LINKER = gnu_ld { SCRIPT = "script.ld"; };
ASSEMBLER = gnu_as;
MEMORY_PROTECTION = FALSE;
};
};

APPMODE std {};

TASK my_only_task {
PRIORITY = 1;
AUTOSTART = TRUE { APPMODE = std; };
ACTIVATION = 1;
SCHEDULE = FULL;
};

TASK blink {
PRIORITY = 1;
AUTOSTART = FALSE;
ACTIVATION = 1;
SCHEDULE = FULL;
};

ALARM blink_blink {
COUNTER = SystemCounter;
ACTION = ACTIVATETASK {
TASK = blink;
};
AUTOSTART = TRUE {
APPMODE = std;
ALARMTIME = 100;
CYCLETIME = 100;
};
};
};
10 changes: 10 additions & 0 deletions examples/cortex-a-r/armv8/spider/blink/build.sh
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#!/usr/bin/env bash

#stop on errors
set -e

echo "*** Run Goil ***"
goil --target=cortex-a-r/armv8/spider --templates=../../../../../goil/templates/ blink.oil

echo "*** Run Make ***"
./make.py
4 changes: 4 additions & 0 deletions examples/cortex-a-r/armv8/spider/can_demo/.gitignore
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can_demo/
can_demo_exe*
*.map
*.py
40 changes: 40 additions & 0 deletions examples/cortex-a-r/armv8/spider/can_demo/README.md
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# Trampoline CAN demo example

This example allows to test the Trampoline CAN stack on the Spider board.

## Hardware setup

Connect a CAN probe to the Spider board CAN0 SUB-D 9 connector (CN13A).

For the test, we used a Kvaser USBcan Pro 2xHS v2 connected to a Windows 10 PC running the Kvaser CanKing software.
As the Kvaser probe does not provide CAN bus terminating resistors, we made a little adaptation PCB with terminating resistors.
For that, we cut in half two DB-9 cables and kept the two female parts.
On the PCB, we wired the DB-9 pins 7 together (the CAN high signal), the DB-9 pins 2 together (the CAN low signal) and the DB-9 pins 3 together (the CAN ground).
Between the DB-9 pin 7 and pin 3 we soldered a 60 ohms resistors, we also added a second 60 ohms resistors between the DB-9 pin 2 and pin 3.

## Software setup

The Kvaser CanKing CAN bus configuration is as follow :
* Bus speed : 125 Kbit/s.
* Sample point : 75% (Tseg1 = 11, TSeg2 = 4).
* SWJ (Synchronization Jump Width) : 4.

No configuration is needed on the CAN demo application side.

## Building

On Linux :
```
cd examples/cortex-a-r/armv8/spider/can_demo
goil --target=cortex-a-r/armv8/spider --templates=../../../../../goil/templates/ can_demo.oil
./make.py
```

## Running

Before starting the CAN demo application, connect the hardware setup and configure the Kvaser CanKing application as described in the above paragraphs.
Then, click the CanKing `Go On Bus` button.
Now, you can run the CAN demo application.

The CAN demo application starts by sending a CAN frame with the CAN ID `0x123` and the string payload `Ready!`.
After that, it waits for a CAN frame to be received. When a frame is received, it increments the CAN ID and all the payload bytes, then it sends the frame back.
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